KR100913974B1 - Frequency ratio digitizing temperature sensor with linearity correction - Google Patents

Abstract

Frequency ratio digitization temperature sensor for generating linearity correction temperature output signal has an input generation circuit for receiving PTAT current and CTAT current and a frequency ratio ADC including data and reference oscillators. The input generation circuit generates a first current from the weighted sum of the PTAT current and the CTAT current, and also generates a first positive current that is the sum of the first current and the PTAT current of the first ratio. The input generation circuit provides a first output current indicating the PTAT current and a first output voltage generated by applying the first positive current to the first resistor and used for the data oscillator, the second output current being the first positive current, and A first current is applied to the second resistor to provide a second output voltage for use in the reference oscillator of the ADC.

Description

Frequency ratio digitizing temperature sensor with linearity correction

1 is a block diagram conceptually illustrating a frequency ratio digitizing temperature sensor according to an embodiment of the present invention.

2 is a graph showing the bow linearity error of temperature measurements due to propagation delay through the current-frequency converter.

3 is a graph illustrating the linearity error of temperature dependent current.

4 is a block diagram conceptually illustrating an input generation circuit that implements a three-port linearity correction operation in the frequency ratio digitization temperature sensor shown in FIG. 1 in accordance with one embodiment of the present invention.

5 is a graph illustrating a temperature error that is the result of comparing a temperature output signal of a linearized temperature sensor to a temperature output signal of an uncorrected temperature sensor.

6 is a block diagram conceptually illustrating an input generation circuit of the frequency ratio digitizing temperature sensor shown in FIG. 1 according to an embodiment of the present invention.

FIG. 7 is a diagram illustrating the worst-case peak-to-peak temperature error shown as a function of gain count Nc in the interval of -25 degrees Celsius to 85 degrees Celsius, with correction factors kv and Kp being shown in FIGS. For the frequency ratio digitized temperature sensor shown, it is a graph showing the results simultaneously calculated for each value of Nc based on the result shown in FIG.

FIG. 8 is a graph illustrating the worst-case peak-to-peak change in reference frequency as a function of gain count Nc, with correction factors kv and Kp for the frequency ratio digitizing temperature sensor shown in FIGS. 9 is a graph showing the results of simultaneous calculation for each value of Nc based on the result shown in FIG.

FIG. 9 is a single temperature for example system represented by a polynomial approximation and solved using the constraints of Equations 11 and 14 for the frequency ratio digitizing temperature sensor of FIGS. 1 and 6. It is a graph illustrating the numerical value and offset adjust of the correction factors Kp and Kv at each target value.

FIG. 10 is a graph illustrating the digitized temperature error versus temperature for the frequency ratio digitized temperature sensor of FIGS. 1 and 6 implemented using a correction factor selected using FIGS. 7-9.

FIG. 11 is a graph illustrating a percentage change in reference frequency over temperature for a frequency ratio digitized temperature sensor according to the present invention implemented using a correction factor selected using FIGS. 7-9.

12 is a block diagram conceptually illustrating an input generation circuit implementing a two-port linearity correction function for the frequency ratio digitizing temperature sensor of FIG. 1 according to a third embodiment of the present invention.

FIG. 13 is a graph illustrating a temperature error comparing a temperature output signal of the linearized temperature sensor shown in FIG. 12 with a temperature output signal of an uncorrected temperature sensor.

FIG. 14 is a graph illustrating a change in a reference frequency in the frequency ratio digitizing temperature sensor shown in FIG. 12 comparing the result of applying the linearity correction function to the case where the linearity correction function is not applied to the reference frequency.

15A, 15B, 15C and 15D, which is a block diagram conceptually illustrating a current-frequency converter that may be used to implement an I / F converter in the frequency ratio digitizing temperature sensor of the present invention.

FIG. 16 is a block diagram conceptually illustrating an RFID temperature logger according to an embodiment of the present invention.

17 is a block diagram conceptually illustrating a temperature / voltage sensor block that may be integrated into the RFID temperature recorder of FIG. 16 in accordance with an embodiment of the present invention.

FIG. 18 is a circuit diagram of a battery voltage and PTAT current selection circuit that may be incorporated into the temperature / voltage sensor block of FIG. 17.

The present invention relates to a radio frequency identification device, and more particularly, to a radio frequency identification device incorporating a frequency ratio digitizing temperature sensor.

BACKGROUND OF THE INVENTION Frequency ratio digitizing temperature sensors that operate to measure temperature by changing the frequency of the oscillator are known. More generally, such temperature sensors are implemented to measure input signals that change with temperature using a frequency ratio analog-to-digital converter (ADC). In general, the frequency ratio digitizing temperature sensor includes two oscillators, a reference oscillator and a data oscillator. The reference oscillator defines a conversion interval, in which a fixed number of clock periods of the reference frequency is used to indicate the conversion period. The data frequency, the frequency of the data oscillator, varies with temperature and the ratio of the data frequency to the reference frequency produces the digital output signal of the temperature sensor.

In frequency ratio digitizing temperature sensors according to the prior art, the digital output signal has nonlinearity due to the non-ideal nature of the various components of the sensor circuit. For example, reference oscillators and data oscillators in frequency ratio digitizing temperature sensors are typically implemented using current-frequency converters (I / F converters). Propagation delays that pass through the oscillator cause distortion in the linearity of the frequency of the digital output signal. In addition, the currents that are generated to represent temperature measurements and / or generated to be used as reference currents may themselves exhibit nonlinear characteristics. The temperature coefficients of the resistors and capacitors that make up each oscillator may cause additional drift and nonlinearity to occur at the oscillator frequency as the temperature changes.

Some conventional solutions for correcting or minimizing such nonlinear errors make the corrected system no longer useful in typical applications. For example, some temperature-frequency-to-analog analog-to-digital converters (ADCs) use reference oscillators in which the reference frequency is intentionally varied widely with temperature. Typically, this type of frequency ratio analog-to-digital converter (ADC) uses a reference oscillator whose data frequency decreases as the temperature increases, while the data frequency remains relatively constant. As a result, the conversion time increases significantly with increasing temperature, which can be inconvenient if the desired application is an output stream of samples taken at fixed and stable intervals.

Temperature digitization Frequency ratio analog-to-digital converters (ADCs) are also designed and implemented using temperature compensated quartz oscillators as reference frequency generators. However, quartz oscillators are external components, and using these oscillators not only increases costs but also increases the circuit area required to implement a frequency ratio analog-to-digital converter (ADC).

In US Pat. No. 6,183,131, the digitizing temperature sensor implements linearity correction by adding a small percentage of the analog-to-digital converter (ADC) input (PTAT signal) to the (almost constant) analog-to-digital converter (ADC) reference signal. . In this way, it is found in the digitizing temperature sensor that the bow error is almost completely corrected, in particular, these errors are related to the temperature dependent operation of the voltage between base-emitter. However, the correction compensation technique described in US Pat. No. 6,183,131 can be applied only to a digital temperature sensor using an analog-to-digital converter (ADC) having a single input and a single reference port. This device does not apply to a frequency-to-analog analog-to-digital converter (ADC) because, in some cases, the frequency-to-analog analog-to-digital converter (ADC) has four spaced input ports, so that the signal input and reference port This is because performing the linearity compensation operation directly on is not applicable.

Radio Frequency Identification (RFID) refers to an automatic identification technique that uses radio frequency to automatically identify a person or object. Radio frequency identification (RFID) encompasses a wide range of identification methods, the most popular of which is the radix that stores a serial number on a microchip connected to an antenna that identifies a person or thing (or even other information). The microchip and antenna are collectively called a radio frequency identification (RFID) transponder or radio frequency identification (RFID) tag. The silicon chip and antenna work together to allow a radio frequency identification (RFID) tag to receive radio frequencies from a radio frequency identification (RFID) reader or transceiver and respond to these radio frequency queries. For example, the antenna allows the chip to transmit identification information to a radio frequency identification (RFID) reader. The reader converts the radio frequency reflected back from the radio frequency identification (RFID) tag into digital information, which can be transferred to a computer that can use the identification information.

The RFID tag may be passive, semi-passive (called semi-active), or active. Passive radio frequency identification (RFID) tags do not require a built-in power source, but instead draw power from the electromagnetic fields generated by the transceiver or reader and use this power to power the microchip's circuitry. Electromagnetic waves from a radio frequency identification (RFID) transceiver or reader induce a current in the antenna of the radio frequency identification (RFID) tag. The chip then modulates the signal and the modulated electromagnetic waves are returned to the transceiver by the antenna. The transceiver then converts the new electromagnetic waves into digital data.

Active RFID tags require an internal power source, such as a battery, which is used to power the microchip and generate output signals. Active radio frequency identification (RFID) tags are commonly called beacons because they can broadcast their own signals.

A semi-passive RFID tag is similar to a passive radio frequency identification (RFID) tag except that it uses a small battery to power the microchip circuit. Still, radio frequency identification (RFID) tags communicate by drawing power from a reader or transceiver. The battery allows the microchip of the radio frequency identification (RFID) tag to be continuously supplied with a constant power, and consequently need not be implemented to collect power from the received signal. Thus, the aerial may be optimized for backscattering signals. Semi-passive RFID tags have a faster response when compared to passive tags, and are therefore better in reading ratio.

One common application of RFID technology is used to track goods moving on the supply chain. Thus, radio frequency identification (RFID) tags are combined with sensors that detect and record temperature, movement, and even radiation. In this way, the same radio frequency identification (RFID) tags that can be used to track items used throughout the supply chain may not have been stored at the correct temperature, or which self may have injected a biological agent into the article. In this case, it can operate to warn the administrator.

The microchip of the RFID tag may be a device of the type of read-write, read only, write once, read many (WORM). With the read-write chip, information can be added to the tag or existing information can be replaced, in which case the identification serial number is not recommended. The radio frequency identification (RFID) tag may include additional storage blocks for storing information generated by the tag itself.

It is desirable to request an improved RFID tag having a temperature logging ability.

According to the principles of the present invention, a frequency ratio digitizing temperature sensor comprising a reference oscillator and a data oscillator adds a correction current to a temperature dependent reference current and uses the same copy as the corrected reference current to reference oscillator current input and data oscillator. Linearity correction is implemented by driving the resistors of the reference voltage input terminals. The resistor converts the current into a corrected reference voltage, which is inversely proportional to the frequency of the reference oscillator output. The correction current is a proportional to absolute temperature (PTAT) current and is obtained by selecting a replicated ratio of PTAT current applied from the temperature sensing current sources to the input generation circuit. As a result of using the corrected reference current to drive the reference oscillator, the reference frequency of the temperature sensor is intended to represent an error over temperature. As a result of using the corrected reference current to generate the voltage reference of the data oscillator, the frequency of the data oscillator is also intended to be derived to exhibit an inverse frequency error. Using this characteristic of frequency error has the effect of canceling the linearity error in the digital temperature output over temperature.

The frequency ratio digitizing temperature sensor according to the present invention realizes linearity error correction that cannot be achieved with conventional frequency ratio temperature sensors. In particular, the error sources associated with the temperature dependent current, the time delay in the current-frequency converter, and the temperature dependent operations of the resistor and the capacitor operate simultaneously, canceling out when a portion of the PTAT current is added to the reference current.

According to another aspect of the invention, a radio frequency identification (RFID) tag incorporates a frequency ratio digitizing temperature sensor to form a radio frequency identification (RFID) temperature recorder. Radio frequency identification (RFID) tags can be programmed to record temperature data for commands or at specific time intervals. In one embodiment of the invention, the radio frequency identification (RFID) tag is semi-passive, so that the temperature sensor and control circuit are powered by a battery. In another embodiment of the invention, the frequency ratio digitizing temperature sensor according to the invention is configured as a dual function temperature / voltage sensor, wherein the temperature sensor circuitry is used to alternately measure the battery voltage and the ambient temperature. In one embodiment of the present invention, the three-port linearity correction method is implemented in a frequency ratio digitizing temperature sensor, such that a stable reference clock is generated by the temperature sensor. The stable reference clock is used by the control circuitry of the radio frequency identification (RFID) tag for clock calibration, eliminating the need to use an external quartz oscillator. A radio frequency identification (RFID) tag incorporating a frequency ratio digitizing temperature sensor according to the present invention will be described in more detail below.

The frequency ratio digitizing temperature sensor includes a pair of I / F converters that implement a reference oscillator and a data oscillator. A pair of I / F converters, called a data I / F converter and a reference I / F converter, respectively receive two input signals (current and voltage) and generate a frequency output signal. Therefore, a pair of I / F converters use four input signals to generate two frequency output signals for computing the temperature being measured. In particular, the data I / F converter receives a temperature dependent input current Idata and a near temperature independent reference voltage Vdata. The current dependent input current Idata is a replica of the PTAT current IPTAT generated by the voltage difference of the base-emitter voltage Vbe of a pair of bipolar transistors in response to a temperature stimulus. The reference I / F converter receives a reference temperature Iref which is almost temperature independent and a reference voltage Vref which is almost temperature independent.

According to one aspect of the present invention, the frequency ratio digitizing temperature sensor of the present invention implements a two-port linearity correction method. In the two-port linearity correction method, two of the four input signals to the I / F converter converters are corrected by a correction current. In particular, a correction reference current is generated by adding a portion of the temperature dependent PTAT current to the first order temperature stable reference current. The same copies of the corrected reference currents are simultaneously applied to the reference I / F converters as the reference current, and also through the resistor to the data I / F converter as the reference voltage Vdata.

Applying two copies of the corrected reference current to the input signal of both the data and the reference I / F converter simultaneously modifies the transfer function of the frequency ratio analog-to-digital converter (ADC), thereby utilizing temperature sensors based on bipolar transistors. From the second order distortion inherent in the generated temperature dependent current, a second order distortion with a different sign can be generated in the ADC. As a result, the linearity error of the digitized temperature measurement is significantly reduced. In one embodiment, the linearity in the digital temperature measurement may be improved by at least 20 dB.

According to another aspect of the present invention, the frequency ratio digitizing temperature sensor of the present invention implements a three-port linearity correction method. In a three-port linearity correction method, three of the four input signals to the I / F converter are corrected by two separate correction currents. Only the temperature dependent input current Idata is the input signal which is left uncorrected. In the three-port linearity correction method, the first corrected reference current is applied to the reference current Iref of the reference I / F converter, and a copy of this corrected reference current is applied in the same manner as in the two-port linearity correction method. It is applied as the voltage Vdata at the resistance of the reference voltage input of the F converter. The three-port linearity correction method includes generating a second corrected reference current by adding a small percentage of the temperature dependent PTAT current to the primary temperature stable reference current. The ratio of PTAT currents used to generate the second corrected reference current is different from the ratio of PTAT currents used to generate the first corrected reference current, so the two corrected reference currents have different current values. The second corrected reference current is applied to the resistor to generate a reference voltage Vref for the reference I / F converter. In this way, the frequency drift of the reference I / F converter (functioning as a reference oscillator) is minimized while the digital temperature measurement of temperature is linearized as described above. In one embodiment of the invention, the three-port linearity correction method can improve linearity in the digital temperature measurement by 20 dB while maintaining the frequency stability of the reference clock at 0.06% p-p (peak-to-peak).

In the frequency ratio digitizing temperature sensor according to the present invention, by adjusting the digital values of the gain and the offset at the same time, the measurement accuracy can be further improved when the application requires absolute precision. Furthermore, in order to improve the performance of the frequency ratio digitizing temperature sensor according to the present invention, the data and reference oscillators represent I / F representing the sum of the transfer, logic, and switching time delays that remain constant even when the temperature and voltage source change. It can be implemented using a converter.

In one embodiment of the present invention, the PTAT current is multiplied by a correction factor and summed to the reference current, so that it is no longer temperature independent and has a positive slope of about 1.15% in the interval of -25 degrees Celsius to 85 degrees Celsius. Generated first and second reference currents. The correction factors are selected by mathematically solving the equations characterizing the digitized temperature sensor or using experimental measurements of the actual integrated circuit.

The frequency ratio digitized temperature sensor of which the linearity of the present invention is corrected is characterized in that the data frequency is increased with the temperature increasing in a substantially linear proportional to the absolute temperature (PTAT) while the reference frequency remains constant or relatively constant. Can be applied to the frequency ratio digitizing temperature sensor to be changed. The linearity correction method of the present invention cannot be applied to a digitization system in which the data frequency does not increase significantly with temperature.

The linearity corrected frequency ratio digitizing temperature sensor of the present invention provides various advantages over conventional temperature sensors. First, the linearity corrected temperature sensor according to the present invention can provide a temperature measurement result that is as good as or better than that of the temperature sensor using a crystal oscillator without using an external crystal oscillator component. Through this, the temperature sensor of the present invention reduces the manufacturing cost and the circuit area for implementation. Furthermore, when the three-port linearity correction method is applied, the temperature sensor of the present invention simultaneously provides a reference frequency with improved stability. The reference frequency may be used by circuits other than temperature sensors, which require a stable reference frequency. Thus, the temperature sensor of the present invention eliminates the need to use an external quartz oscillator or additional oscillator circuitry to provide this stable reference frequency.

1 is a block diagram conceptually illustrating a frequency ratio digitizing temperature sensor according to an embodiment of the present invention. Referring to FIG. 1, the frequency ratio digitizing temperature sensor 10 receives two temperature dependent currents from the temperature sensing circuit 20 as inputs. The temperature sensing circuit 20 may or may not be part of the frequency ratio digitizing temperature sensor 10. The exact implementation of the temperature sensing circuit 20 does not necessarily depend on the embodiment of the invention, but only two temperature dependent currents, one proportional and one complementary currents, for the temperature sensor. .

In FIG. 1, shown as two current sources, they provide node 22 with current IPTAT proportional to absolute temperature and node 24 with current ICTAT complementary to absolute temperature in response to the temperature stimulus. The temperature sensing circuit 20 shown in FIG. 1 is provided only symbolically, and is not intended to represent the actual configuration of the temperature sensing circuit. In general, two temperature dependent currents are generated using two bipolar transistors operating at unequal current densities. The voltage difference ΔV be, the voltage difference between the base-emitter of the two bipolar transistors, is a voltage proportional to the absolute temperature. The PTAT current can be generated from the DELTA Vbe voltage obtained by applying the DELTA Vbe voltage to the resistor (eg, resistor Rp). On the other hand, the Vbe voltage, the base-emitter voltage of one of the bipolar transistors, is a voltage complementary to absolute temperature. Therefore, the CTAT current can be generated from the Vbe voltage (typically from the larger of the transistor with the higher current density of the two Vbe voltages of) and apply this Vbe voltage to the resistor (e.g. Rc). Can be generated by

The frequency ratio digitization temperature sensor 10 may be formed using an input generation circuit 30 and a frequency ratio analog-to-digital converter (ADC). The input generation circuit 30 receives two temperature dependent currents IPTAT and ICTAT and generates the input signals necessary to drive the frequency ratio ADC. In the provided embodiment, the frequency ratio ADC includes a pair of current-frequency converters (I / F converters) 40, 50, a pair of counters 60, 70, and a subtraction circuit 80. The frequency ratio ADC provides the output signal ADCOUT as the temperature output signal of the frequency ratio digitization temperature sensor 10.

The I / F converter 40 receives the temperature dependent input current Idata (node 32) and the almost temperature independent reference voltage Vdata (node 34), and has a frequency output signal Fdata having a frequency representing the input current which is a PTAT current. Is a data I / F converter for generating node 44). The I / F converter 50 receives a nearly temperature independent reference current Iref (node 36) and a nearly temperature independent reference voltage Vref (node 38) and receives a frequency output signal Fref (node 54), which is the reference frequency of the temperature sensor. The reference I / F converter to generate. The reference frequency Fref defines a conversion period in which a fixed number of clock periods Nc of the reference frequency indicate the conversion period.

According to the present invention, the input generation circuit 30 generates a copy of the first corrected reference current used to generate the reference voltage Vdata (node 34) and the first corrected reference current used as the reference current Iref (node 36). Create Applying the first corrected reference current in this manner, the linearity error in the final temperature output signal of the temperature sensor is precisely corrected. Furthermore, according to another aspect of the present invention, the input generation circuit 30 generates a second corrected reference current that is used to generate the reference voltage Vref (node 38) for improving the stability of the reference frequency Fref. Specific implementation of the input generation circuit 30 will be described later in detail.

In the frequency ratio digitizing temperature sensor 10, a reference frequency Fref (node 54) is connected to a reference counter 70 for counting a fixed number Nc of clock periods of the reference frequency. Reference counter 70 generates output signal REF_COUNT at output 78, which represents a count Nc that defines the conversion period of the temperature sensor. The reference counter 70 receives the START_CONVERT signal and initiates each conversion cycle. When the fixed number Nc of the counts is reached, the reference counter 70 generates an overflow signal that functions as a CONVERT_DONE signal (node 66) indicating the end of each conversion cycle. If the reference counter 70 detects a count exceeding the number Nc, an overflow signal will be provided to indicate the end of the conversion period. The reference counter 70 also receives a gain adjustment input signal at the terminal 72 for digitally adjusting the gain of the frequency ratio digitizing temperature sensor 10. The gain adjustment input signal operates to increase or decrease the conversion period by increasing or decreasing the number Nc of the counts to adjust the gain of the temperature sensor system.

Data frequency Fdata (node 44) is coupled to a data counter 60 for counting the number of clock periods of the data frequency within the conversion period of the temperature sensor. The data counter 60 generates an output signal DATA_COUNT indicating the count of data frequencies in the conversion period in the output terminal 68. The data counter 60 receives the START_CONVERT signal (node 64) and initiates each conversion cycle. The data counter 60 also receives a CONVERT_DONE signal (node 66) from the reference counter 70 as a Halt signal. When the CONVERT_DONE signal is generated, the counting operation at the data counter 60 is stopped. Finally, data counter 60 receives an offset adjustment input signal for digitally adjusting the offset of frequency ratio digitizing temperature sensor 10 at terminal 62.

In the provided embodiment, the DATA_COUNT signal (node 68) and the REF_COUNT signal (node 78) are connected to the subtraction circuit 80, where the REF_COUNT signal is subtracted from the DATA_COUNT signal. The final ADCOUT signal on output terminal 82 may be provided as a digital temperature output signal and processed to provide a temperature output signal. Circuits and methods for processing ADCOUT signals are known and are not shown or described in detail herein. In one embodiment, the frequency ratio digitizing temperature sensor 10 is normalized by selecting a reference frequency and data frequency that are nominally mutually equal at 0 degrees Celsius. All inaccuracies in the actual temperature with Fdata = Fref can be corrected digitally by applying the appropriate digital value to the Offset_Adjust input (node 62). In this way, as a result of the subtraction operation, an ADCOUT signal representing the temperature measurement value in degrees Celsius nominally is obtained.

In general, the digitized output signal of the frequency ratio ADC (assuming the offset adjustment signal is 0) is given as in the following equation (1).

In Equation 1, Nc is a fixed number of clock periods of the reference clock and defines the conversion period. The frequency ratio digitizing temperature sensor 10 of the present invention can also be described using Equation 1 described above.

If Equation 1 assumes that the reference frequency Fref is an integer, the ratio Fdata / Fref can be understood to be any input signal value that has a range in which the output signal ADCOUT is greater than zero. Therefore, all positive output values of the frequency ratio ADC described by Equation 1 correspond to the magnitude of the input signal above a certain predetermined reference value. Therefore, the ADC measures the difference between a predetermined amount of reference value and input value. This frequency ratio ADC is particularly useful in diode-based temperature sensing ADCs because the input signal will not reach zero until it is close to about -273.15 degrees Celsius, which is typical operating temperature. Much lower than that. Therefore, the frequency ratio ADC can be normalized by selecting a nominal value for a reference value corresponding to 0 degrees Celsius detected. Once normalized in this way, a frequency ratio digitizing temperature sensor can be constructed in which the digital output signal is nominally representing a temperature in degrees Celsius.

In the provided embodiment, the frequency ratio digitizing temperature sensor 10 is further normalized by selecting a value of Nc so that if a 1 degree Celsius change occurs in the temperature sensing current sources, eight LSBs (least significant bits) are present in the digital output ADCOUT. May cause a change. In this manner, signed binary digital numbers in ADCOUT can be easily interpreted as temperature in degrees Celsius with an LSB weight of 0.125 degrees Celsius.

In the above description, oscillators in the frequency ratio digitizing temperature sensor are implemented using a current-frequency converter (I / F converter). Instead of using an oscillator sensitive to the applied current, oscillators in the frequency ratio digitizing temperature sensor can be implemented using voltage sensitive oscillators or using a voltage-frequency converter circuit (V / F converter). Due to the inherent power supply rejection capability of a temperature sensing circuit that generates a temperature dependent current, using I / F converters is preferable to using a V / F converter. However, the linearity correction method of the present invention can be equally applied to a frequency ratio digitized temperature sensor constructed using a V / F converter topology, as long as the input signal is properly varied from a current signal to a voltage signal. The frequency ratio digitizing temperature sensor can be implemented using a V / F converter topology while the data frequency Fdata increases with temperature and the reference frequency Fref is relatively constant. It can be implemented using a V / F converter topology as long as it is configured to increase with increasing reference voltage.

As stated above, the frequency ratio digitizing temperature sensor 10 of FIG. 1 implements the function of converting an input signal to frequency using two current-frequency (I / F) converters 40, 50. The structure and operation of one I / F converter are as described below. In the most general sense, an I / F converter includes a capacitor, a comparator, and a switching circuit. The I / F converter receives the input current Iin and the reference voltage Vref as input signals. The capacitor is charged by the input current Iin and leads to a ramp voltage which increases linearly on the capacitor. The ramp voltage at the capacitor is compared with the reference voltage Vref. When the ramp voltage exceeds the reference voltage Vref, a comparator output signal is provided, and the switching circuit is reset to discharge the capacitor, thereby resetting the voltage of the capacitor to zero and restarting the voltage ramp process. The time during which the comparator output signals are generated, respectively, defines the period of the output frequency Fout of the I / F converter. In an ideal system that is instantaneously reset, the output frequency Fout can be given by Equation 2 below.

In Equation 2, Iin denotes an input current in amperes, Cint denotes a capacitance of a built-in integrated capacitor in farads, and Vref is a reference voltage used in a comparator.

In practical circuits, there is a finite delay between the ramp voltage exceeding the reference voltage Vref and the initiation of another ramping cycle. For low power applications where the amount of power used in the comparator limits the speed of comparison, this delay can be large and contribute more to the linearity error of the output frequency signal. For an I / F converter that exhibits a delay time of t _d between the ramp voltage of a capacitor exceeding the reference voltage and the start of a subsequent ramp cycle, the output frequency can be given by Equation 3 below.

The presence of delay time t _d affects the offset and gain of the I / F converter transfer function, but these linear errors can be easily corrected in a typical system. Unfortunately, the presence of a delay causes the output frequency to increase more slowly at high frequencies, where the delay takes up a larger portion of the total period, so that a linearity error in the transfer function exists between Iin and Fout. the linearity error is caused by the size of t _d is increased, the value of t _d / t ratio to _ramp increases as where t is the _ramp time period of the ramp voltage. t _d / t _ramp ratio and linearity error, by increasing the time t _ramp (which requires smaller input current Iin, larger capacitance Cint, or larger reference voltage Vref), or delay time t It can be minimized by reducing _d .

2 is a graph showing bow linearity error of temperature measurements due to propagation delay through a current-frequency converter. In the example provided, the ramp time t _ramp is assumed to be 2 microseconds. Figure 2 illustrates the linearity error for the case where there is no delay, the ideal case is t _d = 0 and there are delays of 40 ns and 80 ns. As can be seen from the graph, when the delay time is 80 ns, a linearity error with 0.15% pp value in the output frequency is found, which corresponds approximately to 1/667. Systems with an 11-bit linearity requirement require fewer errors than pp linearity errors of 1 / (2 ¹¹ ) = 0.049%, which is approximately one third of the nonlinearity shown in FIG. do. Note that the induced linearity error is a convex "bow" curve.

The value of the linearity error shown in FIG. 2 nearly doubles when the delay time t _d is doubled. Thus, in order to construct a system with well-controlled linearity, by designing an I / F converter with a constant or nearly constant delay time, the linearity error of the I / F converter remains relatively fixed and thus fixed It is necessary to design to be correctable by the linearity correction method. Therefore, according to one aspect of the present invention, the frequency ratio digitizing temperature sensor preferably provides an I / F converter capable of minimizing changes in delay time t _d passing through the I / F converter by minimizing its delay time. It is preferably implemented using.

The "bow" shape linearity error caused by the delay time t _d of the I / F converter will linearize the I / F circuit which itself exhibits a concave "bowl" linearity error. Will be provided to contribute to the linearization. In general, the linearity correction method of the present invention does not attempt to obtain a significant linearity correction function of the bow linearity error due to the delay time t _d , and this phenomenon is related to the amount of correction required for the presence of the bow error in the digitizing temperature sensor system. This is true even if it decreases. Therefore, when designing a digitized temperature sensor, the parameter td is not changed in order to obtain the maximum linearity correction result. Rather, the linearity correction method of the present invention minimizes the delay time t _d in a range such that all changes in the delay time t _d according to time, temperature, and process dispersion are negligible in the voltage ramp time t _ramp. Assume Then, the linearity correction method of the present invention can provide an optimal linearity correction result in time, temperature, and circuit processing.

Note that the presence of the time delay term also affects the offset and slope of the output frequency of the I / F converter. However, slope and offset errors can be easily corrected in the digital domain by using offset and gain adjustment parameters.

3 is a graph illustrating the linearity error of temperature dependent currents generated by the temperature sensing circuit 20 shown in FIG. 1. As mentioned above, the temperature sensing circuit 20 generates PTAT current IPTAT and CTAT current ICTAT using two bipolar transistors operating at different current densities. Known diode equations show that the base-emitter voltage Vbe of a bipolar transistor decreases almost linearly with temperature and the difference ΔVbe between the base-emitter voltages of the two diodes at different current densities is applied at a temperature. Increase in a more linear manner. PTAT and CTAT currents combine to create a primary temperature independent reference current Inpo.

When the PTAT and CTAT currents are combined with a weight that can cancel the first slope error, the resulting “zero temperature coefficient” reference current Inpo still shows a linearity error, because of the CTAT current as shown in FIG. 3. This is due to the main bow component. The magnitude of this linearity error as shown in FIG. 3 is 0.35% p-p, which is approximately seven times larger than the worst case linearity error for the temperature sensor system of interest. The nonlinear nature of the temperature independent reference current Inpo of the digitizing temperature sensor is the most significant linearity degradation phenomenon in the frequency ratio digitizing temperature sensor.

4 is a block diagram conceptually illustrating an input generation circuit that implements a three-port linearity correction operation in the frequency ratio digitization temperature sensor shown in FIG. 1 in accordance with one embodiment of the present invention. In FIG. 4, the input generation circuit 100 includes a pair of linearity IDACs 110, 120 where digital values KP_ADJUST and KV_ADJUST are applied to set the magnitude of the component of the PTAT current. The input generation circuit 100 provides a stabilized reference frequency as well as linearizing the digital output signal of the frequency ratio digitizing temperature sensor 10 by providing a corrected pair of reference currents.

A unique feature of the input generation circuit 100 of the present invention is that the reference voltage and the reference current are not generated from the bandgap voltage. Instead, the reference current is generated and applied at the resistor to form a reference voltage, where the resistance of the resistor can vary significantly with temperature. A salient feature of the linearity method of the present invention is that it generates a reference voltage for the data I / F converter using a copy of the same reference current as the current input to the reference I / F converter.

Referring to FIG. 4, the input generation circuit 100 receives a PTAT current IPTAT (node 22) and a CTAT current ICTAT (node 24) from a temperature sensing circuit. The current IPTAT is mirrored by the buffer 146 as the Ip of the current and at the output node 132 as the temperature dependent input current Idata for the data I / F converter 40 in the digitizing temperature sensor 10 (see FIG. 1). Is provided.

The input generation circuit 100 includes a first summation circuit to generate a primary temperature independent current Inpo from the weighted sum of the currents IPTAT and ICTAT. In particular, the current IPTAT is connected to a buffer 102 in which the current multiplication factor knp is applied to the PTAT, and the current ICTAT is connected to a buffer 104 in which the current multiplication factor Knc is applied to the current CTAT. The currents generated by the buffers 102 and 104 are summed by the summer 106 to produce an Inpo current at the node 108. Inpo current is a combination of PTAT current component and CTAT current component and is nominally stable with temperature.

In input generation circuit 100, data linearity IDAC 110 is used to generate a first corrected reference current by summing a portion of a small amount of digitally programmable PTAT current to Inpo current. In particular, current IPTAT is mirrored by buffer 144 as current IPTAT1, which is coupled to buffer 114 in data linearity IDAC 110. The buffer 114 applies the current multiplication factor Kp to the current IPTAT1 as a correction factor to generate a fractional portion of the PTAT current as the correction current. The fractional portion of PTAT current from buffer 114 is summed by summer 116 to current Inpo mirrored by buffer 112 to produce output current In_1 at node 118. In_1 of current is mainly current Inpo, but by adding some small proportion of PTAT current, current In_1 is not entirely independent of temperature. In fact, the current In_1 is rather PTAT rather than temperature stable, and this property of current In_1 is used to correct the linearity error caused by the time delay in the I / F converter of the temperature sensor circuit.

The first correction reference current In_1 is mirrored by the buffer 119 as current In and provided to the output node 136 so that the reference current Iref of the reference I / F converter 50 in the digitizing temperature sensor 10 shown in FIG. 1. It is used as. A copy of the first correction reference current In_1 is also applied to the resistor Rdata, where the voltage difference applied to the resistor Rdata is the reference voltage Vd. The reference voltage Vd is provided to the output node 132 as the reference voltage Vdata of the data I / F converter 40 in the input generation circuit 100 of FIG. 1. In this way, identical copies of the first correction reference current In_1 are applied as the reference current for the reference oscillator of the frequency ratio digitizing temperature sensor and as the reference voltage for the data oscillator.

In particular, the input generation circuit 100 of the present invention is different from the conventional frequency ratio temperature sensor circuit, in which the reference voltages for two oscillators, Vdata and Vref, are the same voltage generated from the voltage reference circuit. . According to the invention, the reference voltage Vdata for the data oscillator and the reference voltage Vref for the reference oscillator are generated separately, so that these two voltages are separated from each other. The reference voltage Vref may exhibit a temperature-dependent change that increases less with temperature changes, while the reference voltage Vdata may exhibit a differently increasing property with respect to temperature.

In the input generation circuit 100, the reference linearity IDAC 120 is used to generate a second correction reference current by adding a small fraction of the PTAT current to the Inpo current. Some proportion of the PTAT current used to generate the second correction reference current is different from the ratio used to form the first correction reference current, which can be obtained using different correction factors or current multiplication factors. In particular, the current IPTAT mirrored by buffer 142 as IPTAT2 of current is coupled to buffer 122 in reference linearity IDAC 120. The buffer 122 generates a proportion of PTAT current as another correction current by applying the current multiplication factor Kv to the current IPTAT2. Some ratio of PTAT current from buffer 122 is added to current Inpo mirrored by buffer 124 using summer 126 to produce output current Ivr at node 128. The current Ivr is mainly a current Inpo, but by adding a small proportion of PTAT currents, the current Ivr has a somewhat PTAT property.

The second correction reference current Ivr is applied to the resistor Rref, where the voltage difference for that resistor is the reference voltage Vr. The reference voltage Vr is provided to the output node 138 as the reference voltage Vref of the reference I / F converter 50 in the digitizing temperature sensor 10 of FIG. 1. The temperature stabilized reference current is obtained by generating a reference voltage Vref for the reference oscillator using the second correction reference current Ivr.

In the input generation circuit 100 shown in FIG. 4, unit gain buffers such as buffers 112, 119, 124, 142, 144 and 146 are used for current replication, which are unit gain amplifiers or unit-sizes. Branch may be implemented in the form of a current mirror. Furthermore, unity gain buffers 112, 119, 124, 142, 144 and 146 are included when a current copy operation is needed to create a copy of the input current. The unity gain buffers can be cleared if current replication is not needed for the operation of the circuit. Techniques for generating a copy of the input current when needed using a unity gain buffer or unit size current mirror are known in the art. Furthermore, when actually implementing the input generation circuit of the present invention, it is understood that the current used for the output current or applied to the resistor may be the first generated current or may be a duplicate of the first generated current. In other words, using a replica of the first generated current or current at a given node is a mutually compatible technique and does not make a significant difference in implementing the present invention.

The method of inducing the current multiplication factors (correction factors) kv and Kp to generate the temperature independent current Inpo is the same as the conventional method. Current multiplication factors Kv and Kp may be derived mathematically as described below or may be obtained through experimental simulation or device characterization operations. If the multiplication factors Kv and Kp are derived mathematically or through simulation, it may be necessary to precisely adjust these values for actual implementation.

When the input generation circuit 100 shown in FIG. 4 is integrated into the temperature sensor of FIG. 1, a temperature sensor in which linearity and stability of the reference clock are corrected is implemented. The temperature sensor also operates to correct for linearity errors due to time delays in the oscillator. Operation characteristics of the digitizing temperature sensor 10 implemented using the input generation circuit 100 of FIG. 4 will be described below. In the case where the time delay in the comparators is negligible, the digital output signal ADCOUT of the temperature sensor can be obtained as Equation 4 below.

 Equation 4 can be simplified if equations such as Cdata = Cref = C, Rdata = Rref = R, In = In_1 and td_data = td_ref = td are satisfied. Note that the current Ip is equal to the PTAT current Idata. The simplified result of the digital output signal ADCOUT is shown in Equation 5 below.

When the delay time td is 0, equation (5) is further simplified to obtain equation (6).

If no linearity correction is applied to the temperature sensor (ie, kv = Kp = 0), a temperature independent current Inpo as shown in FIG. 3 is used to reference the reference voltages Vdata and Vref for both the reference and data oscillators. It is used to generate and also used as the reference current Iref of the reference oscillator. That is, In = Ivr = Inpo. As can be seen from Equation 6 above, the linearity of the current Inpo affects the denominator of the ADC transfer function. If PTAT current Ip is applied to the current input of the data I / F converter, its linearity affects the numerator of equation (6). Thus, the resulting ADC linearity error is an enlarged "bowl" caused by a bowl-type error of PTAT current that is summed up with an additional "bowl" error caused by the inverse of the CTAT "bow" error in the current Inpo. Type "error.

5 is a graph illustrating temperature errors obtained by comparing temperature output signals from a linearized temperature sensor to outputs of an uncorrected temperature sensor. Referring to FIG. 5, if the current Inpo is used directly as the input current to the reference I / F converter and also directly used to generate the reference voltages Vdata and Vref for both I / F converters, the resulting temperature measurement is shown in FIG. You will have a linearity error as shown by the "Amorphous" curve of. The pp error is 0.955%, which is equivalent to 1.05 degrees Celsius (pp) while the temperature varies from -25 degrees Celsius to 85 degrees Celsius, which is nearly 20 percent of the worst case of linearity error that can occur in a typical system. Big as a ship

However, if linearity correction is applied to the temperature sensor (ie, Kv and Kp are not zero), the linearity error of the digitizing temperature sensor is almost completely eliminated, as shown by the “correction” curve in FIG. 5. The linearity error observed in the correction curve shown in FIG. 5 can be ignored, thus ensuring that the precision of the temperature sensor reading is higher.

The input generation circuit 100 shown in FIG. 4 implements a three-port linearity correction method in which the reference frequency is stabilized with linearization of the digital temperature output. Reference frequency correction techniques are provided because of the non-ideal characteristics of the resistors and capacitors used to form the I / F converter. The operation of correcting the reference frequency in addition to the linearity correction of the digital temperature measurement using the 3-port linearity correction method according to the present invention is performed as follows.

Semiconductor integrated circuits typically made from typical and inexpensive CMOS processes do not have a resistance that provides sufficient stability to temperature. Even resistances made from thin films of nichrome or Sichrome show a nearly linear resistance change with temperature changes, in which case the increase is 100 ppm per degree Celsius. In the region of 100 degrees Celsius or more, the value of this resistance can be changed by 1%. If such a device is used to form a reference resistor Rref in an I / F converter, even a slight linear change in the resistance value of such a resistor Rref can cause the reference frequency to change along with the linear and nonlinear components. This is because the resistance value exists in the denominator of the reference frequency transfer function. First, the resistance of the reference resistance Rref can be expressed using a fixed resistance component and a component that varies with temperature given as follows.

Then, the output frequency Fref of the reference I / F converter having such a reference resistor is given by Equation 7 below.

Changing the capacitance value of the capacitor Cref in the I / F converter has a small effect on this reference frequency. That a change that affects the resistors Rref and Rdata equally, or a change that affects the capacitors Cref and Cdata equally, does not significantly affect the linearity of the digitized temperature measurement (see equation 6 above), Note that the reference clock frequency will change if the resistance of the resistor Rref or the capacitance of the capacitor Cref changes. In order to obtain an optimal stable reference clock frequency while minimizing temperature linearity error when the resistor Rref or capacitor Cref each shows only a very small change over the temperature region of interest, one of the input signals to the reference I / F converter is seen. As part of the linearity correction method of the invention.

In particular, the three-port linearity correction method illustrated in FIG. 4 includes generating a second correction reference current that is used to generate the reference voltage Vref. In this way, the stability of the reference frequency is improved at the same time as the linearity correction technique is applied to the digital temperature measurement through the first correction reference current.

The correction method provided by the input generation circuit 100 shown in FIG. 4 includes forming two correction reference currents, In (or IN_1) and Ivr, in which a small proportion of the PTAT current is current. It is added to Inpo to form a current In, and another small ratio of PTAT current is added to the current Inpo to form a current Ivr. The two correction reference currents can be expressed as follows.

If the above equation is substituted into the above-described equation (5), and again assumes that the delay time td is 0, a simplified form of the digital output signal ADCOUT is given by the following equation (8).

Two small constants, Kp and kv, should be chosen to reduce the linearity error of the temperature sensor system and also to minimize disturbance to the reference clock frequency. To implement the three-port linearity correction method of the present invention, it is necessary to minimize the linearity and precision errors of the overall system by determining a suitable set of parameters of the temperature sensor. The process of mathematically determining these parameters Kp, Kv and Nc and applying the determined solution to the system is described below.

Derivation of Kp, Kv and Nc parameters will be better explained using an input generation circuit with normalized current values. 6 is a schematic diagram of an input generation circuit of the frequency ratio digitizing temperature sensor of FIG. 1 in accordance with a second embodiment of the present invention. Referring to FIG. 6, the input generation circuit 200 is configured in the same manner as the input generation circuit 100 of FIG. 4 except for the current product factors applied to the linear IDAC circuit. In FIG. 6, the first and second positive currents are normalized to maintain a constant total current magnitude for each current across the temperature sensor. That is, in the input generation circuit 100, a certain ratio of Kp * IPTAT current is added to the current Inpo, so that the correction reference current In_1 will necessarily have an increased current magnitude. The same principle applies to the correction reference current Ivr. In some applications, this increased current magnitude may not be desirable. In such a case, the input generation circuit 200 of FIG. 6 is used to ensure that the reference currents remain constant throughout the temperature sensor system.

The input generation circuit 200 includes a data linear IDAC 210 that provides a first normalized reference current In_1 and a reference linear IDAC 220 that provides a second normalized reference current Ivr. In the data linear IDAC 210, the buffer 214 applies a current multiplication factor Kp to the PTAT current IPTAT1, producing a 1PTAT current of the first rate. The buffer 212 applies a current multiplication factor 1-Kp to a temperature-independent current Inpo to provide an INPO current reduced in size by about Kp. Output currents from buffers 212 and 214 are summed in summer 216 to produce a first positive reference current In_1 at node 218, where current In_1 has a final current magnitude equal to current Inpo. The current In_1 is then used to generate the reference voltage Vdata of the data oscillator and used as the input current Iref of the reference oscillator, in the same manner as described above.

In the reference linear IDAC 220, the buffer 222 applies a current multiplication factor Kv to the PTAT current IPTAT2 to produce a second rate of PTAT current. The buffer 222 applies a current multiplication factor of 1-Kv to the temperature-independent current Inpo to provide INPO current reduced in size by about Kv. Output currents from buffers 222 and 224 are added at summer 226 to produce a second positive reference current Ivr at node 228, where current Ivr has a final current magnitude equal to current Inpo. The current Ivr is then used to generate the reference voltage Vref of the reference oscillator, in the same manner as described above.

Now, the determination of Kp, Kv and Nc parameters will be described. The three-port linear correction method for the frequency ratio digitizing temperature sensor of the present invention provides a more stable reference clock frequency, but differs from the temperature coefficient of the correction current used as the current Iref by supplying the correction current to the resistor Rref and used to generate the voltage Vdata. By generating a voltage Vref with a different temperature coefficient, linearization errors of temperature digitization can be minimized. In order to minimize fluctuations in the reference frequency, it is desirable to offset the correction current for the reference oscillator as much as possible due to variations in capacitance and resistance.

First, a normalization function is given, including the primary and secondary temperature effects on the resistance Rref and capacitance Cref of the reference oscillator:

The two normalization functions of Equations 9 and 10 multiply each other to form Rn (T) Cn (T). Next, when the ratio of the first constant current In to the second constant current Ivr is set equal to the normalized RnCn function, the most stable reference frequency can be obtained. Thus, the primary design constraints of the three-port linear correction method are given as follows:

The ratiometric constraints defined in Eq. (11) can be summarized in other forms:

Now, Equation 5, which represents the transfer function of the digital output signal ADCOUT of the digitized temperature sensor, is used to derive the secondary constraint. For digitized temperature sensors, it is desirable that the digital output signal ADCOUT be a linear function defined as a certain gain constant times T for any desired temperature range T. For the purposes of this discussion, a gain constant "a" with a value divided by Nc is assumed. When offset errors are ignored because they do not affect linearity, the desired linear equation can be described for the range of temperature T as follows:

Equation 13 can be rewritten and simplified to form a general secondary constraint that linearizes the frequency ratio digitization temperature sensor over the T temperature range using a three port linearity correction method. Secondary design constraints are represented as follows:

Thus, depending on the proper selection of the PTAT current IP to reference current In ratio, used as both the reference voltage Vdata and the reference current Iref, the linearity of the digitized temperature sensor can be optimized. The choice of the optimum ratio in the general case now depends in part on the ratio of the delay time to the equivalent RC product in the data I / F converter. The optimal choice of current ratio will also be different for each selection of gain parameter a. The Ivr / In ratio is previously determined by the equation for the primary constraint.

The two constraints discussed above will now be used to define the best choice of gain adjustment parameters Nc and Offset for a typical temperature sensor system as well as Kv and Kp correction parameters. To simplify the mathematical calculation, the normalized input generation circuit of FIG. 6 will be used. The first constraint requires a current ratio Ivr / In, defined in Equation 12 above, repeated again below:

Equations in the form of normalized polynomials can be obtained by fitting curves to measured or simulated values of R and C normalized over the temperature range at hand. To use the equation that defines the secondary constraint to linearize the system, we need to find the unknown primary constraint, which is the current In, which is given by:

Equation 16 is a recursive function of In, but the Ivr / In ratio may be determined as an approximate polynomial form from Equation 15 of the first constraint. By substituting equation (5) into equation (16), the variable In disappears in the right term of equation (16). This substitution makes Eq. 16 a solution of In. In Equation 16, T is a temperature variable expressed in degrees Celsius. It should be noted that in Equation 16 above, all four terms are functions of the temperature T. The current Ip is the PTAT current, which can be described by curves of the polynomial of the current over temperature T with measurements of the current IP taken at different temperatures. Resistor R is a function of temperature T as the resistance of resistor Rref used for reference voltage input to the reference I / F converter. Capacitance C is the capacitance of the integral capacitor Cref of the reference I / F converter and is a function of temperature T. Td is the delay time constant inside the data or reference I / F converter. Finally, the gain parameter "a" is selected to renormalize the output range after the linearization operation.

In the present example, the renormalization gain adjustment is implemented digitally by adjusting the number of reference periods Nc per conversion. In one embodiment, it is convenient to normalize the output data such that 8 LSBs are 1 degree Celsius. Thus, the gain parameter "a" is defined as follows:

Combining equations (16) and (17) can yield:

If Ip, R (T) and C (T) parameters in Equation 18 above are replaced by polynomials that fit their curves, then In is a function of the variable T over the temperature range and also a function of the gain count parameter Nc. An approximate polynomial of can be obtained.

In the implementation of the linear correction of the present invention, the goal is to find a predetermined amount of excess PTAT current to be added to the temperature independent Inpo, which will form the current In so that the temperature output signal is linearized. To simplify this equation, it is assumed that Inpo, Ip, R (T), and C (T) values are all normalized functions that yield unity at T = 0 ° C. To make the normalized correction current In, it is necessary to reduce the constant Inpo component when increasing the PTAT component by Kp, as shown in Figure 6 and Equation 19 below:

의 해를 구하면 다음과 같다:In Equation 19 above

The solution to is:

Similarly, the solution of normalized correction current Ivr is as follows:

The correction current Ivr can be found in the approximate polynomial from the polynomials of In, R (T) and C (t). In addition, the correction current can be implemented by adding a small proportion of PTAT current to the Inpo current to obtain the desired normalized correction current Ivr:

Approximate polynomials of currents Inpo and Ip are determined by estimating the current over temperature, so that polynomials representing currents In and Ivr can be determined mathematically from approximate polynomials of currents Inpo and Ip. If these polynomials are substituted in the equation and quantified at known temperature T and gain count Nc, then a simultaneous Kp and Kv estimate can be obtained at the values of each temperature and gain count Nc pair. From the Kp and Kv values, the approximate currents Ivr 'and In' can be determined and the resulting linearity error and reference clock deviation of the temperature sensor can be calculated or physically measured over temperature.

One convenient way to determine the best set of Kp, Kv, Nv and Offset Adjust values is to use the above equations to calculate the estimates of Kp and Kv at each target value of Nc simultaneously, and then When these estimates are used, it is to review the resulting linearity and offset seen by the temperature sensor over the temperature range in question. Linearity error and required offset correction are usually obtained through the use of the ADCOUT transfer function equations and direct computer estimates of polynomials that represent currents being replaced in a suitable I / F converter.

7-10 illustrate the evaluation of various system characteristics at each value of gain count Nc of the digitizing temperature sensor of FIG. 1, including the input generation circuit of FIG. FIG. 7 is a graph showing peak-to-peak linearity temperature error, expressed in degrees Celsius C, as a function of gain count Nc for the frequency ratio digitized temperature sensor of FIGS. 1 and 6. FIG. 8 is a graph showing the reference frequency change as a function of gain count Nc for the frequency ratio digitizing temperature sensor of FIGS. 1 and 6. 9 is a graph showing the correction factors Kp, Kv and offset adjust values as a function of gain count Nc for the frequency ratio digitized temperature sensor of FIGS. 1 and 6. FIG. 10 is a graph showing digitization temperature error versus temperature in the frequency ratio digitizing temperature sensor of FIGS. 1 and 6 implemented using correction factors selected using FIGS. 7-9.

As can be seen in FIG. 7, there is a system linear error minimum at one optimal Nc value that produces simultaneous optimal estimates of Kp, Kv and Offset Adjust. The peak-to-peak stability of the reference clock frequency is not significantly changed as Nc changes through simultaneous change of Kv and Kp as shown in FIG. The calculated target values of Kp, Kv and Offset Adjust (Offset Adjust values are shown as a percentage of the full-scale range) are shown in FIG. 9 as a function of Nc. By selecting the Kv, Kp, Nc and Offset Adjust values (i.e., the values in the dashed box) at the Nc values causing the minimum temperature error, as shown in FIG. A temperature sensor with a temperature error of less than -0.05 ° C can be obtained.

FIG. 11 is a graph showing the percentage of change in reference frequency to temperature in the frequency ratio digitizing temperature sensor of FIGS. 1 and 6 implemented using correction factors selected using FIGS. 7-9. As can be seen in FIG. 11, the peak to peak frequency error of the reference frequency over the range from -25 to 85 ° C. is only about 0.06%.

In the above description, the frequency ratio digitizing temperature sensor has been described as implementing a three-port linearity correction method. In some applications, the stability of the reference frequency is not very important. If the application utilizing the digitizing temperature sensor of the present invention can tolerate moderate fluctuations in the reference frequency, such as a peak-to-peak fluctuation of about 1.25%, a two-port linearity correction method can be applied. In the two-port linearity correction method, only one correction reference current is generated and the reference frequency remains uncorrected. Therefore, the two-port linearity correction method is simpler in implementation than the three-port linearity correction method, and thus may be advantageously applied to certain applications.

12 is a schematic diagram of an input generation circuit implementing the two-port linearity correction method of the frequency ratio digitizing temperature sensor of FIG. 1 according to a third embodiment of the present invention. Referring to FIG. 12, the input generation circuit 300 is constructed in the same manner as the input generation circuit 100 of FIG. 4 except that the reference linearity IDAC is omitted. Therefore, in the two-port linearity correction method, the corrected reference current In_1 (node 318) generated by adding the current Inpo (node 308) and the PTAT current IPTAT1 345 of Kp ratio is the reference current Iref of the reference oscillator and the reference of the data oscillator. It is used simultaneously to change the voltage Vdata. More specifically, the corrected reference current In_1 is mirrored by the buffer 319 to become the current In used as the input reference current Iref (node 336) of the reference oscillator. The corrected reference current In_1 is applied to the resistance Rdata to generate the reference voltage Vdata (node 334) of the data oscillator.

However, the reference voltage Vref (node 338) of the reference oscillator is generated by directly applying a temperature-independent current Inpo to the reference resistor Rref. Therefore, in the two-port linearity correction method, only correction factor Kp is required, and correction factor Kv is not required.

In the input generation circuit 300 of FIG. 12, the corrected reference current In is now given as follows:

.

.

Given that the time delay td in the I / F converters is negligible, the transfer function of the digital output signal ADCOUT is given by:

The linearity of the transfer function in equation (24) can now be tuned by adjusting the single constant Kp value. Increasing Kp results in a transfer function with large linearity deflection, which cancels out the inherent "bowl" shape error of the uncorrected system. The degree of bow correction obtained using the two port linearity correction method is much greater than using the three port linearity correction method. In one embodiment, the correction factors applied using the three port linearity correction method are Kp = 0.14193, Kv = 0.1833, Nc = 2630 and Offset ~ 0 LSBs. To obtain the same linearity correction result using the two-port linearity correction method, the correction factors applied are Kp = 0.0475, Kv = 0, Nc = 2613 and Offset ~ 0 LSBs. In the same linearity correction results, it can be seen that a smaller Kp value is required in the two-port linearity correction method than in the three-port method, which means that less PTAT current must be added to the Inpo current to linearize the digital temperature measurement. Means required. In fact, based on the simulation results, the two point linearity correction method yields a slightly better result of 0.0847 ° C. p-p error versus 0.089 ° C. p-p compared to the three port linearity correction method.

FIG. 13 is a graph showing temperature errors of temperature output signals from the linearized temperature sensor of FIG. 12 compared to an uncorrected temperature sensor. As can be seen in FIG. 13, the bowl-shaped linearity error is corrected by the application of the correction factor Kp, and the resulting digital temperature output values have a peak-to-peak error of 0.0847 ° C.

FIG. 14 is a graph showing the change in the reference frequency of the frequency ratio digitized temperature sensor of FIG. 12 when linear correction is applied, compared to when no linear correction is applied for the reference frequency. In the input generation circuit of Fig. 12, the reference frequency is not stabilized. Thus, when no linear correction is applied ("No_Correction), the reference frequency is stable. However, when linearity correction is applied through the use of the correction factor Kp (" Using Correction "), the reference frequency is for -25 to 85 ° C. Fluctuates to about 1.25% peak to peak level.

15 collectively including FIGS. 15A, 15B, 15C, and 15D views for a current-frequency (I / F) converter that may be used to implement I / F converters in the frequency ratio digitized temperature sensor of the present invention. Schematic diagram. Any I / F converters existing or in the future may be used in the frequency ratio digitizing temperature sensor of the present invention, but the particular advantage of using the I / F converter of FIG. 15 to implement data and reference I / F converters. Will bring. Specifically, the I / F converter 500 of FIG. 15 ensures a constant sum of propagation, logic, and switching time delays over temperature, fabrication process, and power supply variations. In addition, the I / F converter delay time is minimized, so the delay variation is also minimized. Finally, the sum of the I / F converter delays is implemented according to how the temperature performance of the input current Ibias controls the delays. Such delays can be arranged for optimal performance over temperature by removing the temperature coefficient of the current Ibias applied to the I / F converter.

Referring to FIG. 15D, the I / F converter 500 receives an input current Iin and an input reference voltage Vref and provides a clk_out signal as a frequency output signal. When applied to the temperature sensor of FIG. 1, the input current Iin becomes the input current Idata or becomes the reference current Iref, and the input reference voltage becomes the reference voltage Vdatark or the reference voltage Vref accordingly. The clk_out signal is either an Fdata output signal or a Fref output signal accordingly. The I / F converter 500 further receives the bias currents Ibias and reset_lo signals that are input currents.

Referring to FIG. 15, the I / F converter 500 includes a D flip-flop I11 for controlling charging of two capacitor arrays I21 and I22. D flip-flop D11 operates to alternatively apply input current Iin to charge one of its capacitor arrays. For example, the D flip-flop I11 asserts the control signal "dswitch" to apply the input current to the upper capacitor array I21 and charge the voltage at node "dintcap". The upper capacitor array I21 is charged until the voltage at the node dintcap reaches the input reference voltage Vref_in level, allowing the upper comparator 502 to claim its output signal. Now, D flip-flop I11 asserts control signal dswitch2, allowing input current to be applied to lower capacitor array I22 and charging the voltage at node dintcap2. The lower capacitor array I22 is charged until the input reference voltage Vref_in level of the voltage at node dintcap2 is reached, so that the lower comparator 504 can claim its output signal. The output signals " bufdout " and " 2bufdout " are connected to logic gates driving D flip-flop I11 to reset and clock the D flip-flop.

Comparators 502 and 504 can be implemented in a conventional manner. In one embodiment, the comparator includes a capacitor that can be tuned for a constant delay. In addition, the capacitor establishes a chopping scheme such that any offset voltage errors in the comparator are reversed every other comparison cycle every one of the sinusoids. In this way, the average delay time of the comparator and the entire I / F converter is not sensitive to supply voltage or temperature variations.

The temperature coefficient of the bias current Ibias to the I / F converter 500 can be arranged such that the delay times of the comparators are very constant. The bias current Ibias is connected to a current mirror which provides a mirror voltage drive to current source devices in comparators 502 and 504.

The switches (transistors M12, M0) which direct the input current Iin to one of the two charging capacitors I21 and I22 are implemented as current switches, not voltage switches. Therefore, these switches act like a differential pair given the input current Iin. The input current Iin is steered to the path whose gate drive voltage is close to ground. Now, in the selected capacitor array, the control device (switch M12 or M0) acts like a grounded gate cascade, isolating the input current source Iin from the glitches generated by the comparator and providing the input current Iin. Provide a constant voltage at the source (eg, a PMOS gate-to-source Vgs voltage above ground).

Devices M3 and M1 are used to first offset the excess charge introduced at the moment of switching, where the charge of introduction is dependent on the temperature and the supply voltage. The remaining logic circuits provide a known state upon reset.

In one embodiment, to enable the I / F converter 500 to operate at extremely low power supply voltages (such as below 1.1 volts), a low threshold voltage transistor device (denoted as "Low_Vt" in Figure 15) is Used to enable low supply voltage operation where appropriate.

RFID temperature Logger (logger)

Those of ordinary skill in the art having knowledge of the present disclosure will appreciate that the frequency ratio digitizing temperature sensor of the present invention has several applications in the electronics field. According to one aspect of the present invention, the frequency ratio digitizing temperature sensor of the present invention is incorporated into a radio frequency identification (RFID) transponder or tag to implement a temperature logging function within an RFID tag. The resulting RFID tag, also called an RFID temperature logger, operates to measure and store ambient temperature values, and the measurement interval can be programmed in advance or as needed. Temperature measurements can be stored in an RFID temperature logger and read whenever needed. In this way, an RFID tag that includes a temperature measuring function is realized.

In one embodiment, the RFID temperature logger is implemented as a semi-passive RFID tag. When a semi-passive RFID tag, some circuitry of the RFID tag is powered by a battery outside the RFID tag. The semi-passive RFID tag includes an RF communication block, a control logic block, and a sensor block incorporating the frequency ratio digitizing temperature sensor of the present invention. In this embodiment, the control logic block and sensor block are powered by a battery, while the RF communication block is self-powered from an incident RF signal. According to one aspect of the invention, the sensor block is set as a dual function temperature / voltage sensor for measuring both ambient temperature and battery voltage.

In another embodiment, a three-port linearity correction method is utilized within the frequency ratio digitization temperature sensor, such that the sensor block provides a stable reference clock that can be used to calibrate the real time clock of the control logic block. This will be explained in more detail.

16 is a schematic diagram of an RFID temperature logger in accordance with an embodiment of the present invention. Referring to FIG. 16, the RFID temperature logger 600 includes an RF communication block 602, a control logic block 604 and a temperature / voltage sensor block 606 (hereinafter referred to as a “sensor block”). The RFID temperature logger 600 is semi-passive and connected to an external battery 620 to receive power to supply control logic block 604 and parser block 606. The battery 620 is connected across the BAT terminal and the ground terminal of the temperature logger 600 to supply the battery voltage V _BAT to the control logic and sensor blocks.

RFID temperature logger 600 also includes crystal pins, XCKI and XCK0, to which crystal oscillator 610 may be connected. Crystal oscillator 610 supplies a reference frequency for control logic block 604. The crystal oscillator 610 is optional and can be removed from the temperature logger 600 because the sensor block 606 can supply a stable reference frequency, which will be described in more detail below.

In this embodiment, the RF communication block 602 is connected to the first RF port RF1 and the second RF port RF2 to receive an incident RF signal detected through an antenna (not shown). The RF communication block 602 communicates with the control block 604 via the bus 612 to read and write data stored in the control logic block 604 as commanded by the incident RF signals. The RF communication block 602 also communicates with the sensor block 606 via the bus 622. The sensor block 606 communicates with the control logic block 604 via the bus 614. The control logic block 604 provides control signals to cause temperature or voltage measurement functions to occur in the sensor block 606, and the sensor block 606 provides the measured temperature or voltage data to be stored in the control logic block 604.

According to one aspect of the invention, the sensor block 606 also provides a stable reference clock to the control logic block via the bus 618, where the stable reference clock is used to calibrate the real time clock in the control logic block. . In this manner, no external crystal oscillator is required for the RFID temperature logger 600 operation. According to another aspect of the invention, the control logic block 604 supplies a power_save signal via the bus 616 to the sensor block 606, causing the sensor block 606 to power off for power conservation, thereby This will be explained in more detail below.

In one embodiment, the RF communication block 602 is implemented as an RFID communication core in accordance with EPC Class 0+ for supporting RF communication via the first and second RF ports, RF1 and RF2. The RF communication block 602 includes embedded state machines to implement communication to / from the sensor block 606 as well as to / from the control logic block 604. In one embodiment, sensor data provided by sensor block 606 and instructions and instructions to be given to sensor block 606 are transmitted over a wireless RF link and received and detected by RF communication block 602. Data and instructions intended for sensor block 606 pass over bus 622 to / from sensor block 606.

In one embodiment, the wireless RF link is at a 900 MHz frequency and supports data rates from 16 KBps to 80 KBps. Forward link communication from the RFID reader to the RFID temperature logger 600 is open for magnitude modulated RF of modulation depth between 30% and 100%. Backlink communication from the RFId temperature logger 600 to the RFID reader is open to the passive backscatter. As described above, the RFID communication block 602 does not receive battery power but instead is powered via incident RF on the antenna.

The control logic block 604 includes registers and memory for storing instructions received from the RF communication block 302 and for storing temperature or voltage data provided by the sensor block 606. The control logic block 604 operates to control the operation of the RFID tag 600. The control logic block 604 receives battery power from the external battery 620. In this example, control logic block 604 includes a pair of input terminals Clock_In for receiving an input clock signal from external crystal oscillator 60. The input clock signal causes the control logic to synchronize its real time clock. However, the Clock_In terminals and external crystal oscillator 610 are optional and may be omitted in other embodiments of the present invention. In particular, the crystal oscillator 610 is not needed when the sensor block 606 provides a stable reference clock over the bus 618.

In one embodiment, the control logic block 604 operates to direct or cause temperature measurements by the sensor block 606. The temperature measurement may include user selected intervals from 1 second to 8 hours. Initiation of temperature logging can occur when power is supplied only at a high or low temperature trip point or after a predetermined delay time. Further, in one embodiment, the control logic block 604 includes a memory for storing up to 4000 temperature measurements with 8 bits per sample. The control logic block can also be programmed to record the minimum and maximum temperatures measured during each metering session and to provide a warning signal if the temperature measurements exceed certain preprogrammed levels.

The control logic block 604 also controls the sensor block 606 to measure battery voltage and conserve battery power. When sensor block 606 is not bringing temperature measurements, control logic block 604 commands sensor block 606 to power down to conserve battery power. The control logic block 604 also wakes up the sensor block 606 during the measurement session. Upon completion of the measurement session, control logic block 604 turns off its internal clock signal, bringing down power to sensor block 606 and its internal circuitry. In one embodiment, when no measurements are given, the control logic block 604 powers off both the sensor block and its circuit except the data memory. In this way, power consumption can be reduced to a minimum level and battery life can be longer.

In this embodiment, the sensor block 606 measures the battery voltage V _BAT and the ambient temperature. From the battery voltage measurements provided by the sensor block 606, the control logic block 604 can determine whether the battery power is low. If the battery power is low, the control logic block 604 applies a power_save command over the bus 616 to power down the sensor block 606 so that the remaining battery power can be conserved. In one embodiment, the power_save command causes battery power to be separated from the sensor block 606 so that no more battery power is consumed. In another embodiment, when the battery power is at the threshold level, the control logic block 604 and the sensor block 606 are powered down except for the data memory so that the remaining battery power maintains the data memory to preserve measurement data. Will be used to

For example, as shown in FIG. 17, battery voltage V _BAT is connected to power supply voltage Vdd node 680 for temperature / voltage sensor block 606 through switch S2. The power supply voltage Vdd 680 represents the power supply voltage that is connected to power the circuit in the sensor block. The switch S2 is controlled by the power_save signal. If a power_save signal is given to indicate that the battery power state is good, the switch S2 is closed to allow battery power to be connected to the power supply voltage node 680 of the sensor block 606. When the power_save signal is given to indicate that the battery power state is low, switch S2 is opened to separate the battery voltage from the sensor block.

The temperature / voltage sensor block 606 will now be described in more detail. 17 is a schematic diagram of a temperature / voltage sensor block that may be incorporated into the RFID temperature logger of FIG. 16 in accordance with an embodiment of the present invention. In FIG. 17, sensor block 606 is set to measure ambient temperature and battery voltage V _BAT . The sensor block 606 is powered through an external battery 620. In one embodiment, sensor block 606 is designed to be driven from a 1.55V silver oxide coin cell battery, and precise temperature and voltage measurements over -25 ° C to 85 ° C even when the battery is discharged below 1.1 volts. Function to feed them.

The temperature / voltage sensor block 606 implements the frequency ratio digitizing temperature sensor structure described above with reference to FIGS. 1-15. However, in accordance with the present invention, sensor block 606 is configured to measure both temperature and voltage using the same digitization circuit. To implement the temperature measurement function, sensor block 606 includes a temperature sensor 625 to supply PTAT current (IPTAT) and CTAT current (ICTAT) to the temperature digitization circuit as described above with reference to FIG. 1. The CTAT current ICTAT is given to the ICTAT_IN input terminal of the input generation circuit 630 and the PTAT current IPTAT is given to the IPTAT_IN input terminal of the input generation circuit 630.

To implement the voltage metering operation, sensor block 606 uses a resistor divider that includes resistors R1 and R2. The resistor divider is connected to the battery voltage terminal BAT and the ground potential to accommodate the battery voltage V _BAT . A current IBAT indicating the battery voltage is given to node 618. The resistance value of the resistors R1 and R2 is selected according to the current IBAT setting with the desired slope. The current IBAT is provided to the switch S1 which is switchably connected to the frequency ratio digitization circuit of the sensor block 606, a description of which will be described in detail below.

The frequency ratio digitization circuit of the sensor block 606 is implemented in the same manner as described above with reference to FIGS. 1-15. Specifically, the digitization circuit includes an input generation circuit 630 and a frequency ratio analog-to-digital converter (ADC). The input generation circuit 630 receives two temperature dependent currents IPTAT and ICTAT. The input generation circuit 630 generates IDATA, VDATA, IREF and VREF, which are input signals required to drive the frequency ratio ADC. The operation of the input generation circuit 630 for generating the current and voltage signals IDATA, VDATA, IREF and VREF is the same as described above with reference to FIGS. 1-15. In this embodiment, the frequency ratio ADC includes current-frequency (I / F) converters 640 and counters and subtraction circuits 660. Counters and subtraction circuit 660 receive offset adjustment and gain adjustment signals from the control logic block. The frequency ratio ADC provides the output signal ADCOUT as the measurement output signal of the frequency ratio digitization circuit.

The IDATA signal given to the I / F converters 640 represents a data signal to be digitized into the measurement output signal ADCOUT. Thus, given a temperature measurement, the signal IDATA is the temperature dependent PTAT current IPTAT. When the battery voltage measurement is to be given, the signal IDATA is the voltage dependent current IBAT. According to the dual function temperature / voltage measurement scheme of the present invention, the voltage dependent current IBAT and the temperature dependent current IPTAT are connected to the switch S1 and alternately connected to the frequency ratio ADC. The switch S1 receives the selection signal given by the control logic block 604 via the bus 614, connecting either current IPTAT or current IBAT to the I / F converters 640 as signal IDATA for digital conversion. Choose to In this way, the digitization circuit of sensor block 606 provides an ADCOUT signal that points to either a temperature measurement or a voltage measurement that is connected to the I / F converters as an IDATA signal.

With the measured battery voltage values, control logic block 604 can determine whether there is enough battery power to continue the temperature measurement operation. In one embodiment, sensor block 606 only operates when the battery voltage is greater than 1.1 volts. Thus, when the battery voltage measurement given by sensor block 606 indicates that the battery voltage is less than 1.1 volts, control logic block 604 applies a power_save signal to shut down sensor block 606.

In FIG. 17, select signals, offset adjustment and gain adjustment signals and the ADCOUT output signal are transmitted over the bus 614 between the control logic block 604 and the sensor block 606. In one embodiment, to conserve battery power, most of the digitization circuitry is set to shut down between instrumentation transformations, restarting the sensor block when the interface circuits between the sensor block and the logic control block must receive the measurement again. As needed, these circuits continue to be powered with a near zero quiescent power drain.

One feature of the dual function temperature / voltage sensor of the present invention is that the sensor is set such that the temperature and voltage measurements share the same offset and gain adjustment values in the digitization circuit. Specifically, the PTAT current IPTAT at the selected temperature measurement point (eg 0 ° C.) should be set equal to the battery current IBAT at the selected voltage measurement point. In this manner, the voltage measurement offset and gain adjustment values follow the temperature measurements, and only one set of offset and gain adjustment values are needed for both measurements.

As discussed above, the frequency ratio digitization temperature sensor of the present invention implements a three port linearity correction method, while the frequency ratio digitization temperature sensor provides a stabilized reference clock frequency while also minimizing temperature digitization linearity errors. The stabilized reference clock frequency can be used for clock adjustment. Thus, in accordance with the present invention, sensor block 606 is configured to implement a three port linearity correction method and a reference clock signal is supplied over bus 618. The reference clock signal can then be provided to the control logic block 604 to be used to adjust the clock signal of the control logic block.

FIG. 18 is a circuit diagram of a battery current and PTAT current selection circuit that may be incorporated into the temperature / voltage sensor block of FIG. 17. The battery current generation circuit and the battery current and PTAT current selection circuit, shown in FIG. 17, are simplified to show the operating principles of the temperature / voltage sensor block 606. 18 shows an actual configuration of a battery current and PTAT current selection circuit 700 that can be used to generate a current that indicates battery voltage and to selectively connect battery current or temperature dependent PTAT current to I / F converters as input signal IDATA. It is shown.

Referring to FIG. 18, in circuit 700, battery voltage V _BAT is connected to a resistor divider consisting of resistors R1 and R2. The battery voltage V _BAT is also connected to the power supply voltage Vdd node via switch S2 which is controlled by the power_save signal. Thus, in circuit 700, all circuits are connected to the power supply Vdd voltage, except for the resistor divider (and associated transistor M54) of resistors R1 and R2, all of which when the power_save signal is applied as described above. The circuit can be separated from the battery power.

To measure the battery voltage, a pair of series connected resistors R1 and R2 are connected between the battery voltage V _BAT and the ground voltage VSS to form a resistor divider. The NMOS transistor M54, controlled by the VBAT_sel signal, is connected between the resistors R2 and VSS to connect to the resistor divider when the battery voltage measurement is selected or to drop from the resistor divider when the battery voltage measurement is not selected. Transistor M54 is controlled by the VBAT_sel signal applied when battery voltage measurement is selected. In operation, transistor M54 disconnects the DC path of battery current through resistors R1 and R2 so that battery power is not drained when battery voltage measurements are not received. Transistor M54 is designed to have a very large width ratio relative to length, so that only a small amount of voltage drop occurs across transistor M54. That is, when transistor M54 is turned on, the resistance value across this transistor is negligible compared to the resistance values of resistors R1 and R2.

A resistor divider of resistors R1 and R2 supplies a current Inn connected to the first input terminal of an operational amplifier 730. The opamp 730 is in a feedback loop and the output terminal of the opamp 730 is connected to drive the PMOS transistor M67. The PMOS transistor M67 includes a source terminal connected to the battery voltage V _BAT and supplies current Inp from the drain terminal thereof to the second input terminal. The output terminal of opamp 730 is also connected to drive PMOS transistor M56 to provide a drain current IBAT indicating battery voltage V _BAT . Transistor M67 is ten times larger than transistor M56, allowing input current Inn and Inp to have many current values, while output current IBAT at transistor M56 maintains a small current level. Specifically, by using a transistor ratio of transistors M67 and M56 of 10: 1, the resistance values of the resistors R1 and R2 can be kept small while the current Inn and Inp can have larger values. That is, there is no need to use large resistance values for resistors R1 and R2 to obtain smaller current values for current Inn and Inp. Even when the resistance values of the resistors R1 and R2 are small and the input current Inn and Inp are large, the current IBAT in the transistor M56 is kept small by the use of the scaled transistors of M67 / M56. In one embodiment, the current Inn and Inp are in the range of 20 mA and the current IBAT is in the range of 2 mA.

In another embodiment, opamp 730 implements a chopper scheme to minimize offset voltage errors between the first and second input terminals.

In this embodiment, the accuracy of the battery voltage measurement is ensured by the use of a resistance trim digital-to-analog converter (DAC) 720. More specifically, manufacturing process variation can cause variation in the resistance values of resistors R1 and R2. The variation of the resistance values is adjusted by the resistance trim DAC 720 such that the battery current IBAT is not sensitive to manufacturing process variations. In this example, the resistive trim DAC includes a PMOS transistor connected to each trim resistor. A series trim transistor-resistance pair is given to allow precise trimming of the resistors R1 and R2 resistance values. One or more transistors are turned on by trimming program codes W ₀ to Wn that select one or more trim resistors. The structure of the resistive trim DAC is merely exemplary and other trim circuit configurations may be utilized in other embodiments of the present invention. In addition, the resistance trim DAC 720 is optional and may be omitted in other embodiments of the present invention.

Battery current IBAT generated by opamp 730 with PMOS transistor M56, and temperature dependent PTAT current IPTAT are switchably connected as input signal IDATA to I / F converters 640. In this embodiment, the battery current IBAT is connected to the IDATA terminal via switch S71, while the current IPTAT is connected to the IDATA terminal via switch S72. The switch S71 is controlled by the VBAT_sel signal and the switch S72 is controlled by the IP_sel signal. The VBAT_sel and IP_sel signals are complementary and non-overlapping signals. When the VBAT_sel signal is applied, the IP_sel signal is not applied, which causes the battery current IBAT to be connected to the IDATA terminal. When the VBAT_sel signal is not applied, the IP_sel signal is applied to connect the PTAT current IPTAT to the IDATA terminal.

When no battery current or PTAT current is supplied, the current is passed through another path to ground, preventing unused currents from affecting the operation of the sensor block. In this embodiment, the PMOS transistor M58 and the diode-connected NMOS transistor M63 provide another current path for the battery current IBAT. When the VBAT_sel signal is not applied, transistor M58 is turned on, causing battery current IBAT to be consumed through transistor M63 to ground node VSS. Transistor M58 is open circuited when the VBAT_sel signal is applied, so that all battery current is passed through the switch S71 to the IDATA terminal.

On the PTAT current side, the PMOS transistor M64 and the diode-connected NMOS transistor M66 provide another current path for the PTAT current IPTAT. When the IP_sel signal is not applied, transistor M64 is turned on, causing current IPTAT to run out through transistor M66 to ground node VSS. Transistor M66 becomes an open circuit when the IP_sel signal is applied, so that all PTAT currents are sent to the IDATA terminal via switch S72.

The RFID temperature logger of the present invention discussed above implements RFID with temperature measurement and battery voltage monitoring. The RFID temperature logger can also be implemented as a reduced number of components since no external crystal oscillator is needed. RFID temperature loggers reduce battery power by powering down all digital circuitry when no measurements are made. The RFID temperature logger of the present invention allows for maintenance and easy applications to exist within RFID systems.

The above details are given to illustrate certain embodiments of the invention and are not intended to be limiting. Numerous variations and substitutions may be made within the scope of the invention. The invention is defined by the following claims.

By the present invention, it is possible to offset the linearity error in the digital temperature output with respect to temperature.

Claims (23)

In the frequency ratio digitizing temperature sensor 10, A temperature sensing circuit 20 for providing a PTAT (Proportional To Absolute Temperature) current and a CTAT (Complementary To Absolute Temperature) current; A temperature independent reference current connected to a temperature sensing circuit that is a temperature independent reference current having a non-linear characteristic with respect to temperature from a weighted sum that receives PTAT current and CTAT current and weights the sum of PTAT current and CTAT current. A first current generated by generating one current, and further generating a first fixed current that is a sum of PTAT currents of the first current and the first ratio, and applying a first output current and a first positive current corresponding to the PTAT current to the first resistor; An input generation circuit 30 for providing one output voltage, a second output current generated by mirroring the first positive current, and a second output voltage generated by applying the first current to the second resistor; And A frequency ratio analog-producing linearity-corrected temperature output signal, including a data oscillator receiving a first output current and a first output voltage and a reference oscillator receiving a second output current and a second output voltage. A frequency ratio digitizing temperature sensor comprising a digital converter. The method of claim 1, wherein the frequency ratio analog to digital converter, A first current-frequency converter 40 which is a data oscillator for receiving a first output current and a first output voltage from an input generating circuit and providing a first frequency output signal having a frequency corresponding to a PTAT current; A second current-frequency converter 50, which is a reference oscillator, receiving a second output current and a second output voltage from an input generation circuit and providing a second frequency output signal that becomes a reference frequency; A first counter circuit (60) for receiving a first frequency output signal and generating a first digital count value indicating the number of clock cycles of the first frequency output signal during the conversion period; Receiving a second frequency output signal and generating a second digital count value indicating the number of clock cycles of the second frequency output signal, wherein the conversion period is defined by a predetermined number of clock cycles of the second frequency output signal; Counter circuit 70; And And a subtraction circuit (80) for subtracting the second digital count value from the first digital count value and providing a temperature output signal. The frequency ratio of claim 1, wherein the first output current is a copy of the PTAT current, and the first positive current or the copy of the first positive current is applied to the first resistor to generate the first output voltage. Digitizing Temperature Sensor. 4. The frequency ratio digitizing temperature sensor as claimed in claim 3, wherein the first positive current or a copy of the first positive current is applied as a second output current. The circuit of claim 1, wherein the input generation circuit comprises: A first summing circuit 106 coupled to sum the PTAT current of the second rate and the CTAT current of the third rate to produce a first current that is a temperature independent reference current having a nonlinear characteristic with respect to temperature; And And a second summation circuit 116 coupled to sum the first current and the PTAT current of the first ratio, which is a ratio less than one of the PTAT currents, to produce a first corrected current. temperature Senser. The circuit of claim 5, wherein the input generation circuit comprises: And a first buffer (114) for receiving a PTAT current and multiplying the PTAT current by a first correction factor to produce a PTAT current at a first rate. 7. The frequency ratio digitizing temperature sensor as claimed in claim 6, wherein the first correction factor has a value of less than 0.15. The circuit of claim 6, wherein the input generation circuit comprises: Receiving the first current, multiplying the first current by a second correction factor, which is one negative first correction factor (1-first correction factor), to generate a normalized first current, and adding the normalized first current to the second sum. And a second buffer (212) provided to the circuit to sum with the PTAT current of the first ratio. The circuit of claim 1, wherein the input generation circuit further generates a second positive current which is a value obtained by adding a first current and a PTAT current having a fourth ratio different from the first ratio, and converting the second positive current to the second resistor. And a second output voltage to generate a second output voltage. The circuit of claim 9, wherein the input generation circuit comprises: A first summing circuit 206 coupled to add the PTAT current of the second rate and the CTAT current of the third rate to produce a first current that is a temperature independent reference current having a nonlinear characteristic with respect to temperature; A second summing circuit 216 coupled to sum the first current and the PTAT current of the first ratio, which is a ratio less than 1 of the PTAT current, to produce a first positive current; And And a third summing circuit 226 coupled to sum the first current and the PTAT current at a fourth rate different from the first rate as a ratio less than one of the PTAT currents to produce a second positive current. Frequency ratio digitization temperature sensor. The circuit of claim 10, wherein the input generation circuit comprises: A first buffer 214 for receiving a PTAT current and multiplying the first correction factor by the PTAT current to produce a first ratio PTAT current; And And a second buffer (222) for receiving the PTAT current and multiplying the second correction factor by the PTAT current to produce a fourth ratio of PTAT current. The circuit of claim 11, wherein the input generation circuit comprises: The first current is received and the first normalized first current is generated by multiplying the first current by one minus first correcting factor (1-first correcting factor) by the third correcting factor, thereby generating the first normalized first current. A third buffer 212 which is provided to the second summing circuit to be summed with the PTAT current of the first ratio; And Receiving the first current and multiplying the first current by one negative second correction factor (1-second correction factor) to the first current to generate a second normalized first current, and converting the second normalized first current to And a fourth buffer (224) for providing to a third summation circuit to sum with a fourth ratio of PTAT current. In a linearity-corrected temperature output signal generation method, Providing a Proportional To Absolute Temperature (PTAT) current and a Complementary To Absolute Temperature (CTAT) current; Generating a first current that is a temperature independent reference current having a non-linear characteristic with respect to temperature from a weighted sum that is a weighted sum of the PTAT current and the CTAT current; Generating a first positive current that is the sum of the first current and the first ratio PTAT current; Generating a first output current corresponding to the PTAT current; Applying a first positive current to the first resistor to generate a first output voltage; Generating a second output current by mirroring the first positive current; Generating a second output voltage generated by applying a first current to the second resistor; And Linearity correction temperature output by connecting the first output current and the first output voltage to the data oscillator of the frequency ratio analog-to-digital converter, and the second output current and the second output voltage to the reference oscillator of the frequency ratio analog-to-digital converter Generating a signal. 14. The method of claim 13, wherein coupling the first and second output currents and the first and second output voltages to a frequency ratio analog-to-digital converter to produce a linearity correction temperature output signal comprises: Providing a first output current and a first output voltage to a first current-frequency converter to generate a first frequency output signal having a frequency corresponding to a PTAT current; Providing a second output current and a second output voltage to a second current-frequency converter to generate a second frequency output signal that becomes a reference frequency; Counting the number of clock cycles of the first frequency output signal during the conversion period to provide a first digital count value; Counting the number of clock cycles of the second frequency output signal to provide a second digital count value, wherein the conversion period is defined by a predetermined number of clock cycles of the second frequency output signal; And Generating a temperature output signal by subtracting the second digital count value from the first digital count value. The method of claim 13, Generating a second positive current obtained by summing a first current and a PTAT current having a fourth ratio different from the first ratio, Generating the second output voltage comprises applying a second positive current to the second resistor to generate a second output voltage. 15. The method of claim 13, wherein the first output current is a copy of the PTAT current and a first positive current or a copy of the first positive current is applied to the first resistor to produce a first output voltage. 17. The method of claim 16, wherein the first positive current or a copy of the first positive current is applied as a second output current. The method of claim 13, wherein generating a first current that is a temperature independent reference current having a non-linear characteristic with respect to temperature from the weighted sum of the PTAT current and the CTAT current comprises: Summing the PTAT current at the second rate and the CTAT current at the third rate to produce a first current that is a temperature independent reference current having a non-linear characteristic with respect to temperature. The method of claim 13, wherein the generating of the first positive current sum of the first current and the PTAT current of the first ratio comprises: Multiplying the PTAT current by a first correction factor to produce a PTAT current at a first rate, the ratio being less than one of the PTAT currents; And Summing the first current and the PTAT current of the first ratio to produce a first positive current. 20. The method of claim 19, wherein said first correction factor has a value of less than 0.15. The method of claim 1, A voltage measuring circuit measuring the first voltage and providing a third current proportional to the first voltage; A selection circuit S1 for receiving the first output current and the third current and selecting one of the first output current and the third current as the selection current based on the selection signal, The frequency ratio analog-to-digital converters 640 and 660 include a data oscillator for receiving the selected current and a first output voltage, and a reference oscillator for receiving a second output current and a second output voltage, and a PTAT current and a third. And a linearity correcting digital output signal indicating a selected one of the currents. In a semi-passive radio frequency identification (RFID) tag 600, A sensor block 606 connected to a battery 620 providing a battery voltage for powering a portion of the circuit of the RFID tag and having a frequency ratio digitizing temperature sensor according to claim 21. Semi-passive radio frequency identification tag. 23. The semi-passive radio frequency identification tag of claim 22, wherein the first voltage comprises a battery voltage, and the sensor block 606 alternately measures ambient temperature and the battery voltage.

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