JP4680214B2 - Frequency ratio digitizing temperature sensor with linearity correction - Google Patents

Description

  The present invention relates to a radio frequency identification device, and more particularly to a radio frequency identification device incorporating a frequency ratio digitizing temperature sensor.

  Frequency ratio digitizing temperature sensors that operate to measure temperature by changing the frequency of the oscillator are well known. More generally, such temperature sensors are implemented using a frequency ratio analog to digital converter (ADC) to measure an input signal that varies with temperature. In general, a frequency ratio digitizing temperature sensor includes two oscillators: a reference oscillator and a data oscillator. The reference oscillator defines the conversion interval, in which case the conversion period is displayed using a fixed number of clock cycles of the reference frequency. The frequency of the data oscillator, i.e., the data frequency, varies with temperature, and the ratio of the data frequency to the reference frequency forms the digital output signal of the temperature sensor. In conventional frequency ratio digitized temperature sensors, non-ideal characteristics of various elements of the sensor circuit generate non-linearities in the digital output signal. For example, a reference oscillator and a data oscillator in a frequency ratio digitizing temperature sensor are usually realized using a current / frequency converter (I / F converter). Propagation delay through the oscillator creates a linear distortion of the frequency of the digital output signal. Also, the temperature dependent current generated for displaying temperature measurements and / or for use as a reference current may itself exhibit non-linear characteristics. The temperature coefficients of the resistors and capacitors that form each oscillator may cause additional drift or nonlinearity at the oscillator frequency when the temperature changes.

  Some prior art solutions that correct or minimize linearity errors make the corrected system less useful in general applications. For example, some temperature frequency ratio analog-to-digital converters (ADCs) use a reference oscillator, where the reference frequency is intentionally varied widely with respect to temperature. Typically, this type of frequency ratio ADC uses a reference oscillator whose frequency decreases with increasing temperature, while the data frequency remains relatively constant. This will result in a significant increase in conversion time with increasing temperature, which may be inconvenient if the desired application is an output stream of samples taken at fixed intervals.

  The temperature digitized frequency ratio ADC is also designed and manufactured with a temperature compensated crystal oscillator as a reference frequency generator. However, the crystal oscillator is an external component and the use of the crystal oscillator increases the cost and circuit area required to achieve the frequency ratio ADC.

  In US Pat. No. 6,183,131, a digitized temperature sensor achieves linearity correction by adding a small portion of the ADC input (PTAT signal) to a (substantially constant) ADC reference signal. Thus, almost complete correction of bow error or bow error is observed in these digitized temperature sensors, especially for errors related to the temperature dependent behavior of the base-emitter voltage. However, the linearity correction described in the '131 patent applies only to digital temperature sensors using an ADC with a single input and a single reference port. It does not apply to frequency ratio ADCs, partly because it uses four separate input ports and linearity correction for single input and reference ports It is impossible to apply directly.

  Radio frequency identification (RFID) refers to an automatic identification technique that uses radio waves to automatically identify people or objects. RFID encompasses a variety of identification methods, the most common being storing a serial number that identifies a person or object, and possibly other information, on a microchip attached to an antenna. The microchip and the antenna are integrally called an RFID transponder or an RFID tag. The silicon chip and antenna work together to allow the RFID tag to receive and respond to radio frequency queries from the RFID reader or transceiver. For example, the antenna allows the chip to transmit identification information to the RFID reader. The reader converts the radio waves reflected back from the RFID tag into digital information, which can then be sent to a computer that can utilize the identification information.

  An RFID tag can be either passive, semi-passive (or also known as semi-active), or active. A passive RFID tag does not require an internal power supply, but draws power from the electromagnetic field corrected by the transceiver or reader and uses that power to power the microchip circuitry. The electromagnetic waves from the RFID transceiver or reader induce current in the RFID tag antenna. The chip then modulates the wave that the antenna sends back to the transceiver. The transceiver converts this new wave into digital data.

  Active RFID tags require an internal power source such as a battery, which is used to supply power to the microchip and generate signals to go out. Active RFID tags are sometimes called beacons because they can broadcast their own signals.

  Semi-passive RFID tags are similar to passive tags, except that a small battery is used to power the microchip circuitry. RFID tags communicate by extracting power from a reader or transceiver. The cell or battery allows the tag's microchip to be powered at all times, which eliminates the need to design an antenna to recover power from incoming signals. Thus, the antenna can be optimized for backscatter signals. Semi-passive RFID tags are faster in response and are therefore stronger in read ratio compared to passive tags.

  One common application of RFID technology is for tracking goods that travel through the supply chain. In addition, the RFID tag is coupled with a sensor that also detects and records temperature, movement and radiation. In this way, the same RFID tag used to track items moving through the supply chain can be used if the goods are not stored at the correct temperature or if someone injects biological material into the goods It is possible to operate to generate a warning to the staff.

  The microchip in the RFID tag can be read / write, read-only or “write once, read many” (WORM). In the case of a read / write chip, information can be added to the tag, or existing information can be overwritten with the exception of the identification serial number. An RFID tag may have an additional storage block for storing information collected by the tag itself.

US Pat. No. 6,183,131

  The present invention has been made in view of the above points, and an object of the present invention is to provide an improved radio frequency identification device and method that solves the above-described drawbacks of the prior art. Another object of the present invention is to provide an improved RFID tag with temperature logging capability. Yet another object of the present invention is to provide an improved frequency ratio digitizing temperature sensor. Yet another object of the present invention is to provide a technique for generating a linearity corrected temperature output signal.

  In accordance with the principles of the present invention, a frequency ratio digitizing temperature sensor having a reference oscillator and a data oscillator adds a correction current to a temperature independent reference current and uses the same copy of the corrected reference current as a reference. Linearity correction is achieved by driving resistors at the oscillator current input and the data oscillator reference voltage input. The resistor converts the current into a corrected reference voltage that is inversely proportional to the frequency at the reference oscillator output. The correction current is a current proportional to absolute temperature (PTAT current) and is obtained by selecting a replicated portion Kp of the PTAT current applied from the temperature sensing current source to the input generation circuit. As a result of using the corrected reference current to drive the reference oscillator, the reference frequency of the temperature sensor is intentionally made to show an error with respect to temperature. As a result of using the corrected reference current to generate a reference voltage in the data oscillator, the frequency at the data oscillator output is also intentionally induced to exhibit an inverse frequency error. These frequency error properties have the effect of canceling the linearity error in the digital temperature output with respect to temperature.

  The frequency ratio digitizing temperature sensor of the present invention implements linearity error correction that cannot be achieved with conventional frequency ratio temperature sensors. More specifically, error sources associated with temperature-dependent currents, time delays in current-frequency converters, and temperature-dependent behavior of resistors and capacitors, when a predetermined amount of PTAT current is added to the reference current. It is offset simultaneously.

  According to another aspect of the invention, a radio frequency identification (RFID) tag incorporates a frequency ratio digitizing temperature sensor to constitute an RFID temperature logger. The RFID tag can be programmed to record temperature data either on command or at specified intervals. In one embodiment, the RFID tag is semi-passive and the temperature sensor and control circuit are powered by a battery. In a further embodiment, the frequency ratio digitizing temperature sensor of the present invention is configured as a dual function temperature / voltage sensor, where the temperature sensor circuit is used to alternately measure battery voltage and ambient temperature. Is done. In another embodiment, a three-port linearity correction method is implemented in a frequency ratio digitizing temperature sensor so that a stable reference clock is generated by the temperature sensor. This stable reference clock is used by the RFID tag control circuitry for clock calibration, thereby eliminating the need for an external crystal oscillator. An RFID tag incorporating the frequency ratio digitizing temperature sensor of the present invention will be described in more detail below.

  Generally, a frequency ratio digitizing temperature sensor includes a pair of current-frequency (I / F) converters that implement a reference oscillator and a data oscillator. Each pair of I / F converters, referred to as a data I / F converter and a reference I / F converter, each receive two input signals (current and voltage) and generate a frequency output signal. Therefore, this pair of I / F converters uses four input signals to generate two frequency output signals to calculate the measured temperature. More specifically, the data I / F converter receives a temperature dependent input current Idata and an approximately temperature independent reference voltage Vdata. The temperature dependent input current Idata is a replica of the PTAT current, IPTAT, generated by the difference between the base-emitter voltage Vbe of a pair of bipolar transistors in response to temperature excitation. The reference I / F converter receives a substantially temperature independent reference current Iref and a substantially temperature independent reference voltage Vref.

  According to one aspect of the present invention, the frequency ratio digitizing temperature sensor of the present invention implements a two-port linearity correction method. In this two-port linearity correction method, two of the four input signals to the I / F converter are corrected by the correction current. In particular, the corrected reference current is formed by adding or adding a small portion of the temperature dependent PTAT current to a reference current that is primary temperature stable. The same copy of the corrected reference current is applied simultaneously as a reference current to the reference I / F converter and as a reference voltage Vdata to the data I / F converter via a resistor.

  Simultaneous application of the corrected reference current to two identical copies of data and the input signal of the reference I / F converter modifies the transfer function of the frequency ratio analog to digital converter (ADC). In that case, second-order distortion is generated in the ADC, which is opposite in sign to the inherent second-order distortion in the temperature dependent current generated using a temperature sensor based on a bipolar transistor. As a result, the linearity error of the digitized temperature measurement is significantly reduced. In one embodiment, a linearity improvement of at least 20 dB in the digital temperature measurement is obtained.

  According to another aspect of the present invention, the frequency ratio digitizing temperature sensor of the present invention implements a three-port linearity correction method. In this three-port linearity correction method, three of the four input signals to the I / F converter are corrected by two separate correction currents. The temperature dependent input current Idata is the only input signal that is left uncorrected. In the three-port linearity correction method, the first corrected reference current is applied to the reference current Iref of the reference I / F converter, and a copy of the corrected reference current is used in the two-port linearity correction method. Is applied to a resistor at the Vdata reference voltage input of the data I / F converter. This three-port linearity correction method involves forming a second corrected reference current by adding a small portion of the temperature dependent PTAT current to a reference current that is primary temperature stable. The proportion or portion of PTAT current used to form the second corrected reference current is different from the proportion or portion of PTAT current used to form the first corrected reference current. The two corrected reference currents have different current values. The second corrected reference current is applied to the resistor to generate a reference voltage Vref for the reference I / F converter. Thus, the frequency drift of the reference I / F converter functioning as a reference oscillator is minimized while the digital temperature measurement of the temperature is linearized as described above. In one embodiment, it is possible to improve the linearity of 20 dB in digital temperature measurements while maintaining the frequency stability of the reference clock at 0.06% pp (peak to peak).

  In the frequency ratio digitizing temperature sensor of the present invention, it is possible to apply simultaneous digital adjustment of gain and offset to improve measurement accuracy when the application requires absolute accuracy. . In addition, to improve the performance of the frequency ratio digitizing temperature sensor of the present invention, the data oscillator and reference oscillator use I / F converters that exhibit a constant propagation, logic and switching time delay sum over temperature and power supply variations. Can be realized.

  In one embodiment, the PTAT current is multiplied by a correction factor and added to a reference current to form first and second corrected reference currents, which are no longer temperature independent and are approximately between −25 and 85 ° C. 1.15% positive slope is shown. The correction factor is selected mathematically by solving the equations that characterize the digitized temperature sensor or by using actual integrated circuit measurements empirically.

  The linearity-corrected frequency ratio digitizing temperature sensor of the present invention is such that the data frequency is approximately linearly proportional to absolute temperature (PTAT) with increasing temperature while the reference frequency remains constant or relatively constant. This is applicable to a frequency ratio digitizing temperature sensor when increasing in the above manner. The linearity correction method of the present invention is not applicable to digitizing systems where the data frequency increases significantly with temperature.

  The linearity corrected frequency ratio digitizing temperature sensor of the present invention provides many advantages over conventional temperature sensors. First, the linearity compensated temperature sensor of the present invention can provide better temperature measurement results than a temperature sensor that uses good or crystal oscillators without requiring the use of external crystal components. Is possible. The temperature sensor of the present invention thereby reduces manufacturing costs and circuit area required for realization. In addition, when a three-port linearity correction method is applied, the temperature sensor of the present invention simultaneously provides a reference frequency with increased stability. The reference frequency can be used by other circuits outside the temperature sensor that require a stable reference frequency. Thus, the temperature sensor of the present invention eliminates the need for an additional oscillator circuit or external crystal oscillator to provide such a stabilized reference frequency.

  FIG. 1 is a schematic diagram of a frequency ratio digitizing temperature sensor according to one embodiment of the present invention. Referring to FIG. 1, the frequency ratio digitizing temperature sensor 10 receives two temperature dependent currents from the temperature sensing circuit 20 as its input signal. The temperature detection circuit 20 may or may not be part of the digitized temperature sensor 10. The exact configuration of the temperature sensing circuit 20 is critical to the practice of the present invention as long as two temperature dependent currents are generated for the temperature sensor, one proportional and one complementary. It is n’t.

  In FIG. 1, temperature sensing circuit 20 provides a current proportional to absolute temperature IPTAT on node 22 and a current complementary to absolute temperature ICTAT on node 22 in response to temperature excitation. Shown as one current source. The temperature sensing circuit 20 shown in FIG. 1 is merely exemplary and is not intended to represent the actual configuration of the temperature sensing circuit. Typically, two temperature dependent currents are generated using two bipolar transistors operated at different current densities. The difference between the base-emitter voltages of the two bipolar transistors, that is, the ΔVbe voltage is a voltage proportional to the absolute temperature. The PTAT current can be generated from the ΔVbe voltage by applying a ΔVbe voltage across a resistor (eg, resistor Rp). On the other hand, the base-emitter voltage of one of the bipolar transistors, that is, the Vbe voltage is a voltage complementary to the absolute temperature. Thus, by applying this Vbe voltage across a resistor (eg, resistor Rc), it is generated from a Vbe voltage that is typically the larger of the two Vbe voltages in a transistor having a higher current density. It is possible to make it.

  The digitized temperature sensor 10 is formed by an input generation circuit 30 and a frequency ratio analog-to-digital converter (ADC). Input generation circuit 30 receives the two temperature dependent currents IPTAT and ICTAT and generates the input signals necessary to drive the frequency ratio ADC. In the present embodiment, the frequency ratio ADC includes a pair of current / frequency (I / F) converters 40 and 50, a pair of counters 60 and 70, and a subtraction circuit 80. The frequency ratio ADC supplies an output signal ADCOUT as a temperature output signal of the digitized temperature sensor 10.

  The I / F converter 40 receives a temperature dependent input current Idata (node 32) and an approximate temperature ratio dependent reference voltage Vdata (node 34) and has a frequency comprising a frequency representing an input current that is a PTAT current. A data I / F converter for generating an output signal Fdata (node 44). The I / F converter 50 receives an approximately temperature independent reference current Iref (node 36) and an approximately temperature independent reference voltage Vref (node 38) and is a frequency that is the reference frequency of the temperature sensor. A reference I / F converter for generating an output signal Fref (node 54). The reference frequency Fref defines a conversion period, in which case a fixed number Nc of clock cycles of the reference frequency represents the conversion period.

  According to the present invention, the input generation circuit 30 uses the first correction reference current used as the reference current Vref (node 34) and the reference current Iref (node 36) to generate the reference voltage Vdata (node 34). Generate duplicates. By applying the first corrected reference current in this manner, the linearity error in the final temperature output signal of the temperature sensor is accurately corrected. Further in accordance with another aspect of the present invention, the input generation circuit 30 generates a second corrected reference current that is used to generate the reference voltage Vref (node 38) to improve the stability of the reference frequency Fref. appear. The detailed configuration of the input generation circuit 30 will be described in more detail below.

In the digitized temperature sensor 10, a reference frequency Fref (node 54) is coupled to a reference counter 70 for counting a fixed number Nc of clock cycles of the reference frequency. The reference counter 70 outputs an output signal REF representing a count Nc that defines the conversion period of the temperature sensor. COUNT is generated on output terminal 78. Reference counter 70 is START A CONVERT signal (node 64) is received to initiate each conversion cycle. When the fixed number Nc is reached, the reference counter 70 generates an overflow signal, which is CONVERT Serves as the DONE signal (node 66) to indicate the end of each conversion cycle. When the reference counter 70 detects a count exceeding a number Nc, the overflow signal is asserted, indicating the end of the conversion period. The reference counter 70 also receives a gain adjustment input signal on terminal 72 to digitally adjust the gain of the digitized temperature sensor 10. This gain adjustment input signal operates to increase or decrease the conversion period by increasing or decreasing the count number Nc to adjust the gain of the temperature sensor system.

Data frequency Fdata (node 44) is coupled to data counter 60 for counting the number of data frequency clock periods within the conversion period of the temperature sensor. The data counter 60 outputs an output signal DATA that represents a count of data frequencies within the conversion period. COUNT is generated on output terminal 68. Data counter 60 is START A CONVERT signal (node 64) is received to initiate each conversion cycle. The data counter 60 also sends a CONVERT from the reference counter 70 as a halt signal. A DONE signal (node 66) is received. CONVERT When the DONE signal is asserted, that is, the count operation in the data counter 60 is stopped. Finally, the data counter 60 receives an offset adjustment input signal 62 relating to temperature in order to digitally adjust the offset of the digitized temperature sensor 10.

In this embodiment, DATA COUNT signal (node 68) and REF The COUNT signal (node 78) is coupled to subtraction circuit 80, where REF COUNT signal is DATA Subtracted from the COUNT signal. The final ADCOUT signal on output terminal 82 is provided as a digital temperature output signal and can be processed to provide a temperature output signal. Circuits and methods for processing the ADCOUT signal are well known and will not be described herein. In one embodiment, the digitized temperature sensor 10 is normalized by selecting a reference frequency and data frequency that are nominally equal at 0 ° C. Any inaccuracy in the actual temperature when Fdata = Fref is Digital correction can be made by applying an appropriate digital value at the Adjust input (node 62). Thus, the subtraction operation generates an ADCOUT signal, which nominally represents a temperature measurement in degrees Celsius.

  In general, the digitized output signal of the frequency ratio ADC is given by the following equation, assuming that the offset adjustment value is zero.

Nc is a fixed number of clock cycles of the reference clock and presents a conversion period. The frequency ratio digitizing temperature sensor 10 of the present invention can also be described by the above equation (1).

  Assuming that the reference frequency Fref is constant in equation (1), the ratio Fdata / Fref can be interpreted as any input signal value above which the output signal ADCOUT is above zero. Range. Therefore, any positive output value of the frequency ratio ADC described by equation (1) corresponds to the magnitude of the input signal above some predetermined reference value. Therefore, the ADC measures the difference between a predetermined positive reference value and the input value. This feature of the frequency ratio ADC is particularly useful in diode based temperature sensing ADCs. This is because the input signal does not reach zero until it approaches -273.15 ° C, which is much lower than the normal operating temperature. Thus, the frequency ratio ADC can be normalized by selecting a nominal value relative to a reference value corresponding to a detected temperature of 0 ° C. When so normalized, it is possible to construct a frequency ratio temperature sensor whose digital output signal represents a temperature in degrees Celsius nominally.

  In this embodiment, the digitized temperature sensor 10 further selects the value of Nc so that a 1 ° C. change in the temperature sensing current source causes a 8 LSB (minimum digit bit) change in the digital output ADCOUT. Is normalized. Thus, a signed binary digital number at ADCOUT is easily interpreted as a temperature in Celsius with an LSB weight of 0.125 ° C.

  In the above description, the oscillator in the frequency ratio digitizing temperature sensor is realized using a current / frequency converter (I / F converter). Instead of using an oscillator that is sensitive to the applied current, the oscillator in the frequency ratio digitizing temperature sensor can also be implemented using a voltage sensitive oscillator or a voltage / frequency converter circuit (V / F converter). Is possible. Because of the inherent power supply voltage fluctuation removal capability of temperature sensing circuits that generate temperature dependent currents, the use of I / F converters is usually preferred over V / F converters. However, the linearity correction method of the present invention is equally good for a digitized temperature sensor constructed using a V / F converter topology with appropriate changes from current to voltage signals in the input signal. Applied. The frequency ratio digitizing temperature sensor is as long as the data frequency Fdata increases with temperature and the reference frequency Fref is relatively constant and the V / F converter increases its frequency as the input voltage increases and the reference voltage increases. Can be configured using a V / F converter topology.

  As described above, the digitized temperature sensor 10 of FIG. 1 uses two current / frequency (I / F) converters 40 and 50 to implement an input signal versus frequency function. The configuration and operation of the I / F converter are as follows. In the most general terms, the I / F converter includes a capacitor, a comparator, and a switching circuit. The I / F converter receives the input current Iin and the reference voltage Vref as input signals. The capacitor is charged by the input current Iin and a linearly increasing ramp voltage is developed at the capacitor. The lamp voltage at this capacitor is compared with a reference voltage Vref. When the ramp voltage exceeds the reference voltage Vref, the comparator output signal is asserted or activated and the switching circuit is reset to discharge the capacitor, thereby resetting the voltage at the capacitor to zero and again the voltage ramp process. Let it begin. The time between each activation of the comparator output signal defines the period of the output frequency Fout of the I / F converter. In the case of an ideal system showing an instantaneous reset, the output frequency Fout can be given by:

Here, I _in is the input current _in amperes, C _int is the capacity of the internal integrated capacitor in farads, and V _ref is a reference voltage used in the comparator.

In an actual circuit, there is a finite delay time between the lamp voltage exceeding the reference voltage Vref and the start of another lamp operation cycle. For low power applications, the amount of power used in the comparator limits the comparison speed, this delay time can be significant and can contribute significantly to the linearity error of the output frequency signal. is there. In the case of an I / F converter showing a delay time t _d between the ramp voltage of the capacitor exceeding the reference voltage and the start of the next ramp cycle, the output frequency is given by:

Although the presence of the delay time t _d affects the offset and gain of the I / F transfer function, these linear errors are easily corrected in typical systems. However, the presence of the delay time also increases the output frequency more slowly at high frequencies, in which case the delay time is a larger part of the total period and thus linearity in the transfer function between Iin and Fout. Generate an error. The size of the linearity errors generated by t _d increases with increasing ratio of the values of t _d / t _ramp, Note t _'ramp is the time period of the lamp voltage. The ratio t _d / t _ramp and the linearity error increase the time t _ramp (which requires a lower input current Iin or a larger capacitance Cint or a larger reference voltage Vref) or a delay time t. It can be minimized by either reducing _d .

FIG. 2 is a plot illustrating an arched linearity error in a temperature measurement due to propagation delay through a current / frequency converter. In this example, the ramp time t _ramp is assumed to be 2 μs. FIG. 2 illustrates the linearity error for the case where there is no delay, t _d = 0 (ideal case), and where there are delays of 40 ns and 80 ns. As can be observed from this plot, when the delay time is 80 ns, a linearity error of 0.15% pp at the output frequency is observed, which is approximately 1/667. A system with an 11-bit linearity requirement requires a peak-to-peak linearity error of less than 1 / (2 ¹¹ ) = 0.049%, which is approximately one third of the non-linearity observed in FIG. is there. It should be noted that the induced linearity error is a convex “bow” shaped straight line.

The amount of linearity error in FIG. 2 is almost doubled when the delay time t _d is doubled. In order to build a system with well-controlled linearity, the linearity error of the I / F converter is kept relatively fixed and can therefore be corrected by a fixed linearity correction method. In addition, it is necessary to design the I / F converter so that the delay time is constant or very close to constant. Therefore, according to one aspect of the present invention, the digitizing temperature sensor preferably minimizes the variation in the delay time t _d through the I / F converter by minimizing the delay time itself. The I / F converter is configured.

The “bow” shape linearity error generated by the delay time t _d of the I / F converter tends to linearize the I / F circuit exhibiting itself a concave “bow” linearity error, and The following will contribute to the linearization of the temperature sensor system. In general, the linearity correction method of the present invention does not attempt to obtain a significant linearity correction for an arcuate linearity error due to the delay time t _d , but the presence of an arcuate error is a digitized temperature sensor. Reduce the amount of correction required in the system. Therefore, when designing a digitized temperature sensor, the parameter t _d is not changed to obtain the maximum linearity correction. Rather, the linearity correction method of the present invention does not minimize the delay time t _d to the extent that variations in the delay time t _d over time and temperature and the manufacturing process are negligible parts of the voltage ramp time t _ramp . It is what. Therefore, the linearity correction method of the present invention can be applied to obtain an optimal linearity correction with respect to time, temperature and circuit processing.

  It should be noted that the presence of the delay term also affects the slope and offset of the output frequency of the I / F converter. However, slope and offset errors can be easily corrected in the digital domain through the use of offset and gain adjustment parameters.

  FIG. 3 is a plot illustrating the linearity error of the temperature dependent current generated by the temperature sensing circuit 20 of FIG. As described above, the temperature detection circuit 20 generates the PTAT current IPTAT and the CTAT current ICTAT by using two bipolar transistors operating at different current densities. The well-known diode equation shows that the base-emitter voltage Vde of a bipolar transistor decreases somewhat linearly with temperature, and the difference between the base-emitter voltages ΔVbe of two diodes at different current densities is applied. It increases in a more linear manner with increasing temperature. The PTAT current and the CTAT current are combined to generate a primary temperature independent reference current Inpo.

  When the PTAT current and CTAT current are combined with a weight that will cancel out the first order slope error, the resulting “zero temperature coefficient” reference current Inpo is still the CTAT current component as shown in FIG. It exhibits linearity errors due to the dominant bow shape. The magnitude of this linearity error as shown in FIG. 3 is 0.35% PP, which is almost seven times larger than the desired worst-case linearity error for the temperature sensor system of interest. is there. The non-linear characteristic of the digitized temperature sensor with respect to the temperature independent reference current Inpo is the most significant linearity degradation in the frequency ratio digitized temperature sensor.

FIG. 4 is a schematic diagram of an input generation circuit that implements the three-port linearity correction method in the frequency ratio digitizing temperature sensor of FIG. 1 according to one embodiment of the present invention. In FIG. 4, the input generation circuit 100 has a pair of linearity IDACs 110 and 120, in which case the digital numerical values K P ADJUST and KV ADJUST is applied to set the magnitude of the PT AT current component. The input generation circuit 100 provides a pair of corrected reference currents to linearize the digital output signal of the frequency ratio digitizing temperature sensor 10 and provide a stabilized reference frequency.

  A unique feature of the input generation circuit 100 of the present invention is that the reference voltage and reference current are not generated from a bandgap voltage. Instead, a reference current is generated and applied across the resistor to form a reference voltage, where the resistance value of the resistor may exhibit a significant change with temperature. A significant feature of the linearization method of the present invention is that it uses the same copy of the same reference current at the current input to the reference I / F converter and forms a reference voltage for the data I / F converter. is there.

  Referring to FIG. 4, input generation circuit 100 receives PTAT current IPTAT (node 22) and CTAT current ICTAT (node 24) from the temperature sensing circuit. Current IPTAT is mirrored by buffer 146 as current Ip and provided on output node 132 as temperature dependent input current Idata for data I / F converter 40 in digitized temperature sensor 10 (FIG. 1).

  Input generation circuit 100 includes a first addition circuit for generating primary temperature-independent current Inpo from the weighted sum of currents IPTAT and ICTAT. In particular, current IPTAT is coupled to buffer 102, where current multiplication factor Knp is applied to the PTAT current, and current ICTAT is coupled to buffer 104, where current multiplication factor Knc is applied to the CTAT current. The currents generated by buffers 102 and 104 are summed by summer 106 to generate an Inpo current on node 108. This Inpo current is a combination of PTAT and CTAT current components and is nominally stable with respect to temperature.

In the input generation circuit 100, the data linearity IDAC 110 is used to generate a first corrected reference current by adding a digitally programmable portion of the PTAT current to the Inpo current. In particular, the current IPTAT that is mirrored by the buffer 144 as the current IPTAT1 is coupled to the buffer 114 in the data linearity IDAC 110. The buffer 114 applies the current multiplication coefficient Kp as the correction coefficient with the current IPTAT1, and generates a part of the PTAT current as the correction current. The portion of the PTAT current from buffer 114 is added by adder 116 to current Inpo mirrored by buffer 112 to output current In on node 118. 1 is generated. Current In 1 is mainly the current Inpo, but the addition of this small part of the PTAT current is the current Inpo 1 is not completely temperature independent. Actually, the current In 1 is made slightly more PTAT than temperature stable and this current In The linearity error generated by the time delay in the I / F converter of the temperature sensor circuit is corrected using the property of 1.

First corrected reference current In 1 is mirrored by buffer 119 as current In and supplied on output node 136 for use as reference current Iref of reference I / F converter 50 in digitized temperature sensor 10 (FIG. 1). This first corrected reference current In A replica of 1 is applied to resistor Rdata, where the voltage drop across the resistor is the reference voltage Vd. Reference voltage Vd is supplied onto the output node 13 4 as a reference voltage Vdata of the data I / F converter 40 in the digital temperature sensor 10 (FIG. 1). Thus, the first corrected reference voltage In The same copy of 1 is applied as the reference current for the reference oscillator and the reference voltage for the data oscillator of the frequency ratio digitizing temperature sensor.

  In particular, the input generation circuit 100 of the present invention is different from the conventional frequency ratio temperature sensor circuit in which the reference voltages Vdata and Vref for the two oscillators are the same voltage generated from the voltage reference circuit. According to the present invention, the reference voltage Vdata for the data oscillator and the reference voltage Vref for the reference oscillator are generated separately, so that these two voltages are separated from each other. The reference voltage Vdata is adapted to have a temperature dependent change that exhibits a small increase with temperature, while the reference voltage Vref exhibits a different and larger increase with temperature.

  In the input generation circuit 100, the reference linearity IDAC 120 is used to generate a second corrected reference current by adding a small portion of the PTAT current to the Inpo current. The percentage or portion of the PTAT current used to form this second corrected reference current is used to form the first corrected reference current by using a different correction factor or current multiplication factor. The proportions or parts used are different. In particular, current IPTAT mirrored by buffer 142 as current IPTAT2 is coupled to buffer 122 in reference linearity IDAC 120. The buffer 122 applies a current multiplication coefficient Kv to the current IPTAT2 to generate a part of the PTAT current as another correction current. That portion of the PTAT current from buffer 122 is added by adder 126 to current Inpo that is mirrored by buffer 124 to generate output current Ivr on node 128. The current Ivr is mainly the current Inpo, but the addition of this small portion of the PTAT current causes the current Ivr to be slightly PTAT.

  This second corrected reference current Ivr is applied to the resistor Rref, where the voltage drop across the resistor is the reference voltage Vr. The reference voltage Vr is supplied on the output node 138 as the reference voltage Vref of the reference I / F converter 50 in the digitized temperature sensor 10 (FIG. 1). By using the second corrected reference current Ivr to generate the reference voltage Vref for the reference oscillator, a temperature stabilized reference frequency is obtained.

  In the input generation circuit 100 of FIG. 4, unit gain buffers such as buffers 112, 119, 124, 142, 144, and 146 are used for current replication and are configured as unit gain amplifiers or unit dimension current mirrors. Is possible. In addition, the unity gain buffers 112, 119, 124, 142, 144, and 146 are provided where current replication is required to generate a replica of the input current. These unity gain buffers can be omitted if current replication is not required for circuit operation. It is well known in the art to use unity gain buffers or unit size current mirrors to create replicas of input current when necessary. Further, in the actual configuration of the input generation circuit of the present invention, the current used for the output current or applied to the resistor is either the first generated current or a replica of the first generated current. It is understood that it is possible. That is, the use of an initially generated current or a copy of the current at a given node is interchangeable and not critical to the practice of the invention.

  The current multiplication factors Knp and Knc for forming the temperature independent current Inpo can be derived in a conventional manner. The current multiplication factors (correction factors) Kv and Kp can be derived mathematically as described below or empirically through simulation or device characterization. If the multiplication factors Kv and Kp are derived mathematically or through simulation, fine tuning of the values may be necessary when actually realized.

  When the input generation circuit 100 of FIG. 4 is incorporated in the temperature sensor of FIG. 1, a temperature sensor in which linearity and reference clock stability are corrected is realized. The temperature sensor also operates to correct linearity errors due to time delays in the oscillator. The operating characteristics of the digitized temperature sensor 10 configured using the input generation circuit 100 of FIG. 4 will be described. The digital output signal ADCOUT of the temperature sensor can be written as follows for the case where the time delay in the comparator is not negligible.

The following assumptions are made: Cdata = Cref = C, Rdata = Rref = R, In = In When 1, t _{d_data} = t _{d_ref} = t _d is assumed, the expression in equation (4) can be simplified. It should be noted that the current Ip is the same as the PTAT current Idata. A simplified equation for the digital output signal ADCOUT is as follows:

If the delay time t _d is assumed to be zero, equation (5) is further simplified as follows.

  When linearity correction is not applied to the temperature sensor (ie, Kv = Kp = 0), the temperature-independent current Inpo as shown in FIG. 3 becomes the reference voltage Vdata for both the reference oscillator and the data oscillator. And Vref are used to generate the reference current Iref of the reference oscillator. That is, In = Ivr = Inpo. As can be observed from equation (6) above, the linearity of the current Inpo affects the denominator of the ADC transfer function. When PTAT current Ip is applied to the current input of the data I / F converter, its linearity affects the numerator of equation (6). Thus, the resulting ADC linearity error is expanded by the bow error of the PTAT current added to the additional “bow” error generated by the inverse of the CTAT “bow” error at the current Inpo. There is a “bow” error.

  FIG. 5 is a plot illustrating the temperature error of the temperature output signal from the linearized temperature sensor when compared to an uncorrected temperature sensor. Referring to FIG. 5, when the current Inpo is used directly as the input current to the reference I / F converter and directly used to generate the reference voltages Vdata and Vref for both I / F converters. The resulting temperature measurement has a linearity error as shown by the “no correction” curve in FIG. The peak-to-peak error is 0.955%, which is equivalent to 1.05 ° C.pp for a temperature range of −25 to 85 ° C., and worst case acceptable linearity in a typical system. About 20 times greater than the error.

  However, when linearity correction is applied to the temperature sensor (ie, Kv and Kop ≠ 0), the linearity error of the digitized temperature sensor is as shown by the “corrected” curve in FIG. Almost completely removed. The linearity error observed in the corrected curve in FIG. 5 is negligible, thereby ensuring high accuracy in the temperature sensor measurement.

  The input generation circuit 100 of FIG. 4 implements a three-port linearity correction method, in which case the reference frequency is stabilized along with the linearization of the digital temperature output. Reference frequency correction is provided because of the non-ideal characteristics of the resistors and capacitors used to form the I / F converter. The correction of the reference frequency along with the linearity complementarity of the digital temperature measurement using the three-port linearity correction method of the present invention operates as follows.

  Semiconductor integrated circuits composed of typical inexpensive CMOS processes usually do not have usable resistors with good temperature stability. Even resistors made from a thin film of a metal such as Nichrome or Sichrome typically exhibit an almost linear resistance change for temperatures on the order of 100 ppm / ° C. Over the range of 100 ° C., the value of such resistance may vary by 1%. If such a resistor is used to form the reference resistor Rref in the I / F converter, the reference frequency can be made linear and non-linear components even with this small linear change in the resistance value of the resistor Rref. It tends to change with both. This is due to the presence of a resistance value in the denominator of the reference frequency transfer function. First, the resistance value of the reference resistor Rref can be expressed by the following equation using a fixed resistance component and a component that varies with temperature.

Accordingly, the output frequency Fref of the reference I / F converter incorporating such a reference resistor is given by the following equation.

  The change in the capacitance value of the capacitor Cref in the I / F converter has the same effect as the reference frequency. It should be noted that changes that have the same effect on resistors Rref and Rdata, or changes that have the same effect on capacitors Cref and Cdata, do not significantly affect the linearity of the digitized temperature measurement. Without (see equation (6) above), however, a change in the resistance value of the resistor Rref or a change in the capacitance of the capacitor Cref changes the reference clock frequency. In order to obtain an optimal and stable reference clock frequency while minimizing temperature linearity error even if either the resistor Rref or the capacitor Cref exhibits a fairly small deviation over the temperature range of interest, the reference I One of the input signals to the / F converter is adjusted as part of the linearity correction method of the present invention.

  More specifically, the three-port linearity correction method illustrated in FIG. 4 includes the generation of a second corrected reference current used to generate the reference voltage Vref. Thus, the stability of the reference frequency is improved at the same time that the linearity correction is applied to the digital temperature measurement via the first corrected reference current.

The correction provided by the input generation circuit 100 of FIG. 4 is based on two corrected reference currents In (or In 1) and Ivr are involved, in which case a small portion of the PTAT current is added to the current Inpo to form the current In and a different small portion of the PTAT current is added to the current Inpo Ivr is formed. These two corrected reference currents can be expressed as:

Assuming that the above equation is substituted into equation (5) and that the delay time t _d is again 0, a simplified form for the digital output signal ADCOUT is given by:

  The two small constants Kp and Kv must be chosen to reduce the linearity error of the temperature sensor system and minimize the disturbance to the reference clock frequency. Implementation of the three-port linearity correction method of the present invention requires determining an appropriate set of parameters Kp, Kv, Nc for the temperature sensor to minimize linearity and precision errors in the overall system. . The mathematical determination of the parameters Kp, Kv, Nc and the application of numerical analysis in the system will now be described.

The derivation of the parameters Kp, Kv, Nc is better explained by the use of an input generation circuit with normalized current values. 6 is a schematic diagram of an input generation circuit for the frequency ratio digitizing temperature sensor of FIG. 1 according to one embodiment of the present invention. Referring to FIG. 6, the input generation circuit 200 is configured in the same manner as the input generation circuit 100 of FIG. 4 except for the current multiplication coefficient applied in the linearity IDAC circuit. In FIG. 6, the first and second corrected currents are normalized to maintain a constant overall current magnitude for each current through the temperature sensor. That is, in the input generation circuit 100, when the Kp × IPTAT current which is a part is added to the current Inpo, the corrected reference current In obtained as a result is obtained. 1 necessarily has an increased current magnitude. The same can be said for the corrected reference current Ivr. In some applications, this increased current magnitude is undesirable. In that case, the input generation circuit 200 of FIG. 6 can be used, in which case the reference current remains constant across the temperature sensor system.

The input generation circuit 200 generates a normalized first corrected reference current In A data linearity IDAC 210 for supplying 1 and a reference linearity IDAC 220 for supplying a normalized second corrected reference current Ivr. In the data linearity IDAC 210, the buffer 214 applies the current multiplication factor Kp to the PTAT current IPTAT1 to generate a first fraction of the PTAT current, ie a first part. Buffer 212 applies a 1-Kp current multiplication factor to temperature independent current Inpo to provide an INPO current that is reduced in magnitude by the amount of Kp. The current outputs from buffers 212 and 214 are summed by adder 216 to provide a first corrected reference current In on mode 218. 1 and in that case the current In 1 has a final current magnitude that is the same as the current Inpo. Therefore, the current In 1 is used as the reference oscillator input current Iref and is used to generate the reference voltage Vdata for the data oscillator in the same manner as described above.

  In the reference linearity IDAC 220, the buffer 222 applies the current multiplication factor Kv to the PTAT current IPTAT2 to generate a second fraction or second part of the PTAT current. Buffer 222 applies a 1-Kv current multiplication factor to temperature independent current Inpo to provide an INPO current that is reduced in magnitude by the amount of Kv. The current outputs from buffers 222 and 224 are summed by adder 226 to generate a second corrected reference current Ivr on node 228, where current Ivr is the same as current Inpo. Have The current Ivr is then used to generate a reference voltage Vref for the reference oscillator in the same manner as described above.

  Next, determination of the parameters Kp, Kv, and Nc will be described. The three-port linearity correction method for a frequency ratio digitizing temperature sensor of the present invention uses a voltage having a temperature coefficient different from the temperature coefficient of the corrected current used to generate the reference voltage Vdata and used as the current Iref. Supplying a corrected current to resistor Rref to generate Vref provides a more stable reference clock frequency while keeping temperature digitization linearity errors to a minimum. In order to minimize variations in the reference frequency, it is desirable that the corrected current for the reference oscillator cancel as much as possible the variations due to capacitance and resistance drift.

  First, a normalized function including primary and secondary temperature effects for the reference oscillator resistance value Rref and capacitance value Cref is given as follows.

The two normalized functions of equations (9) and (10) are multiplied together to yield Rn (T) Cn (T)
Form. Next, when the ratio of the first corrected current In to the second corrected current Ivr is set equal to the normalized RnCn function, the most stable reference frequency is obtained. Accordingly, the first design constraint condition of the three-port linearity correction method is given as follows.

  The ratiometric constraint defined in equation (11) can be defined in another form as follows.

  The second constraint is then derived using equation (5) above describing the transfer function of the digitized temperature sensor digital output signal ADCOUT. In the case of a digitized temperature sensor, it is desirable for the digital output signal ADCOUT to be a linear function defined as some gain constant × T over the desired temperature range T. For convenience of explanation, it is assumed that a gain constant “a” having a value of 1 is divided by Nc. If the offset error does not affect the linearity and is ignored, the desired linearity equation can be written as follows for the temperature T range.

  Equation (13) can be rewritten and simplified to form a general second constraint for linearizing a frequency ratio digitizing temperature sensor over a temperature range T using a three-port linearity correction method. Is possible. The second design constraint condition is expressed as follows.

  Therefore, it is possible to optimize the linearity of the digitized temperature sensor by appropriately selecting the ratio of the PTAT current It to the reference current In used as both the reference voltage Vdata and the reference current Iref. The optimal choice of this ratio in the general case now depends in part on the ratio of the delay time to the equivalent RC product in the data I / F converter. The optimum selection of the current ratio is also separate for each selected value of the gain parameter a. The ratio Ivr / In has been previously determined by the equation for the first constraint.

  The two constraints described above are used to determine the best choice of correction parameters Kv and Kp and the gain adjustment parameter Nc and offset for the exemplary temperature sensor system. In order to simplify mathematical calculations, the normalized input generation circuit of FIG. 6 is used. The first constraint condition requires the current ratio Ivr / In defined by equation (12) above and is repeated below.

  The equation in normalized polynomial form can be obtained by fitting a curve to the measured or simulated values of R and C normalized over the temperature range of interest. To use the equation defining the second constraint above to linearize the system, the first unknown that needs to be found is the current In, which is given by:

Equation (16) is a recursive function of In, but the ratio Ivr / In can be determined in approximate polynomial form from Equation (15) of the first constraint. By substituting Equation (1 5) in equation (16), the variable In is removed from the right side of equation (16). This substitution allows equation (16) to be solved directly for In. In equation (16), T is a temperature variable at a temperature in Celsius. It should be noted that all four current terms in equation (16) above are functions of temperature T. The current Ip is a PTAT current and its polynomial with respect to temperature T can be described by fitting a curve to the measured values of current Ip taken at different temperatures. The resistance value R is the resistance value of the resistor Rref used at the reference voltage input to the reference I / F converter and is a function of the temperature T. The capacitance value C is a capacitance value of the integrated capacitor Cref at the reference I / F and is a function of the temperature T. T _d is a fixed delay time in the data or reference I / F converter. Finally, the gain parameter “a” is selected to renormalize the output range after the linearization process.

  In this example, the renormalization gain adjustment is implemented digitally by adjusting the number of reference periods Nc per conversion. In one embodiment, it is convenient to normalize the output data such that 8 LSBs form 1 ° C. Accordingly, the gain parameter “a” is defined as follows.

  Equations (16) and (17) can be combined to give:

If the parameters I _p , R (T), C (T) in equation (18) above are all replaced by polynomials fitted to those curves, we get an approximate porous expression for In Is possible, which is a function of the variable T over the temperature range of interest and a function of the gain count parameter Nc.

  When implementing the linearity correction of the present invention, the goal is an extra PTAT current that must be added to the temperature independent Inpo current to form the current In so that the temperature output signal is linearized. Is to find a certain amount of. To simplify the mathematical process, assume that the values of Inpo, Ip, R (T), C (T) are all normalized functions that are 1 at T = 0 ° C. In order to form the normalized correction current In, it is necessary to decrease the constant Inpo component when the PTAT component is increased by an amount Kp, as shown in FIG. 6 and the following equation (19).

  Solving for Kp in equation (19) above yields:

  Similarly, the following equation is obtained by solving for the normalized correction current Ivr.

  The correction current Ivr can be expressed in an approximate polynomial form from the polynomial form of In, R (T), C (T). Again, correction can be achieved by adding a small portion of the PTAT current to the Inpo current to obtain the desired normalized correction current Ivr.

  An approximate polynomial for the currents Inpo and Ip is determined by measuring the current over temperature, and a polynomial describing the currents In and Ivr can be mathematically determined from the polynomials for the currents Inpo and Ip. Substituting these polynomials into the above equation and evaluating at a known temperature T and gain count Nc, it is possible to obtain simultaneous estimates of Kp and Kv at each pair of temperature and gain count Nc values. . From the values of Kp and Kv, approximate currents Ivr ′ and In ′ can be determined and the resulting linearity error and reference clock drift of the temperature sensor can be calculated over temperature or physically It is possible to measure.

  One convenient way to determine the best set of values for Kp, Kv, Nc, Offset Adjustment is to use the above formula to estimate Kp and Kv at each target value of Nc. Calculate simultaneously and then examine the resulting linearity and offset exhibited by the temperature sensor over the temperature range of interest when using these estimated values. The linearity error and the required offset correction are typically obtained by use of a suitable I / F converter and a direct computer evaluation of a polynomial describing the current substituted into the ADCOUT transfer function equation above. .

  FIGS. 7-10 illustrate the evaluation of various system characteristics at each value of gain count Nc for the digitized temperature sensor of FIG. 1 incorporating the input generation circuit of FIG. FIG. 7 is a plot illustrating the peak-to-peak linearity temperature error in degrees C as a function of gain count Nc for the frequency ratio digitized temperature sensor of FIGS. FIG. 8 is a plot illustrating the change in reference frequency as a function of gain count Nc for the frequency ratio digitized temperature sensor of FIGS. FIG. 9 is a plot illustrating correction factors Kp, Kv and offset adjustment values as a function of gain count Nc for the frequency ratio digitized temperature sensor of FIGS. FIG. 10 is a plot illustrating the digitized temperature error-temperature for the frequency ratio digitized temperature sensor of FIGS. 1 and 6 implemented using the correction factor selected using FIGS. 7-9.

  As can be seen from FIG. 7, there is a minimum in the linearity error of the system at one optimal value of Nc, which generates simultaneous optimal estimates of Kp and Kv and offset adjustment. As shown in FIG. 8, when Nc changes with simultaneous changes in Kv and Kp, the peak-to-peak stability of the reference clock frequency does not change significantly. FIG. 9 shows Kp, Kv and the calculated target value of the offset adjustment as a function of Nc, the offset adjustment being expressed as a percentage of the full scale range. By selecting the Kv, Kp, Nc, and offset adjustment values (ie, the values in the dotted box) for the Nc value that resulted in the minimum temperature error, a temperature of ± 0.05 ° C over a range of -25 to 85 ° C A temperature sensor with less error can be obtained as shown in FIG.

  FIG. 11 is a plot illustrating the percentage change in the reference frequency over temperature for the frequency ratio digitized temperature sensor of FIGS. 1-6 implemented using the correction factor selected using FIGS. 7-9. As can be seen from FIG. 11, the peak-to-peak frequency error of the reference frequency over the range of −25 to 85 ° C. is only 0.06%.

  In the above description, the frequency ratio digitizing temperature sensor is described as implementing a 3-port linearity correction method. In some applications, the stability of the reference frequency is not critical. If the application using the digitized temperature sensor of the present invention can tolerate moderate variations in the reference frequency, eg, about 1.25% peak-to-peak variation, then a two-port linearity correction method It is possible to apply. In the two-port linearity correction method, only one corrected reference current is generated and the reference frequency is left uncorrected. Therefore, compared to the three-port linearity correction method, the two-port linearity correction method is simplified in practice and can be beneficially applied in some applications.

FIG. 12 is a schematic diagram of an input generation circuit that implements two-port linearity correction for the frequency ratio digitizing temperature sensor of FIG. 1 according to a third embodiment of the present invention. Referring to FIG. 12, the input generation circuit 300 is configured in the same manner as the input generation circuit 100 of FIG. 4 except that the reference linearity IDAC is omitted. Accordingly, in the two-port linearity correction method, the corrected reference current In generated by adding the current Inpo (node 308) and the Kp fraction (proportion) of the PTAT current IPTAT1345. 1 (node 318) is used simultaneously to modify the reference current Iref of the reference oscillator and the reference voltage Vdata of the data oscillator. In particular, the corrected reference current In 1 is mirrored by buffer 319 to form current In, which is used as input reference current Iref (node 336) for the reference oscillator. Corrected reference current In 1 is applied to the resistor Rdata to generate the reference voltage Vdata (node 334) for the data oscillator.

  However, the reference voltage Vref (node 338) for the reference oscillator is generated by applying a temperature independent voltage Inpo directly to the reference resistor Rref. Therefore, in the 2-port linearity correction method, only the correction coefficient Kp is required and the correction coefficient Kv is not required.

  In the input generation circuit 300 of FIG. 12, the corrected reference current In is given by the following equation.

The transfer function for the digital output signal ADCOUT is given by the following equation assuming that the time delay t _d through the I / F converter is negligible.

The linearity of the transfer function in equation (24) can be adjusted by adjusting the value of a single constant Kp. Increasing Kp results in a transfer function whose linearity becomes increasingly bowed, which cancels out the inherent “bowl” shape error of the uncorrected system. The amount of bow correction obtained using the two-port linearity correction method is even more pronounced than when using the three-port linearity correction method. In one embodiment, the correction factors applied using the three-port linearity correction method are Kp = 0.14193, Kv = 0.1833, Nc = 2630, and offset≈0LSB. In order to achieve the same linearity correction result when using the two-port linearity correction method, the applied correction factors are Kp = 0.0475, Kv = 0, Nc = 2613 and offset≈0LSB. It should be noted that for the same linearity correction results, a smaller value of Kp is required in the two-port linearity correction method than in the three-port method. This means that the amount of PTAT current that needs to be added to the Inpo current to linearize is less. In fact, based on the simulation results, the two-port linearity correction method actually produces slightly better results, in the case of the three-port linearity correction method, 0.089 ° C. p-p. 0 while. 0 847 ° C pp error.

  FIG. 13 is a plot illustrating the temperature error of the temperature output signal from the linearized temperature sensor of FIG. 12 when compared to an uncorrected temperature sensor. As can be seen from FIG. 13, the bow-shaped linearity error has been corrected by applying a correction factor Kp, and the resulting digital temperature output value has a peak-to-peak error of 0.0847 ° C. ing.

  FIG. 14 is a plot illustrating the change in the reference frequency in the frequency ratio digitized temperature sensor of FIG. 12 when linearity correction is applied compared to when no linearity correction is applied to the reference frequency. In the input generation circuit of FIG. 12, the reference frequency is not stabilized. Thus, when no linearity correction is applied (“no correction”), the reference frequency is stable. However, when linearity correction is applied through the use of the correction factor Kp (“Use Correction”), the reference frequency is about 1.25% peak-to-peak over a temperature range of −25 to 85 ° C. Change to level.

  FIG. 15 includes FIGS. 15 (a), 15 (b), 15 (c), and 15 (d), but the I / F converter in the frequency ratio digitizing temperature sensor of the present invention. 1 is a schematic diagram of a current / frequency (I / F) converter that can be used to realize Any I / F converter, whether conventional or to be developed, can be used in the frequency ratio digitizing temperature sensor of the present invention, but the data I / F Using the I / F converter of FIG. 15 to implement an F converter and a reference I / F converter provides certain advantages. In particular, the I / F converter 500 of FIG. 15 ensures a sum of propagation, logic and switching time delays that are constant over temperature, manufacturing process and power supply variations. Further, the delay time through the I / F converter is minimized, and the variation in the delay time is also minimized. Finally, the sum of the delays through the I / F converter is realized in such a way that the temperature performance of the input current Ibias controls the delay. Such a delay can be trimmed for optimum performance over temperature by trimming the temperature coefficient of the current Ibias applied to the I / F converter.

Referring to FIG. 15 (d), the I / F converter 500 receives the input current Iin and the input reference voltage Vref, and clk as a frequency output signal. The out signal is supplied. When applied to the temperature sensor of FIG. 1, the input current Iin is either the input current Idata or the reference current Iref, and the input reference voltage is either the reference voltage Vdata or the reference voltage Vref. clk The out signal is either an Fdata output signal or a Fref output signal. The I / F converter 500 further receives a bias current Ibias as an input current and reset. The lo signal is received.

Referring to FIG. 15, the I / F converter 500 includes a D flip-flop I11 for controlling charging of two capacitor arrays I21 and I22. D flip-flop I11 operates to alternately apply input current Iin to charge up one of these capacitor arrays. For example, D flip-flop I11 asserts and activates control signal “dswitch” to apply input current to upper capacitor array I21 and to charge up the voltage at node “dintcap”. In the upper capacitor array I21, the voltage at the node dintcap is the input reference voltage Vref. It is charged until the in level is reached, in which case the upper comparator 502 asserts its output signal. The D flip-flop I11 asserts the control signal dswitch2 to apply the input current to the lower capacitor array I22 and charge up the voltage at the node dintcap2. In the lower capacitor array I22, the voltage at the node dintcap2 is the input reference voltage Vref. It is charged until the in level is reached, at which time the lower comparator 504 asserts its output signal. Output signals “bufdout” and “2bufdout” are coupled to a logic gate to drive D flip-flop I11 to reset and clock the D flip-flop.

  Comparators 502 and 504 can be implemented in a conventional manner. In one embodiment, the comparator includes a capacitor that can be adjusted for a fixed delay. In addition, the comparator performs a chopping operation so that the offset voltage error in the comparator is reversed in sign every other comparison cycle. Thus, the average delay time of the entire comparator and I / F converter is not affected by variations in supply voltage or temperature.

  The temperature coefficient of the bias current Ibias applied to the I / F converter 500 can be trimmed so that the delay time in the comparator is very constant. A bias current Ibias is coupled to the current mirror to provide mirror voltage drive for the current source devices in comparators 502 and 504.

  The switches (transistors M12 and M0) that control the flow of the input current Iin to one of the two charging capacitors I21 and I22 are configured as current switches instead of voltage switches. Therefore, these switches operate like a differential pair supplied from the input current Iin. The flow of the input current Iin is controlled so that its gate drive voltage is close to ground. The flow control device (switch M12 or M0) in the selected capacitor array operates like a grounded gate cascode, isolates the input current source Iin from the glitch generated in the comparator and provides the input current Iin. A constant voltage (for example, one TMOS gate-source Vgs higher than the ground) is applied to the current source.

  Devices M3 and M1 are used to first-order cancel the excess charge injected at the moment of switching, where the injected charge is dependent on temperature and supply voltage. The reset of the logic circuit gives a known state at reset.

In one embodiment, a low threshold voltage transistor device (FIG. 15), where appropriate, to allow the I / F converter 500 to function with a very low power supply voltage (eg, 1.1 volts or less). "Low" Vt ") is used to enable low supply voltage operation.

RFID Temperature Logger Upon understanding this specification, those skilled in the art will appreciate that the frequency ratio digitizing temperature sensor of the present invention has many applications in the electronics field. According to one aspect of the present invention, the frequency ratio digitizing temperature sensor of the present invention is incorporated into a radio frequency identification (RFID) transponder or tag to provide temperature logging capability in the RFID tag. The resulting RFID tag, also called an RFID temperature logger, operates to measure and store ambient temperature values, in which case the measurement interval or measurement interval is pre-programmed. Or can be programmed on demand. Temperature measurements are stored in the RFID temperature logger and can be recalled as needed. In this way, an RFID tag incorporating temperature measurement capability is realized.

  In one embodiment, the RFID temperature logger is implemented as a semi-passive RFID tag. Since it is a semi-passive RFID tag, a part of the circuit of the RFID tag is supplied with power by a battery outside the RFID tag. The semi-passive RFID tag includes an RF communication block, a control logic block, and a sensor block incorporating the frequency ratio digitizing temperature sensor of the present invention. In this embodiment, the control logic block and sensor block are battery powered, while the RF communication block is powered by the incoming RF signal. According to one aspect of the invention, the sensor block is configured as a dual function temperature / voltage sensor for measuring both ambient temperature and battery voltage.

  In another embodiment, a three-port linearity correction method is used in the frequency ratio digitizing temperature sensor, so that the sensor block provides a stable reference clock, which, as will be described in more detail below, provides control logic. It can be used to calibrate the real time clock of the block.

FIG. 16 is a schematic diagram of an RFID temperature logger according to one embodiment of the present invention. Referring to FIG. 16, RFID temperature logger 600 includes an RF communication block 602, a control logic block 604, and a temperature / voltage sensor block 606 (hereinafter referred to as “sensor block”). The RFID temperature logger 600 is semi-passive and is coupled to an external battery 620 for receiving power to supply control logic block 604 and sensor block 606. Battery 620 is coupled between the BAT terminal and ground terminal of temperature logger 600 and provides battery voltage V _bat to the control logic block and the sensor block.

  The RFID temperature logger 600 also has crystal pins XCKI and XCKO to which a crystal oscillator 610 can be coupled. Crystal oscillator 610 provides a reference frequency to control logic block 604. The crystal oscillator 610 is optional and can be omitted in the temperature logger 600 because the sensor block 606 can provide a stable reference frequency, as will be described in more detail below.

  In this embodiment, the RF communication block 602 is coupled to a first RF port RF1 and a second RF port RF2 for receiving an incident RF signal detected by an antenna (not shown). The RF communication block 602 communicates with the control block 604 via the bus 612 to read or write data stored in the control logic block 604 according to the command by the incident RF signal. The RF communication block 602 also communicates with the sensor block 606 via the bus 622. Sensor block 606 communicates with control logic block 604 via bus 614. Control logic block 604 provides control signals for initiating temperature or voltage measurement functions in sensor block 606, and sensor block 606 provides measured temperature or voltage data for storage in control logic block 604.

In accordance with one aspect of the present invention, sensor block 606 also provides a stable reference clock to control logic block via bus 618, which stable reference clock calibrates the real time clock in the control logic block. Used for. Thus, no external crystal oscillator is required for the RFID temperature logger 600 to operate. According to another aspect of the invention, control logic block 604 is powered via bus 616. A save signal is provided to the sensor block 606 to power off the sensor block 606 to save power, as described in more detail below.

  In one embodiment, the RF communication block 602 is implemented as an EPC class 0+ compliant RFID communication core for providing RF communication via the first and second RF ports RF1 and RF2. The RF communication block 602 includes an embedded state machine to communicate to and from the control logic block 604 and to and from the sensor block 606. In one embodiment, sensor data supplied by sensor block 606 and commands and instructions to be sent to sensor block 606 are carried via a wireless RF link received and detected by RF communication block 602. Data and commands intended for sensor block 606 are passed to and from sensor block 606 via bus 622.

  In one embodiment, the wireless RF link is at a frequency of 900 MHz and supports a data rate of 16 KBps to 80 KBps. Forward link communication from the RFID reader to the RFID temperature logger 600 takes place via amplitude modulated RF at a modulation depth between 30% and 100%. Backlink communication from the RFID temperature logger 600 to the RFID reader takes place via passive backscatter. As described above, the RFID communication block 602 does not receive battery power, but instead is powered through incident RF on the antenna.

Control logic block 604 includes registers and memory for storing commands received from RF communication block 302 and for storing temperature or voltage data provided by sensor block 606. Control logic block 604 operates to control the operation of RFID tag 600. Control logic block 604 receives battery power from an external battery 620. In this example, control logic block 604 receives a pair of input terminals Clock for receiving an input clock signal from external crystal oscillator 610. In is included. This input clock signal allows the control logic to synchronize with its real time clock. However, Clock The In terminal and external crystal oscillator 610 are optional and may be omitted in other embodiments of the invention. In particular, if the sensor block 606 provides a stable reference clock on the bus 618, the crystal oscillator 610 is not necessary.

  In one embodiment, control logic block 604 operates to provide or initiate a temperature measurement command by sensor block 606. The temperature measurement can have a user selected interval of 1 second to 8 hours. The onset of temperature logging can be at power up, only at high or low temperature trip points, or after some delay time. Further, in one embodiment, control logic block 604 includes a memory for storing up to 4000 temperature measurements at 8 bits per sample. The control logic block can also be programmed to record the minimum and maximum temperatures measured during each measurement operation and to provide a warning signal if the temperature measurement exceeds a pre-programmed level It is.

  Control logic block 604 also controls sensor block 606 to measure battery voltage and conserve battery power. If the sensor block 606 is not taking temperature measurements, the control logic block 604 instructs the sensor block 606 to power down to conserve battery power. Control logic block 604 also wakes up sensor block 606 to perform a measurement operation. When the measurement operation is complete, control logic block 604 turns off its internal clock signal to power down control block 606 and its own internal circuitry. In one embodiment, if no measurement is taking place, control logic block 604 powers off all of its own circuitry except the sensor block and data memory. In this way, power consumption is reduced to the initial level and battery power can be extended to a longer lifetime.

In this embodiment, the sensor block 606 measures the battery voltage V _bat and the ambient temperature. From the battery voltage measurements provided by sensor block 606, control logic block 604 can determine whether the battery power is low. When battery power is low, control logic block 604 is powered on bus 616. A save command can be supplied to power down the sensor block 606, saving the remaining battery power. In one embodiment, power The save command causes the battery power to be disconnected from the sensor block 606 so that no further battery power is consumed. In another embodiment, if battery power is at a critical level, control logic block 604 and sensor block 606 are powered down except for data memory, and the remaining battery power stores measurement data. Used to maintain data memory.

For example, as shown in FIG. 17, the battery voltage V _bat is connected to the power supply voltage Vdd node 680 for the temperature / voltage sensor block 606 via the switch S2. The power supply voltage Vdd node 680 represents the power supply voltage connected to supply to the circuits in the sensor block. Switch S2 is power It is controlled by the save signal. power When the save signal is not asserted to represent good battery power conditions, switch S2 is closed to allow battery power to be coupled to the power supply voltage node 680 of sensor block 606. power If the save signal is asserted to indicate a lower battery power condition, switch S2 is opened to disconnect the battery voltage from the sensor block.

The temperature / voltage sensor block 606 will be described in detail. 17 is a schematic diagram of a temperature / voltage sensor block that can be incorporated into the RFID temperature logger of FIG. 16 according to one embodiment of the present invention. Referring to FIG. 17, the sensor block 606 is configured to measure the ambient temperature and the battery voltage _Vbat . The sensor block 606 is powered by an external battery 620. In one embodiment, sensor block 606 is designed to operate with a 1.55V silver oxide coin cell and is accurate over -25 to 85 ° C even when the battery discharges to 1.1V or less. Functions to provide temperature and voltage measurements.

The temperature / voltage sensor block 606 implements the frequency ratio digitized temperature sensor architecture described above with reference to FIGS. 1-15. However, in accordance with the present invention, sensor block 606 is configured to measure both temperature and voltage using the same digitizer circuit. To implement the temperature measurement function, the sensor block 606 includes a temperature sensor 625, which, as described above with reference to FIG. 1, for the temperature digitizer circuit, PTAT current (IPTAT) and CTAT. Supply current (ICTAT). CTAT current ICTAT is equal to ICTAT of input generation circuit 630. The PTAT current IPTAT is supplied to the IN input terminal while the ITAT of the input generation circuit 630 Supplied to the IN input terminal.

In order to realize the voltage measurement function, the sensor block 606 uses a resistor voltage divider composed of resistors R1 and R2. This resistive voltage divider is connected to battery voltage terminal BAT and ground voltage and receives battery voltage V _BAT . A current IBAT representing the battery voltage is provided on node 618. The resistance values of resistors R1 and R2 are selected to establish the desired slope of current IBAT. The current IBAT is supplied to the switch S1 and is connected to the frequency ratio digitizer circuit in the sensor block 606 by a switch operation, as will be described in more detail below.

  The frequency ratio digitizer circuit of sensor block 606 is implemented in the same manner as described above with reference to FIGS. 1-15. In particular, the digitizer circuit includes an input generation circuit 630 and a frequency ratio analog to digital converter (ADC). Input generation circuit 630 receives two temperature dependent currents IPTAT and ICTAT. The input generation circuit 630 generates input signals IDATA, VDATA, IREF, and VREF necessary for driving the frequency ratio ADC. The operation of the input generation circuit 630 for generating the current and voltage signals IDATA, VDATA, IREF, VREF is the same as described above with reference to FIGS. 1-15. In this embodiment, the frequency ratio ADC includes a current / frequency (I / F) converter 640 and a counter and subtraction circuit 660. The counter and subtraction circuit 660 can receive offset adjustment and gain adjustment signals from the control logic block. The frequency ratio ADC supplies an output signal ADCOUT as a measurement output signal of the frequency ratio digitizer.

  The signal IDATA supplied to the I / F converter 640 represents the data signal to be digitized into the measurement output signal ADCOUT. Thus, if a temperature measurement is taken, the signal IDATA is a temperature dependent PTAT current IPTAT. When the battery voltage measurement is taken, the signal IDATA is the voltage dependent current IBAT. In accordance with the dual function temperature / voltage measurement mechanism of the present invention, the voltage dependent current IBAT and the temperature dependent current IPTAT are coupled to the switch S1 to be alternately coupled to the frequency ratio ADC. Switch S1 receives a select signal provided by control logic block 604 via bus 614 and selects either current IPTAT or current IBAT to be coupled as signal IDATA to I / F converter 640 for digital conversion. select. Thus, the digitizer circuit of sensor block 606 provides an ADCOUT signal representing either a temperature measurement or a voltage measurement that is coupled as an IDATA signal to the I / F converter.

Once the battery voltage value is measured, control logic block 604 can determine whether there is sufficient battery power to continue the temperature measurement operation. In one embodiment, sensor block 606 is activated only when the battery voltage is higher than 1.1V. Thus, if the battery voltage measurement provided by sensor block 606 indicates that the battery voltage is less than 1.1V, control logic block 604 may The sensor block 606 is shut down by generating a save signal.

  In FIG. 17, select signals, offset and gain adjustment signals, and ADCOUT output signals are communicated between control logic block 604 and sensor block 606 via bus 614. In one embodiment, to save battery power, most of the digitizer circuit is configured to be shut down during the measurement conversion, while the interface circuit between the sensor block and the logic control block again has a measured value. Since it is required to restart the sensor block when taken, a power-up condition is maintained near zero quiescent power drain.

  One feature of the dual function temperature / voltage sensor of the present invention is that the sensor is configured so that the temperature and voltage measurements share the same offset and gain adjustment values for the digitizer circuit. In particular, the PTAT current IPTAT at the selected temperature measurement point (eg, 0 ° C.) is set to be the same as the battery current IBAT at the selected voltage measurement point (eg, 1.5 V). As such, the voltage measurement offset and gain adjustment values track the temperature measurement and only a single set of offset and gain adjustment values are required for both measurements.

  As described above, when the frequency ratio digitizing temperature sensor of the present invention implements the three-port linearity correction method, the frequency ratio digitizing temperature sensor provides a stabilized reference clock frequency, and the temperature digital Minimize the linearization error. The stabilized reference clock frequency can be used for clock calibration. Thus, according to the present invention, sensor block 606 is configured to implement a three-port linearity correction method and a reference clock signal is provided on bus 618. This reference clock signal can then be provided to the control logic block 604 for use in calibrating the control logic block clock signal.

  18 is a circuit diagram of a battery current and PTAT current selection circuit that can be incorporated into the temperature / voltage sensor block of FIG. The battery current generation circuit and the battery current and PTAT current selection circuit illustrated in FIG. 17 are simplified to illustrate the operating principle of the temperature / voltage sensor block 606. FIG. 18 shows a battery current and PTAT selection circuit that can be used to generate a current representative of the battery voltage and selectively couple the battery current or temperature dependent PTAT current as an input signal IDATA to the I / F converter. 700 practical implementations are illustrated.

Referring to FIG. 18, in circuit 700, battery voltage V _BAT is coupled to a resistor divider formed by resistors R1 and R2. The battery voltage V _BAT is also power It is coupled to the power supply voltage Vdd node via a switch S2 controlled by the save signal. Thus, in circuit 700, all circuits are connected to the power supply Vdd voltage, except for the resistor voltage divider of resistors R1 and R2 (and associated transistor M54), and thus power as described above. All circuits can be disconnected from battery power when the save signal is asserted.

In order to measure the battery voltage, a pair of series-connected resistors R1 and R2 are connected between the battery voltage V _BAT and the ground voltage VSS to form a resistive voltage divider. An NMOS transistor M54 controlled by the VBAT_sel signal is coupled between resistors R2 and VSS, and the resistor voltage divider is connected when battery voltage measurement is selected, or when battery voltage measurement is not selected. Disconnect the resistor divider. Transistor M54 is VBAT Controlled by the sel signal, it is asserted when battery voltage measurement is selected. In operation, transistor M54 is used to break the DC current path of battery current through resistors R1 and R2, so that battery power is drained when no battery voltage measurement is taken. There is no. Transistor M54 is configured to have a very large width to length ratio, so that only a small voltage drop is generated across transistor M54. That is, when the transistor M54 is turned on, the resistance value across the transistor is negligible compared to the resistance values of the resistors R1 and R2.

Resistor voltage dividers of resistors R1 and R2 provide a current Inn, which is coupled to a first input terminal of an operational amplifier (opamp) 730. The operational amplifier 730 is in the form of a feedback loop, and the output terminal of the operational amplifier 730 is coupled to drive the PMOS transistor M67. The PMOS transistor M67 has a source terminal coupled to the battery voltage V _BAT and supplies a current Inp to the second input terminal of the operational amplifier 730 at its drain terminal. The output terminal of the operational amplifier 730 is also coupled to drive the PMOS transistor M56 in order to supply the drain current IBAT representing the battery V _BAT. Transistor M67 is ten times transistor M56, so input currents Inn and Inp can have large current values, while output current IBAT in transistor M56 remains at a small current level. In particular, by using a transistor ratio of 10: 1 for transistors M67 and M56, the resistance values for resistors R1 and R2 are kept small since currents Inn and Inp can have larger values. It is possible. That is, it is not necessary to use large resistance values for resistors R1 and R2 in order to obtain smaller current values for currents Inn and Inp. Even if the resistance values of the resistors R1 and R2 are small and the input currents Inn and Inp are large, the output current IBAT in the transistor M56 remains smaller for the use of the ratio transistor M67 / M56. In one embodiment, currents Inn and Inp are in the range of 20 μA and current IBAT is in the range of 2 μA.

  In another embodiment, operational amplifier 730 uses a chopper configuration to minimize the offset voltage error between the first and second input terminals.

In this embodiment, the accuracy of battery voltage measurement is ensured by using a resistor trimming digital-to-analog converter (DAC) 720. More specifically, manufacturing process variations may cause resistance value variations for resistors R1 and R2. Variations in these resistance values are trimmed by the resistance trimming DAC 720 so that the battery current IBAT is not affected by manufacturing process variations. In this example, the resistor trimming DAC has a PMOS transistor coupled to each trimming resistor. A series of trimming transistor / resistor pairs are provided to allow precise trimming of the resistance values of resistors R1 and R2. It is turned on by trimming program codes W _{0 to} W _n to select one or more trimming resistors. The structure of the resistor trimming DAC is exemplary only, and other trimming circuit configurations can be used in other embodiments of the present invention. Further, the resistor trimming DAC 720 is optional and can be omitted in other embodiments of the invention.

The battery current IBAT generated by the operational amplifier 730 in association with the PMOS transistor M56 and the temperature dependent PTAT current IPTAT are switched as the input signal IDATA and connected to the I / F converter 640. In this embodiment, battery current IBAT is coupled to the IDATA terminal via switch S71, while current IPTAT is coupled to the IDATA terminal via switch S72. Switch S71 is VBAT controlled by the sel signal, while switch S72 is IP Controlled by the sel signal. VBAT sel signal and IP The sel signal is a complementary and non-overlapping signal. VBAT When the sel signal is asserted, The sel signal is deasserted, so the battery current IBAT is coupled to the IDATA terminal. VBAT When the sel signal is deasserted, The sel signal is asserted, so the PTAT current IPTAT is coupled to the IDATA terminal.

If no battery current or PTAT current is applied, the current is passed to another path to ground so that unused current does not affect the operation of the sensor block. In this embodiment, the PMOS transistor M58 and the diode-connected NMOS transistor M63 provide another current path for the battery current IBAT. VBAT When the sel signal is deasserted, transistor M58 is turned on, draining battery current IBAT to ground node VSS via transistor M63. VBAT Transistor M58 is open circuit when the sel signal is asserted, so all of the battery current is directed to the IDATA terminal via switch S71.

On the PTAT current side, the PMOS transistor M64 and the diode-connected NMOS transistor M66 provide another current path for the PTAT current IPTAT. IP When the sel signal is deasserted, transistor M64 is turned on and drains current IPTAT through transistor M66 to ground node VSS. IP Transistor M66 is open circuit when the sel signal is asserted, so all of the PTAT current is directed through switch S72 to the IDATA terminal.

  The RFID temperature logger of the present invention as described above realizes an RFID having a temperature measurement function and a battery voltage monitoring function. Further, the RFID temperature logger does not require an external crystal oscillator, and can be realized with a reduced number of components. RFID temperature loggers achieve battery efficiency by powering down all digital circuits when no measurements are made. The RFID temperature logger of the present invention can be used immediately in an RFID system and can be easily applied.

  Although specific embodiments of the present invention have been described in detail above, the present invention should not be limited to these specific examples, and various modifications can be made without departing from the technical scope of the present invention. Of course, it is possible.

1 is a schematic diagram of a frequency ratio digitizing temperature sensor according to one embodiment of the present invention. FIG. The graph which illustrated the bow-shaped linearity error in the temperature measurement resulting from the propagation delay through a current-frequency converter. The graph which illustrated the linearity error of temperature dependence electric current. FIG. 2 is a schematic diagram of an input generation circuit that implements a three-port linearity correction in the frequency ratio digitizing temperature sensor of FIG. The graph which illustrated the temperature error of the temperature output signal from the linearization temperature sensor at the time of comparing with an uncorrected temperature sensor. FIG. 2 is a schematic diagram of an input generation circuit for the frequency ratio digitizing temperature sensor of FIG. 1 according to one embodiment of the present invention. FIG. 6 illustrates worst case peak-to-peak temperature error at celsius simulated over −25 to 85 ° C. plotted as a function of gain count Nc for the frequency ratio digitized temperature sensor of FIGS. FIG. 10 is a graph when correction coefficients Kv and Kp are calculated simultaneously for each value of Nc based on the results shown in FIG. 9. 9 illustrates the worst case peak-to-peak change in the reference frequency as a function of the gain count Nc for the frequency ratio digitized temperature sensor of FIGS. The graph at the time of calculating simultaneously in each value of Nc based on. Each target value of Nc at a single temperature for an exemplary system described by a polynomial approximation and solved by using the constraints of equations (11) and (14) for the frequency ratio digitized temperature sensor of FIGS. The graph which illustrated the numerical value of correction coefficient Kp, Kv, and an offset value in. FIG. 9 is a graph illustrating digitized temperature error-temperature for the frequency ratio digitized temperature sensor of FIGS. 1 and 6 implemented using the correction factor selected using FIGS. 7-9. FIG. 10 is a graph illustrating the percentage change in reference frequency with respect to temperature for a frequency ratio digitizing temperature sensor of the present invention implemented using the correction factor selected using FIGS. 7-9. FIG. 4 is a schematic diagram of an input generation circuit that implements two-port linearity correction for the frequency ratio digitizing temperature sensor of FIG. 1 according to a third embodiment of the present invention. The graph which illustrated the temperature error of the temperature output signal from the linearization temperature sensor of FIG. 12 at the time of comparing with an uncorrected temperature sensor. The graph which illustrated the change in the reference frequency in the frequency ratio digitization temperature sensor of FIG. 12 at the time of applying a linearity correction compared with the case where a linearity correction is not applied with respect to a reference frequency. Schematic which showed the combined state of FIG. 15a, FIG. 15b, and FIG. 15c. The partial circuit diagram which showed a part of current-frequency converter which can be used in order to implement | achieve the I / F converter in the frequency ratio digitization temperature sensor of this invention. FIG. 15B is a partial circuit diagram showing another part of the current / frequency converter partly shown in FIG. 15A; FIG. 15B is a partial circuit diagram showing still another part of the current / frequency converter shown in FIG. 15A and FIG. 15B. 1 is a schematic diagram showing an I / F converter 500. FIG. 1 is a schematic diagram of an RFID temperature logger according to one embodiment of the present invention. FIG. 17 is a schematic diagram of a temperature / voltage sensor block that can be incorporated into the RFID temperature logger of FIG. 16 according to one embodiment of the present invention. FIG. 18 is a circuit diagram of a battery voltage and PTAT current selection circuit that can be incorporated in the temperature / voltage sensor block of FIG. 17.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 Digitization temperature sensor 20 Temperature detection circuit 30 Input generation circuit 40,50 Current / frequency (I / F) converter 60,70 Counter 80 Subtraction circuit

Claims (20)

In the frequency ratio digitizing temperature sensor (10),
The temperature sensing circuit (20) supplies a current proportional to the absolute temperature ("PTAT current") and a second current complementary to the absolute temperature ("CTAT current");
An input generation circuit (30) is coupled to the temperature sensing circuit for receiving PTAT current and CTAT current, the input generation circuit generating a first current from a weighted sum of the PTAT current and the CTAT current, and the second current generation circuit. The current is independent of the primary temperature, and the input generation circuit further includes a first part of the PTAT current that is a part of the first current and the PTAT current, obtained by multiplying the PTAT current by a first correction factor. And a first output current representing a PTAT current; a first output voltage generated by applying the first correction current to the first resistor; A second output current representative of the first correction current and a second PTAT current obtained by multiplying the PTAT current by a second correction factor that is the first current or another part of the first current and the PTAT current. Part and Supplying a second output voltage which is generated by applying the second correction current is the sum to the second resistor,
Frequency ratio analog-to-digital converter, which includes a second output current and the reference oscillator for receiving a second output voltage with including a first output current and the data oscillator receiving the first output voltage, said first As a result of the correction current being applied to the first resistor to generate the first output voltage to the data oscillator and used as the second output current to the reference oscillator, the frequency ratio analog to digital converter is Generate linearity corrected temperature output signal,
A frequency ratio digitizing temperature sensor characterized by that. The frequency ratio analog-to-digital converter according to claim 1,
A first current-frequency converter (40) as the data oscillator receives a first output current and a first output voltage from the input generation circuit and supplies a first frequency output signal representing a PTAT current;
A second current / frequency converter (50) receives, as the reference oscillator, the second output current and the second output voltage from the input generation circuit and supplies a second frequency output signal which is a reference frequency.
A first counter circuit (60) receives the first frequency output signal and generates a first digital count value representing the number of clock cycles of the first frequency output signal over the conversion period;
A second counter circuit (70) receives the second frequency output signal and generates a second digital count value representative of the number of clock cycles of the second frequency output signal, the conversion period being the number of clock cycles of the second frequency output signal. Defined by a certain number,
A subtraction circuit (80) subtracts the second digital count value from the first digital count value, and the subtraction circuit provides a temperature output signal;
A frequency ratio digitizing temperature sensor characterized by that. In claim 1, the first output current is a replica of the PTAT current, and that the copy of the first correction current or first correction current is applied to the first resistor to generate a first output voltage Frequency ratio digitizing temperature sensor characterized by.   4. The frequency ratio digitizing temperature sensor according to claim 3, wherein the first correction current or a copy of the first correction current is applied as the second output current. The input generation circuit according to claim 1, further comprising:
Third portion and CTAT portion of the current of the PTAT current obtained by the first adder circuit (106) is multiplied by the third correction coefficient in a partially PTAT current PTAT current to generate a first current The CTAT current is coupled to add a fourth portion of the CTAT current obtained by multiplying the fourth correction factor , the first current having a non-linear characteristic with respect to temperature,
Second adding circuit (116) is added to a first portion of the first current and the PTAT current to generate a first correction current,
A frequency ratio digitizing temperature sensor characterized by that.   6. The input generation circuit of claim 5, further comprising a first buffer (114) that receives the PTAT current and applies a first correction factor to the PTAT current to generate a first portion of the PTAT current. Frequency ratio digitizing temperature sensor characterized by.   7. The frequency ratio digitizing temperature sensor according to claim 6, wherein the first correction coefficient has a value less than 0.15. 7. The input generation circuit according to claim 6, wherein the input generation circuit further receives the first current to generate a normalized first current and applies a first normalization correction coefficient that is 1-first correction coefficient to the first current. Frequency ratio digitizing characterized in that the second buffer supplies a normalized first current to a second summing circuit to be summed with a first portion of the PTAT current Temperature sensor. The input generation circuit according to claim 1 , further comprising:
The first adder circuit (1 06) is, in order to generate the first current, the third portion and the CTAT current PTAT current obtained by multiplying the third correction coefficient PTAT current to a part of a PTAT current Are combined to add a fourth portion of the CTAT current obtained by multiplying the CTAT current by a fourth correction factor , the first current having a non-linear characteristic with respect to temperature,
Second adding circuit (1 16), to generate a first correction current, Ri Contact is coupled so as to sum a first portion of the first current and the PTAT current,
Third adder circuit (1 26), to generate a second correction current, Ru coupled Tei to be added and a second portion of the first current and the PTAT current,
A frequency ratio digitizing temperature sensor characterized by that. The input generation circuit according to claim 9 , further comprising:
First buffer (1 14) generates a first portion of the PTAT current by applying and first correction coefficient receive PTAT current to the PTAT current,
Second buffer (1 22) to generate a second portion of the PTAT current by applying and second correction coefficient receive PTAT current to the PTAT current,
A frequency ratio digitizing temperature sensor characterized by that. The input generation circuit according to claim 1 , further comprising:
A third buffer (212) receives the first current and applies a first normalized correction factor, which is 1-first correction factor, to the first current to generate a first normalized first current, Supplying a first normalized first current to the second summing circuit to be summed with the first portion of the PTAT current;
A fourth buffer (224) receives the first current and applies a second normalized correction factor, which is 1-second correction factor, to the first current to generate a second normalized first current, Supplying a second normalized first current to the third summing circuit to be summed with the second portion of the PTAT current;
A frequency ratio digitizing temperature sensor characterized by that. In a method for generating a linearity corrected temperature output signal,
Supplying a current proportional to absolute temperature ("PTAT current") and a second current complementary to absolute temperature ("CTAT current");
A first current is generated from a weighted sum of the PTAT current and the CTAT current, and the first current is independent of the primary temperature,
Generating a first correction current which is a sum of a first current and a first part of the PTAT current obtained by multiplying the PTAT current by a first correction factor ,
Generating a first output current representative of the PTAT current;
A first output voltage is generated by applying a first correction current to the first resistor,
Generating a second output current representative of the first correction current;
A second correction current which is the first current or another part of the first current and the PTAT current and is the sum of the second part of the PTAT current obtained by multiplying the PTAT current by the second correction factor . A second output voltage is generated by applying to two resistors,
Coupling the first output current and the first output voltage to the data oscillator of the frequency ratio analog to digital converter and coupling the second output current and the second output voltage to the reference oscillator of the frequency ratio analog to digital converter ; The linearity corrected temperature output as a result of the first correction current being applied to the first resistor to generate the first output voltage to the data oscillator and used as the second output current to the reference oscillator Generate a signal,
A method characterized by that. In claim 12 , when the first and second output currents and the first and second output voltages are coupled to a frequency ratio analog to digital converter to generate a linearity corrected temperature output signal,
Applying a first output current and a first output voltage to a first current to frequency converter to generate a first frequency output signal representative of the PTAT current;
Applying the second output current and the second output voltage to the second current / frequency converter to generate a second frequency output signal that is a reference frequency,
Count the number of clock cycles of the first frequency output signal over the conversion period and provide a first digital count value;
Counting the number of clock cycles of the second frequency output signal and supplying a second digital count value, the conversion period being defined by a predetermined number of clock cycles of the second frequency output signal;
Subtracting the second digital count value from the first digital count value to generate a temperature output signal;
A method characterized by that. In claim 1 2, the first output current is a replica of the PTAT current is and applied replica of the first correction current or first correction current to the first resistor to generate a first output voltage A method characterized by that. According to claim 1 4, wherein the replication of the first correction current or first correction current is applied as a second output current. In Claim 12 , when generating the first current from the weighted sum of the PTAT current and the CTAT current, the first current is independent of the primary temperature,
Obtained by multiplying the fourth correction coefficient CTAT current a part of the third portion and the CTAT current part is a by PTAT current PTAT current obtained by multiplying the third correction coefficient of the PTAT current Adding a fourth portion of the CTAT current to generate a first current, the first current having a non-linear characteristic with respect to temperature,
A method characterized by that. The method of claim 12, wherein the first correction factor has a value less than 0.15. In claim 1, further comprising:
A voltage measuring circuit for measuring a first voltage and supplying a third current proportional to the first voltage;
A selection circuit (S1) that receives the first output current and the third current and selects one of the first output current and the third current as a current selected based on a selection signal;
The frequency ratio analog-to-digital converter (640 and 660) receives the selected current and the first output voltage, and receives the second output current and the second output voltage. A frequency comprising: a reference oscillator, wherein the frequency ratio analog to digital converter generates a linearly corrected digital output signal representative of a selected one of the PTAT current and the third current Ratio digitized temperature sensor. 19. In a semi-passive radio frequency identification (RFID) tag (600), coupled to a battery (620) that supplies a battery voltage for supplying power to a portion of the RFID tag circuit, and according to claim 18 A semi-passive radio frequency identification tag comprising a sensor block (606) having a frequency ratio digitizing temperature sensor. 20. The semi-passive radio frequency identification tag according to claim 19 , wherein the first voltage has the battery voltage and the sensor block (606) alternately measures ambient temperature and battery voltage.

Images