KR100885019B1 - Liquid crystal display - Google Patents

Abstract

The present invention relates to a liquid crystal display device.

In the present invention, in the liquid crystal display, a plurality of gate lines and data lines are formed in row and column directions, and a plurality of halftone selection lines are formed in a row direction, and an intersection of the gate line, halftone selection line, and data line is provided. A liquid crystal panel in which a plurality of pixels are each formed in a defined region; A gate driver supplying a gate driving voltage to the gate line and supplying a selection voltage to a middle gray level selection line; And a data driver configured to supply a corresponding gray voltage to the data line according to an applied data signal, each pixel including: a first pixel switch having a control terminal connected to the gate line and an input terminal connected to the data line; A pixel unit having one side connected to an output terminal of the first pixel switch and the other side connected to a common voltage, and an output terminal of the first pixel switch connected to a pixel electrode; A first memory unit for storing a gradation voltage corresponding to white and black data signals applied for displaying a still image from the data line; And a second memory unit configured to operate according to a selection signal applied through the intermediate selection line to transmit a gray voltage corresponding to the intermediate gray level signal applied from the data line to the pixel electrode.

According to the present invention, it is possible to express 27 or more gradations in displaying still images without using a separate converter.

Still image, halftone, gradation expression

Description

Liquid crystal display {LIQUID CRYSTAL DISPLAY}

1 is a block diagram of a liquid crystal display according to an exemplary embodiment of the present invention.

2 is an equivalent circuit diagram of one pixel of a liquid crystal display according to an exemplary embodiment of the present invention.

3 is a detailed circuit diagram of a pixel according to a first exemplary embodiment of the present invention.

4 is a diagram illustrating a frame configuration during pixel driving according to an exemplary embodiment of the present invention.

5 is a graph showing a voltage and a reflectance curve applied to both ends of the liquid crystal in an embodiment of the present invention.

6A to 6C illustrate waveform diagrams of voltages applied across both liquid crystals according to the first exemplary embodiment of the present invention.

7 is a detailed circuit diagram of a pixel according to a second exemplary embodiment of the present invention.

8A and 8B illustrate waveform diagrams of voltages applied across both liquid crystals according to a second exemplary embodiment of the present invention.

9 is a detailed circuit diagram of a pixel according to a third exemplary embodiment of the present invention.

10A to 10D are waveform diagrams of voltages applied across both liquid crystals according to the third exemplary embodiment of the present invention.

The present invention relates to a liquid crystal display device.

A general liquid crystal display (LCD) includes a liquid crystal layer having dielectric anisotropy interposed between two display panels. The desired image is obtained by applying an electric field to the liquid crystal layer and adjusting the intensity of the electric field to adjust the transmittance of light passing through the liquid crystal layer. Such liquid crystal displays are typical among portable flat panel displays (FPDs) that are easy to carry. Among them, TFT-LCDs using thin film transistors (TFTs) as switching elements are mainly used.

In the display panel on which the thin film transistor is formed, a plurality of gate lines and data lines are formed in row and column directions, respectively, and pixel electrodes connected to the gate lines and data lines are formed through the thin film transistors. The thin film transistor controls the data signal transmitted through the data line according to the gate signal transmitted through the gate line and transmits the data signal to the pixel electrode. The gate signal is generated by a plurality of gate driving integrated circuits (ICs) supplied with the gate on voltage and the gate off voltage generated by the driving voltage generator in combination with the control signals from the timing controller. The data signal is obtained by converting the gradation signal from the timing controller into a plurality of data driving ICs into analog voltages.                         

In such a liquid crystal display, when displaying a still image, one pixel may implement a total of three gray levels of black, white, and gray, which are intermediate grays. In the related art, a liquid crystal display device having a memory built in for each pixel has been proposed to display eight colors in a still image. Such a liquid crystal display device drives the liquid crystal using data stored in the memory at the time of a still image, thereby eliminating the need for driving through the data line, that is, driving by data provided from the timing controller, thereby consuming the charge and discharge of the data line. Can reduce power consumption.

However, such a conventional liquid crystal display device has a disadvantage in that the still image can display only eight colors, and thus there is a limit in color representation.

For this purpose, a plurality of memories may be used, but in this case, a digital / analog (D / A) converter for converting a digital signal into an analog signal for driving a liquid crystal should be built in the pixel. Accordingly, there is a disadvantage in that the pixel structure of the liquid crystal display device is complicated and the area of the pixel is increased.

Therefore, a technical object of the present invention is to provide a liquid crystal display device capable of expressing at least eight colors in a still image without using a D / A converter.

According to an aspect of the present invention, a plurality of gate lines and data lines are formed in a row and a column direction, and a plurality of intermediate gradation selection lines are formed in a row direction. A liquid crystal panel in which a plurality of pixels are respectively formed in an area defined by the intersection of the gate line, the halftone selection line, and the data line; A gate driver supplying a gate driving voltage to the gate line and supplying a selection voltage to a middle gray level selection line; And a data driver configured to supply a corresponding gray voltage to the data line according to an applied data signal, each pixel including: a first pixel switch having a control terminal connected to the gate line and an input terminal connected to the data line; A pixel unit having one side connected to an output terminal of the first pixel switch and the other side connected to a common voltage, and an output terminal of the first pixel switch connected to a pixel electrode; A first memory unit for storing a gradation voltage corresponding to white and black data signals applied for displaying a still image from the data line; And a second memory unit configured to operate according to a selection signal applied through the intermediate selection line to transmit a gray voltage corresponding to the intermediate gray level signal applied from the data line to the pixel electrode.

Here, the liquid crystal display device operates in the order of a moving picture display frame, a frame storing white and black signals for still image display, a halftone selection frame, a still picture display frame, and a still picture to moving picture frame.

In the meantime, when the gray scale display is selected in the middle gray selection frame that is the previous frame in the still image display frame, the liquid crystal display supplies a gray voltage corresponding to the applied half gray level signal to the pixel electrode, When the gray scale display is not selected, a gray voltage corresponding to the black and white signals stored in the first memory unit is supplied to the pixel electrode.

In the liquid crystal display having the above characteristics, the first memory unit may include: a first static memory configured to store a gray voltage corresponding to the white and black data signals; First and second control switches connected to both ends of the first static memory, respectively, and operated according to applied first and second control signals to transfer signals stored in the first static memory to pixel electrodes; It may include a third switch connected between the first pixel switch and the first and second control switch. In this case, the second memory unit may include a second static memory configured to store a voltage for displaying the halftone signal; A second pixel switch having a control terminal connected to the half-tone selection line and an input terminal connected to a data line to transfer the half-tone signal applied from the data line to the second static memory; And a fourth control switch connected to a first node of the second static memory and transferring a gray voltage corresponding to an intermediate gray level signal provided through an input terminal to the pixel electrode, wherein the third control switch Is operated according to the voltage stored in the second static memory so that the voltage stored in the first static memory is supplied to the pixel electrode.

The second memory unit may further include a second static memory configured to store a gray voltage for displaying the intermediate gray level signal; A second pixel switch having a control terminal connected to the half-tone selection line and an input terminal connected to a data line to transfer the half-tone signal applied from the data line to the second static memory; A fourth control switch connected to a first node of the second static memory and transferring a gray voltage corresponding to an intermediate gray level signal provided through an input terminal to the pixel electrode; Fifth and sixth control switches configured to apply the gray voltages corresponding to the first and second intermediate gray level signals applied by the signals stored in the first static memory to the pixel electrode through the fourth control switch; It may include. Even in this case, the third control switch operates according to the voltage stored in the second static memory so that the voltage stored in the first static memory is supplied to the pixel electrode.

In a liquid crystal display according to another aspect of the present invention, a plurality of gate lines and data lines are formed in row and column directions, respectively, and a plurality of first and second half-tone selection lines are formed in a row direction. A liquid crystal panel in which a plurality of pixels are respectively formed in an area defined by the intersection of the line, the halftone selection line, and the data line; A gate driver supplying a gate driving voltage to the gate line and supplying a selection voltage to a middle gray level selection line; And a data driver configured to supply a corresponding gray voltage to the data line according to an applied data signal, each pixel including: a first pixel switch having a control terminal connected to the gate line and an input terminal connected to the data line; A pixel unit having one side connected to an output terminal of the first pixel switch and the other side connected to a common voltage, and an output terminal of the first pixel switch connected to a pixel electrode; A first memory unit for storing a gradation voltage corresponding to white and black data signals applied for displaying a still image from the data line; A second memory unit operating according to a selection signal applied through the first intermediate selection line to transfer the gray voltages corresponding to the first and second intermediate gray level signals applied from the data line to the pixel electrode; A third memory unit operating according to a selection signal applied through the second intermediate selection line to transfer the gray voltages corresponding to the third and fourth intermediate gray level signals applied from the data line to the pixel electrode; And a switch unit for selectively supplying a gray voltage corresponding to the first to fourth intermediate gray level signals applied and operated according to the voltages stored in the second and third memory units to the pixel electrode.

DETAILED DESCRIPTION Embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the present invention. As those skilled in the art would realize, the described embodiments may be modified in various different ways, all without departing from the spirit or scope of the present invention.

1 is a block diagram of a liquid crystal display according to an exemplary embodiment of the present invention, and FIG. 2 is an equivalent circuit diagram of one pixel according to an exemplary embodiment of the present invention.

As shown in FIG. 1, the liquid crystal display according to the present invention includes a liquid crystal panel assembly 300, a gate driver 400 and a data driver connected thereto. 500, a driving voltage generator 700 connected to the gate driver 400, a gray voltage generator 800 connected to the data driver 500, and a timing controller for controlling them. timing controller).

The liquid crystal panel assembly 300 includes a plurality of signal lines and a plurality of pixels connected thereto in an equivalent circuit. The signal line transmits a scanning signal or gate signal and includes a plurality of scanning signal lines or gate lines G _{1 to} G _m extending in the row direction, and an image signal or data signal ( a data line D _{1 to} D _n which transmits a data signal and extends in a column direction, and in addition, according to an embodiment of the present invention, a middle gray level selection line S ₁ to line for displaying a half gray level in still image display according to an embodiment of the present invention. S _m ), and the halftone selection line extends in the row direction.

Each pixel includes a switching element Q connected to a gate line G _{1 to} G _m and a data line D _{1 to} D _n , and a pixel portion 11 including a liquid crystal capacitor C _lc connected thereto. , connected to the still image white color and a first memory unit 12, and the halftone selection line for the black gray scale display (S ₁ ~S _m) and the second memory unit 13, for the halftone display when the still picture Include. Herein, the half gray level selection line may be at least one for each pixel.

Meanwhile, the liquid crystal panel assembly 300 may be schematically illustrated as shown in FIG. 2. For convenience, only one pixel is shown in FIG. 2.

As shown in FIG. 2, the liquid crystal panel assembly 300 includes a lower panel 100 and an upper panel 200 facing each other and a liquid crystal layer 3 therebetween. The lower panel 100 includes a gate line Gi, a data line Di, a middle gray scale selection line Si, a pixel portion 11, a first memory portion 12, and a second memory portion 13. have. The liquid crystal capacitor C _lc has two terminals as the pixel electrode 190 of the lower panel 100 and the reference electrode 270 of the upper panel 200, and the liquid crystal layer 3 between the two electrodes 190 and 270 is It functions as a dielectric.

The pixel electrode 190 is connected to the pixel switch, and the reference electrode 270 is formed on the entire surface of the upper panel 200 and is connected to the common voltage V _com .

Herein, the liquid crystal molecules change their arrangement according to the change of the electric field generated by the pixel electrode 190 and the reference electrode 270, and thus the polarization of light passing through the liquid crystal layer 3 changes. The change in polarization is represented by a change in transmittance of light by a polarizer (not shown) attached to the display panels 100 and 200.

In the pixel electrode 190, a separate wiring to which a reference voltage is applied is provided on the lower panel 100 to overlap the pixel electrode 190 to form the storage capacitor C _st . For the previous gate way form the two terminals of the pixel electrode 190 is maintained with a previous gate line (G _i-1) by being overlapped with the previous gate line (G _i-1), an insulator as a medium capacitor (C _st).

Unlike in FIG. 2, the reference electrode 270 may be provided in the lower panel 100. In this case, both electrodes 190 and 270 are linearly formed.

On the other hand, in order to implement color display, each pixel should be able to display color, which is provided by a color filter 230 of red, green, or blue in a region corresponding to the pixel electrode 190. It is possible. The color filter 230 is mainly formed in a corresponding region of the upper panel 200 as shown in FIG. 1, but may be formed above or below the pixel electrode 190 of the lower panel 100.                     

The driving voltage generator 700 generates a gate on voltage V _on for turning _on the switching element of the pixel unit 11, a gate off voltage V _off for turning off the switching element, and the like. In addition, the selection voltage V _sel supplied to the middle gray selection line Si is generated.

The gate driver 400, also referred to as a scan driver, is connected to the gate line Gi of the liquid crystal panel assembly 300, and includes a gate on voltage V _on provided from the driving voltage generator 700. A gate signal composed of a combination of the gate off voltage V _off is applied to the gate line Gi. Alternatively, the selection voltage V _sel is applied to the middle gray selection line Si under the control of the timing controller 600.

The data driver 500 may also be referred to as a source driver. The data driver 500 may be connected to the data line Di of the liquid crystal panel assembly 300 to select a gray voltage from the gray voltage generator 800 to select a gray voltage as a data signal. Di).

The timing controller 600 generates a control signal for controlling operations of the gate driver 400, the data driver 500, and the driving voltage generator 700, and outputs a corresponding control signal to the gate driver 400, The data driver 500 and the driving voltage generator 700 are supplied to the data driver 500 and the driving voltage generator 700.

The liquid crystal display according to the exemplary embodiment of the present invention having such a structure implements at least 27 colors in the still image in each pixel.

3 specifically illustrates a pixel structure according to the first embodiment of the present invention for displaying 27 gray levels in still image.

As shown in FIG. 3, in each pixel according to the first embodiment of the present invention, a switching element of the pixel portion 11, that is, a control terminal of the first pixel switch Q1 is connected to the gate line Gi. The input terminal is connected to the data line Di, and the output terminal is connected to the liquid crystal capacitor C _lc . The liquid crystal capacitor C _lc is connected to the output terminal of the first pixel switch Q1 and to a common voltage V _com or a reference voltage. In addition, the pixel unit 11 may further include a storage capacitor C _st connected to a common voltage to maintain a charge charged in the liquid crystal capacitor C _lc .

The first memory unit 12 may include a first static memory M1 for storing white and black signals applied when displaying a still image, and a first memory 12 for transmitting a signal stored in the first static memory M1 to the pixel electrode P. First and second control switches S1 and S2 connected to both ends of the first static memory M1 and the third control connected between the first pixel switch Q1 and the first and second control switches S1 and S2, respectively. Switch S3. Here, the memory control signals CS1 and CS2 provided from the timing controller 500 are input to the control terminals of the first and second control switches S1 and S2, respectively.

The second memory unit 13 is a second static memory M2 for storing a voltage for displaying a half gray level signal in a still image, a control terminal is connected to the half gray selection line Si, and an input terminal is a data line Di. ) Is connected to the first node N4 of the second static memory M2 and the input terminal of the second pixel switch Q2 which transfers an applied signal to the second static memory M2. And a fourth control switch S4 for transmitting the intermediate image signal provided through the pixel electrode P to the pixel electrode P. FIG.

Here, the control terminal of the third control switch S3 is connected to the second node N5 of the second static memory M2.

Next, each pixel operation in the liquid crystal display according to the first embodiment of the present invention having such a structure will be described in detail.

4 is a diagram illustrating a frame configuration during pixel driving according to an exemplary embodiment of the present invention. FIG. 5 is a graph showing voltages and reflectance curves applied to both ends of the liquid crystal in the embodiment of the present invention, and FIGS. 6A to 6C are waveform diagrams of voltages applied to both ends of the liquid crystal in the first embodiment.

In the liquid crystal display according to the exemplary embodiment of the present invention, a frame has a frame or a time for five functions.

In Fig. 4, the F1 frame is a frame displaying a moving image. In this frame, a moving picture is implemented, in which case the first node N4 of the second static memory M2 is set low and the second node N5 is set high. Therefore, the fourth control switch S4 is turned off and the third control switch S3 is turned on.

At this time, the memory control signals CS1 and CS2 are all low. Therefore, the black and white signals stored in the first static memory M1 are not transmitted to the pixel electrode P, and data signals provided from the external data driver 300 are transferred through the first pixel switch Q1. Is applied as (P). Therefore, the pixel electrode is driven by an external data signal to perform moving picture display.

The F3 frame is a frame for writing a data signal to the first static memory M1 for displaying still images. The first and second nodes N4 and N5 of the second static memory M2 are set to low and high, respectively, and the memory control signal CS2 is set to low, similarly to the immediately preceding frame F1. The memory control signal CS1 is set high.

Therefore, when the first control switch S1 is turned on and the first pixel switch Q1 is turned on while the gate line Gi is sequentially scanned in this state, the data signal applied to the data line, that is, black and white The signal is stored in the first static memory M1 through the first pixel switch Q1, the third control switch S3, and the first control switch S1.

The F4 frame is a frame for selecting a halftone. In this frame, the gate line Gi is no longer scanned, and the halftone selection line Si is sequentially scanned.

When the high level selection voltage V _sel is applied to the middle gray level selection line Si, a high level signal is applied to the data line Di when the pixel needs to display the middle gray level in the still image. Therefore, a high level signal is applied to the second static memory M2 through the second pixel switch Q2, so that the first node N4 of the second static memory M2 is in a high state, and the second node is in a high state. N5 is turned low.

On the other hand, when the pixel needs to display white or black without displaying the intermediate gray scale in the still image, a low level signal is applied to the data line Di. Accordingly, a low level signal is applied to the second static memory M2 through the second pixel switch Q2 so that the first node N4 of the second static memory M2 is in a low state and the second node. (N5) becomes a high state.

Here, in FIG. 5, the voltage values of the black and white signals stored in the first static memory M1 are stored as V1 and V9, which represent values of 100% and 0% reflectivity. A voltage V5 representing% is applied.

On the other hand, the F2 frame is a frame displaying still images. By the values stored in the first and second static memories M1 and M2 in the immediately preceding F4 and F3 frames, three brightnesses are realized per individual pixel. Therefore, in the first embodiment of the present invention, 27 gradations can be displayed at the time of still image.

In the maximum F2 frame, the voltage applied across the liquid crystal shown in FIG. 5 and the VC_L voltage value on the reflectivity curve are applied to the common electrode Vcom. At this time, the first memory control signal CS1 is high and the second memory control signal CS2 is low.

In the next F2 frame, the common electrode Vcom is alternately applied to apply the VC_H value, and at the same time, the first memory control signal CS1 becomes low and the second memory control signal CS2 becomes high.

Accordingly, when the low level is applied to the data line Di in the immediately preceding F3 frame, the first node N4 of the second static memory M2 is turned low and the second node N5 is turned high. When the gray scale display is not performed, the fourth control switch S4 connected to the first node N4 of the second static memory M2 is turned off, and the control terminal is turned on to the second static memory M2. Since the third control switch S3 connected to the second node N5 is turned on, the black or white data signal stored in the first static memory M1 is transferred to the pixel electrode P through the third control switch S3. Is applied.

On the other hand, when the high level is applied to the data line Di in the immediately preceding F3 frame, the first node N4 of the second static memory M2 becomes high and the second node N5 becomes low. In the case of displaying the half gray scale, since the fourth control switch S4 is turned on and the third control switch S3 is turned off, the half gray level signal D1 passes through the fourth control switch S4. Is applied as (P).

Thereafter, the common electrode Vcom is applied by alternately applying the VC_L voltage and the VC_H voltage at the same time, and at the same time, the first and second memory control signals CS1 and CS2 are alternately applied. The voltage stored in M1 or the voltage applied to the intermediate gray level signal line from the outside is applied to the pixel electrode P.

In the F2 frame in which such a still image is displayed, even if the external data driver 300 no longer supplies a data signal to the data line, the pixel drives the pixel in black, white, or mid-tone, so that power consumption is increased. This is reduced.

The F5 frame is a frame for setting the value of the first node N4 of the second static memory M2, which determines whether to implement the halftone when switching from a still picture to a moving picture, to a low state. The first node N4 of the second static memory M2 can be set to the low state while sequentially selecting the halftone selection lines Si by allocating one frame, but all the pixels are turned on at the same time by turning all the halftone selection lines on. The first node N4 of the second static memory M2 may be set to low. In the latter case, it is preferable to use a blanking time without using all of the frames. Accordingly, it is possible to prevent waste of the frame and to immediately switch from a still picture to a moving picture.

Next, a liquid crystal display according to a second exemplary embodiment of the present invention will be described.

The liquid crystal display device according to the second embodiment of the present invention is made the same as the first embodiment described above, and only the structure of each pixel is different from the first embodiment.

7 is a detailed circuit diagram of one pixel in the liquid crystal display according to the second exemplary embodiment of the present invention. 8A and 8B are waveform diagrams of voltages corresponding to intermediate gray level signals applied across both liquid crystals according to the second exemplary embodiment.

As shown in FIG. 7, the pixel according to the second embodiment includes the pixel portion 11, the first memory portion 12, and the second memory portion 13, similarly to the first embodiment. Unlike the first embodiment, the second memory unit 13 controls the first and second intermediate gray level signals D1 and D2 applied and operated by a signal stored in the first static memory M1 as a fourth control switch. And fifth and sixth control switches S5 and S6 to be applied to the pixel electrode P through S4. Here, the fifth control switch S5 is an N-channel switch, and the sixth control switch S6 is a P-channel switch. Thus, the fifth and sixth control switches S5 and S6 are not turned on at the same time.

In the liquid crystal display according to the second exemplary embodiment of the present invention having the above structure, at least 64 colors are realized in the still image in each pixel, and for this purpose, black and white gray scales in the still image, and first and second colors are used. Halftone display is made. Therefore, four gradation displays can be performed for each pixel, so that a total of 64 gradation displays are achieved.

In the second embodiment of the present invention, the voltage values for the black and white signals stored in the first static memory M1 are the same as the first embodiment, where V1 and V9 are values indicating 100% and 0% reflectivity. As the data signals of the first and second half gray scales, voltages V7 and V3 representing 33% and 66% reflectivity are applied as shown in FIGS. 8A and 8B. Therefore, a total of four gray levels that can be displayed in one pixel when realizing a still image are possible in the case of 0%, 33%, 66%, and 100%, so that each pixel of RGB is combined. 64 colors can be displayed.

Each pixel of the liquid crystal display according to the second embodiment of the present invention having such a structure is black for moving picture display and still image in the order of F1, F3, F4, F2, and F5, in the same manner as the embodiment described above. And white data signal storage, half-tone data signal storage, and still image display.

Specifically, a data signal is written to the first static memory M1 in the F3 frame, and the first and second nodes N4 and N5 of the second static memory M2 are low and high, respectively. And the second memory control signals CS1 and CS2 are high and low, respectively.

Therefore, the data signal applied through the data line Di is stored in the first static memory M1 through the first pixel switch Q1, the fourth control switch S4, and the first control switch S1.                     

In the case where the still picture is displayed in the subsequent F2 frame, when the gray scale display is not performed, the fourth control switch S4 is turned off so that the black or white data signal stored in the first static memory M1 is converted to the third control switch ( It is applied to the pixel electrode P through S3).

When the gray scale display is performed, the fourth control switch S4 is turned on and according to the state of the signal applied to the first static memory M1, the fifth control switch S5 or the sixth control switch S6. The first gray scale signal D1 or the second gray scale signal D2 is applied to the pixel electrode P by being turned on.

For example, when a low state signal is applied to the first node N1 of the first static memory M1, voltages corresponding to white and light gray, that is, 66% reflectivity, are applied to the pixel electrode. However, when a high state signal is applied to the first node N1 of the first static memory M1, voltages of black and dark gray, that is, 33% reflectivity, are applied to the pixel electrode.

Next, a liquid crystal display according to a third exemplary embodiment of the present invention will be described.

The liquid crystal display device according to the third embodiment of the present invention is made the same as the first embodiment described above, and only the structure of each pixel is different from the first embodiment.

9 is a detailed circuit diagram of one pixel in the liquid crystal display according to the third exemplary embodiment of the present invention. 10A to 10D are waveform diagrams of voltages corresponding to intermediate gray level signals applied across both liquid crystals according to the third exemplary embodiment.

As shown in FIG. 9, the pixel according to the third embodiment includes the pixel unit 11, the first memory unit 12, and the second memory unit 13, similarly to the second embodiment. Unlike the second embodiment, the third memory unit 14 and the control switch unit 15 are further included.

In detail, in the third embodiment, one middle gray level selection line is further formed for each pixel as compared with the first and second embodiments. Therefore, the second memory unit 13 is connected to the first half gray selection line Si1, and the third memory unit 14 is connected to the second half gray selection line Si2.

The third memory unit 14 has a third static memory M3 for storing the halftone signal in the still image, the control terminal is connected to the second halftone selection line Si2, and the input terminal is connected to the data line Di. And a third pixel switch Q3 which transfers the connected half-tone signal to the third static memory M3.

The switch unit 15 has an output terminal connected to the fifth control switch S5, a control terminal connected to the first and second nodes N6 and N7 of the third static memory M3, respectively, and an input terminal is respectively provided. An output terminal is connected to the first and second selection switches S7 and S8 and a sixth control switch S6 connected to the first and second half gray level signals D1 and D2, and the control terminal is the third static memory M3. Third and fourth selection switches S9 and S10 respectively connected to the first and second nodes N6 and N7, and input terminals are respectively connected to the third and fourth intermediate gray level signals D3 and D4. .

In the liquid crystal display according to the second exemplary embodiment of the present invention having the above structure, at least 216 colors are implemented in the still image in each pixel, and for this purpose, black and white gradations in the still image, and the first to fourth colors. Halftone display is made. Therefore, since six kinds of gray scale display can be performed for each pixel, a total of 216 gray scale displays are achieved.                     

In the third embodiment of the present invention, the voltage values for the black and white signals stored in the first static memory M1 are stored with V1 and V9 having values of 100% and 0% reflectivity, respectively. As shown in Figs. 10A and 10B as data signals of half gray scale, voltages V8 and V2 showing 20% and 80% reflectivity are applied, and as shown in Figs. 10C and 10D as data signals of third and fourth half gray scales. As shown, voltages V6 and V4 are applied, representing 60% and 40% reflectivity. Therefore, a total of six gradations that can be displayed in one pixel when realizing a still image is possible in the case of 0%, 20%, 40%, 60%, 80%, and 100%, so that when each pixel of RGB is combined 216 colors can be displayed.

Each pixel of the liquid crystal display according to the third embodiment of the present invention having such a structure is used for moving picture display and still image in the order of F1, F3, F4, F2, and F5 in the same manner as the first embodiment described above. Black and white data signal storage, half-tone data signal storage and still image display are made.

Specifically, a data signal is written to the first static memory M1 in the F3 frame, and data is written for the half gray scale display in the F4 frame. The first and second half-tone selection lines Si1 and Si2 are selected according to the sequentially applied selection signals, and the signals are transferred to the second static memory through the pixel switches Q2 and Q3 connected to the selected half-tone selection lines, respectively. M2) or third static memory M3.

In the case where the still picture is displayed in the subsequent F2 frame, when the gray scale display is not performed, the fourth control switch S4 is turned off so that the black or white data signal stored in the first static memory M1 is converted to the third control switch ( Through S3) to the pixel electrode.                     

When the gray scale display is performed, the fourth control switch S4 is turned on and according to the state of the signal applied to the first static memory M1, the fifth control switch S5 or the sixth control switch S6. The data signal is turned on to apply one data signal of the first to fourth intermediate gray level data signals D1 to D4 to the pixel electrode.

For example, when a low state signal is applied to the first node N1 of the first static memory M1 and a high state signal is applied to the first node N6 of the third static memory M3. A voltage corresponding to 40% reflectance is applied to the pixel electrode. When a low state signal is applied to the first node N1 of the first static memory M1 and a low state signal is applied to the first node N6 of the third static memory M3, the reflectivity 60 is applied. A voltage corresponding to% is applied to the pixel electrode. However, when a high state signal is applied to the first node N1 of the first static memory M1 and a high state signal is applied to the first node N6 of the third static memory M3, the reflectivity 80 A voltage corresponding to% is applied to the pixel electrode. When a low state signal is applied to the first node N1 of the first static memory M1 and a low state signal is applied to the first node N3 of the third static memory M3, the reflectivity 20 A voltage corresponding to% is applied to the pixel electrode.

The invention is susceptible to various modifications and implementations without departing from the scope of the following claims. For example, even in a liquid crystal display of a chip on glass (COG) type in which a data driver is directly mounted on a thin film transistor substrate and the data driver is connected to a printed circuit board through a transmission film, the data according to the above-described embodiment Signal supply can be made.

As described above, according to the exemplary embodiment of the present invention, when the still image is displayed, the pixel drives the pixel in black, white, or gray scale even when the external data driver does not drive the data line. It is possible to reduce the power consumption according to the driving of.

In addition, at least 27 or more gradations can be displayed when a still image is implemented without using a D / A converter.

Claims (6)

A plurality of gate lines and data lines are formed in the row and column directions, respectively, and a plurality of halftone selection lines are formed in the row direction, and a plurality of pixels are formed in an area defined by the intersection of the gate line and the halftone selection line and the data line. Liquid crystal panels each formed; A gate driver supplying a gate driving voltage to the gate line and supplying a selection voltage to a middle gray level selection line; And A data driver supplying a corresponding gray voltage to the data line according to an applied data signal Including, Each pixel is A first pixel switch having a control terminal connected to the gate line, an input terminal connected to the data line, and a liquid crystal capacitor having one side connected to an output terminal of the first pixel switch and the other side connected to a common voltage; A pixel portion having an output terminal of the pixel switch connected to the pixel electrode; A first memory unit for storing a gradation voltage corresponding to white and black data signals applied for displaying a still image from the data line; A second memory unit operating according to a selection signal applied through the intermediate selection line to transfer a gray voltage corresponding to the intermediate gray level signal applied from the data line to the pixel electrode; Liquid crystal display comprising a. The method of claim 1, The liquid crystal display device operates in the order of a moving picture display frame, a frame storing white and black signals for still picture display, a halftone selection frame, a still picture display frame, and a still picture to moving picture frame. The method of claim 2, The liquid crystal display supplies a gray voltage corresponding to the applied half gray level signal to the pixel electrode when the half gray level selection frame is selected in the half gray level selection frame in the still image display frame, and the half gray level in the half gray level selection frame. And when a display is not selected, the gray level voltage corresponding to the black and white signals stored in the first memory unit is supplied to the pixel electrode. The method according to any one of claims 1 to 3, The first memory unit may include a first static memory configured to store a gray voltage corresponding to the white and black data signals; First and second control switches connected to both ends of the first static memory, respectively, and operated according to applied first and second control signals to transfer signals stored in the first static memory to pixel electrodes; A third switch connected between the first pixel switch and first and second control switches, The second memory unit may include a second static memory configured to store a voltage for displaying the halftone signal; A second pixel switch having a control terminal connected to the half-tone selection line and an input terminal connected to a data line to transfer the half-tone signal applied from the data line to the second static memory; A fourth control switch connected to a first node of the second static memory and transferring a gray voltage corresponding to an intermediate gray level signal provided through an input terminal to the pixel electrode; And the third control switch operates according to the voltage stored in the second static memory to supply the voltage stored in the first static memory to the pixel electrode. The method according to any one of claims 1 to 3, The first memory unit may include a first static memory configured to store a gray voltage corresponding to the white and black data signals; First and second control switches connected to both ends of the first static memory, respectively, and operated according to applied first and second control signals to transfer signals stored in the first static memory to pixel electrodes; A third switch connected between the first pixel switch and first and second control switches, The second memory unit may include a second static memory configured to store a gray voltage for displaying the intermediate gray level signal; A second pixel switch having a control terminal connected to the half-tone selection line and an input terminal connected to a data line to transfer the half-tone signal applied from the data line to the second static memory; A fourth control switch connected to a first node of the second static memory and transferring a gray voltage corresponding to an intermediate gray level signal provided through an input terminal to the pixel electrode; Fifth and sixth control switches configured to apply the gray voltages corresponding to the first and second intermediate gray level signals applied by the signals stored in the first static memory to the pixel electrode through the fourth control switch; Include, And the third control switch operates according to the voltage stored in the second static memory to supply the voltage stored in the first static memory to the pixel electrode. A plurality of gate lines and data lines are formed in the row and column directions, respectively, and a plurality of first and second half gray scale selection lines are formed in the row direction, and are defined as intersections of the gate lines and the half gray scale selection lines and the data lines. A liquid crystal panel in which a plurality of pixels are formed respectively; A gate driver supplying a gate driving voltage to the gate line and supplying a selection voltage to a middle gray level selection line; And A data driver supplying a corresponding gray voltage to the data line according to an applied data signal Including, Each pixel is A first pixel switch having a control terminal connected to the gate line, an input terminal connected to the data line, and a liquid crystal capacitor having one side connected to an output terminal of the first pixel switch and the other side connected to a common voltage; A pixel portion having an output terminal of the pixel switch connected to the pixel electrode; A first memory unit for storing a gradation voltage corresponding to white and black data signals applied for displaying still images from the data line; A second memory unit configured to operate according to a selection signal applied through the first intermediate selection line to transfer gray voltages corresponding to the first and second intermediate gray level signals applied from the data line to the pixel electrode; A third memory unit operating according to a selection signal applied through the second intermediate selection line to transfer the gray voltages corresponding to the third and fourth intermediate gray level signals applied from the data line to the pixel electrode; And A switch unit for selectively supplying a gray voltage corresponding to the first to fourth intermediate gray level signals applied to the pixel electrode by operating according to the voltages stored in the second memory unit and the third memory unit. Liquid crystal display comprising a.

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