KR100875794B1 - Semiconductor mask - Google Patents

Semiconductor mask Download PDF

Info

Publication number
KR100875794B1
KR100875794B1 KR1020070041919A KR20070041919A KR100875794B1 KR 100875794 B1 KR100875794 B1 KR 100875794B1 KR 1020070041919 A KR1020070041919 A KR 1020070041919A KR 20070041919 A KR20070041919 A KR 20070041919A KR 100875794 B1 KR100875794 B1 KR 100875794B1
Authority
KR
South Korea
Prior art keywords
contact hole
mask
columns
hole pattern
group
Prior art date
Application number
KR1020070041919A
Other languages
Korean (ko)
Other versions
KR20080096952A (en
Inventor
문주형
Original Assignee
동부일렉트로닉스 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 동부일렉트로닉스 주식회사 filed Critical 동부일렉트로닉스 주식회사
Priority to KR1020070041919A priority Critical patent/KR100875794B1/en
Publication of KR20080096952A publication Critical patent/KR20080096952A/en
Application granted granted Critical
Publication of KR100875794B1 publication Critical patent/KR100875794B1/en

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0273Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
    • H01L21/0274Photolithographic processes
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
    • G03F1/38Masks having auxiliary features, e.g. special coatings or marks for alignment or testing; Preparation thereof
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
    • G03F1/66Containers specially adapted for masks, mask blanks or pellicles; Preparation thereof
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/20Exposure; Apparatus therefor
    • G03F7/2051Exposure without an original mask, e.g. using a programmed deflection of a point source, by scanning, by drawing with a light beam, using an addressed light or corpuscular source
    • G03F7/2059Exposure without an original mask, e.g. using a programmed deflection of a point source, by scanning, by drawing with a light beam, using an addressed light or corpuscular source using a scanning corpuscular radiation beam, e.g. an electron beam
    • G03F7/2063Exposure without an original mask, e.g. using a programmed deflection of a point source, by scanning, by drawing with a light beam, using an addressed light or corpuscular source using a scanning corpuscular radiation beam, e.g. an electron beam for the production of exposure masks or reticles
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • H01L21/0334Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
    • H01L21/0337Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment

Landscapes

  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Inorganic Chemistry (AREA)
  • Chemical & Material Sciences (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Preparing Plates And Mask In Photomechanical Process (AREA)

Abstract

본 발명은 반도체용 마스크에 관한 것으로, 다수의 행과 열을 갖고 형성되는 컨택홀 패턴을 포함하는 반도체용 마스크에서 컨택홀 패턴을 적어도 하나의 열이 이웃하는 열에 대하여 행의 위치를 상이하게 형성하여 전체적으로 행과 열이 위치가 어긋나도록 구성하는 것으로서, 일예로 컨택홀 패턴의 열은 적어도 하나 이상 복수개로 이루어진 열들이 하나의 군을 이루어 이러한 군들에 의해 다수의 군들로 구획되고, 이러한 다수의 군들이 서로 상이한 행의 위치를 갖고 형성되는 것이다. 이와 같이 형성되는 본 발명은, 결과적으로 미세홀 패턴 관찰을 용이하게 실시하기 위한 셈바 디자인에 적합하기 때문에 일반적인 셈바의 형태로는 원하는 피치의 컨택홀의 단면을 얻기 어려운 종래의 문제점을 해소하는 효과를 갖는다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a mask for a semiconductor, wherein in a mask for a semiconductor including a contact hole pattern having a plurality of rows and columns, the contact hole pattern is formed in different positions with respect to a column adjacent to at least one column. As a whole, the rows and columns are configured to be displaced. For example, the contact hole pattern column is divided into a plurality of groups by these groups, in which one or more columns are formed in one group, and the plurality of groups They are formed with different row positions. The present invention thus formed has the effect of eliminating the conventional problem of obtaining a cross section of a contact hole of a desired pitch in the form of a general Semba because it is suitable for a Semba design for easily performing fine hole pattern observation. .

Description

반도체용 마스크 {Semiconductor Mask}Semiconductor Mask {Semiconductor Mask}

도 1은 일반적인 마스크에서 컨택홀을 관찰하기 위해 절개선을 표시한 상태의 평면도.1 is a plan view showing an incision line for observing a contact hole in a general mask.

도 2는 본 발명의 일 실시예에 의한 마스크의 평면도.2 is a plan view of a mask according to an embodiment of the present invention.

도 3은 도 2에서 컨택홀을 관찰하기 위한 절개선을 표시한 평면도.3 is a plan view showing an incision line for observing the contact hole in FIG.

< 도면의 주요 부분에 대한 부호의 설명 ><Description of Symbols for Main Parts of Drawings>

10 ; 마스크10; Mask

20 ; 컨택홀 패턴20; Contact hole pattern

A,B,C,D ; 컨택홀 패턴의 군A, B, C, D; Group of contact hole patterns

e,f,g,h ; 절개선e, f, g, h; Incision

본 발명은 반도체용 마스크에 관한 것으로, 보다 상세하게는 미세한 크기의 컨택홀의 패턴의 단면 형상을 확인하기에 용이하도록 컨택홀의 패턴을 형성한 반도체용 마스크에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a mask for a semiconductor, and more particularly, to a mask for a semiconductor in which a pattern of a contact hole is formed to easily identify a cross-sectional shape of a pattern of a contact hole having a fine size.

일반적으로 반도체 공정에 사용되는 마스크에서 미세 패턴을 형성시 복수 개 의 개구부인 홀이 상하좌우에 일정한 간격을 갖고 규칙적으로 형성된다.In general, when forming a micro pattern in a mask used in a semiconductor process, a plurality of openings, which are a plurality of openings, are regularly formed at regular intervals on the top, bottom, left, and right sides.

특히 라인 및 공간 패턴(Line & Space Pattern)과는 다르게 컨택 홀 패턴(Contact Hole Pattern)의 경우에는 일반적인 셈바(Sembar)의 형태로는 원하는 피치를 갖는 컨택홀의 단면을 얻는 것이 어렵다.In particular, unlike a line and space pattern, in the case of a contact hole pattern, it is difficult to obtain a cross section of a contact hole having a desired pitch in the form of a general sembar.

즉, 종래에는 도 1에 도시한 바와 같이, 마스크(1)의 상하좌우에 일정한 간격을 갖고 컨택홀 패턴(2)들이 형성되어 있다. 이러한 마스크(1)에서는 일렬로 형성된 컨택홀 패턴(2)의 중심부를 절개하지 못하고 절개선이 빗나가게 되는 경우, 예를 들면, a선, 또는 b선 또는 c선 등과 같이 각각 패턴에 대하여 작업자의 부주위나 정확한 위치에서 벗어나게 되어 조금이라도 일측으로 어긋난 상태에서 단면을 절개하게 되면 본래 필요로 하는 피치의 단면을 얻을 수 없다. 따라서 원하는 피치의 단면을 얻기 위해서는 d선과 같이 절개선이 컨텍홀을 모두 포함하는 위치에서 정확하게 절개가 실시되어야 한다.That is, as shown in FIG. 1, contact hole patterns 2 are formed at regular intervals on the top, bottom, left, and right sides of the mask 1. In such a mask 1, when the incision line is missed without cutting the center of the contact hole pattern 2 formed in a line, for example, the carelessness of the operator with respect to the pattern, for example, a line, b line, or c line, etc. If the cross section is cut in a state where it is displaced to one side even if it deviates from the above or exact position, the cross section of the originally required pitch cannot be obtained. Therefore, in order to obtain a cross section of the desired pitch, the incision must be precisely performed at the position where the incision line includes all the contact holes as in the d line.

따라서 종래에는 원하는 피치의 단면을 얻기 위해서는 작업 공정이 용이하지 않아 작업성이 저하될 수 밖에 없는 한계가 있다.Therefore, in the related art, in order to obtain a cross section of a desired pitch, there is a limit that the work process is not easy and the workability is deteriorated.

본 발명의 목적은 컨택홀의 단면 확인시 원하는 피치의 컨택홀의 단면 데이터를 용이하게 얻을 수 있도록 함으로써 미세홀인 컨택홀의 패턴 관찰이 가능하도록 하려는 데 있다.An object of the present invention is to make it possible to easily obtain the cross-sectional data of the contact hole of the desired pitch when confirming the cross-sectional view of the contact hole, it is possible to observe the pattern of the contact hole which is a fine hole.

상기한 바와 같은 목적을 달성하기 위한 본 발명에 의한 반도체용 마스크는 다수의 행과 열을 갖고 형성되는 컨택홀 패턴을 포함하는 반도체용 마스크에 있어서, 상기 컨택홀 패턴은 적어도 하나의 열이 이웃하는 열에 대하여 행의 위치를 상이하게 형성하여 전체적으로 행과 열이 위치가 어긋나도록 구성하게 된다.A semiconductor mask according to the present invention for achieving the above object comprises a contact hole pattern formed having a plurality of rows and columns, wherein the contact hole pattern is adjacent to at least one column The positions of the rows are formed differently with respect to the columns so that the rows and the columns are shifted in position as a whole.

즉, 상기 컨택홀 패턴의 열은 적어도 하나 이상 복수개로 이루어진 열들이 하나의 군을 이루어 이러한 군들에 의해 다수의 군들로 구획되고, 이러한 다수의 군들이 서로 상이한 행의 위치를 갖고 형성되는 것이 바람직하다.That is, the contact hole pattern column is divided into a plurality of groups by the groups of at least one or more of the plurality of columns forming a group, it is preferable that the plurality of groups are formed with different row positions. .

또한, 보다 바람직하기는 상기 컨택홀 패턴의 군은 3개의 열이 하나의 군을 이루도록 한다. 그러나 3개의 열이 하나의 군을 이루는 것은 실시예적인 개념이며 작업 조건이나 필요에 의해서 얼마든지 열의 갯수를 늘이거나 줄일 수 있음은 물론이다.In addition, more preferably, the group of the contact hole pattern is three columns to form a group. However, it is an exemplary concept that three columns form a group, and the number of columns can be increased or decreased by any number of working conditions or needs.

이와 같이 형성되는 본 발명은, 결과적으로 미세홀 패턴 관찰을 용이하게 실시하기 위한 셈바 디자인에 적합한 효과를 갖는 것으로서, 일반적인 셈바의 형태로는 원하는 피치의 컨택홀의 단면을 얻기 어려운 종래의 문제점을 해소하는 효과를 갖는다.The present invention thus formed has an effect that is suitable for a Semba design for easily performing fine hole pattern observation, and solves the conventional problem that a cross section of a contact hole having a desired pitch cannot be obtained in a general Semba form. Has an effect.

이하, 상기한 바와 같은 본 발명의 바람직한 실시예를 첨부도면에 의거하여 보다 상세하게 설명한다.Hereinafter, preferred embodiments of the present invention as described above will be described in more detail with reference to the accompanying drawings.

도 2는 본 발명에 의해 컨택홀이 형성된 마스크의 평면도이다.2 is a plan view of a mask in which contact holes are formed according to the present invention.

본 발명에 의한 반도체용 마스크는 마스크(10)의 컨택홀의 패턴(20)이 가로줄인 행(22)과 세로줄인 열(24)로 형성되는 경우에 수 개의 열마다 각각 행의 위치 를 상이하게 형성한 것이다.In the mask for a semiconductor according to the present invention, when the contact hole pattern 20 of the mask 10 is formed by the horizontal row 22 and the vertical column 24, the positions of the rows are formed differently every several columns. It is.

즉, 도 2에 도시한 바와 같이, 본 발명의 일 실시예에 의하면 3개의 열마다 각각 행의 위치를 이웃하는 열의 위치와 상이하게 형성되어 있다. 도 2에서 가장 좌측에 위치하여 형성된 컨택홀의 패턴중 3개의 열의 군을 A라고 할 때, A군의 우측에 위치한 B군이 A군보다 상측에 형성되고, B군의 우측에 위치한 C군이 B군보다 상측에 위치하게 형성된다. 그리고 가장 우측에 위치한 D군은 A,B 및 C군중에서 가장 상측에 위치하게 형성된다.That is, as shown in FIG. 2, according to one embodiment of the present invention, the positions of the rows are formed differently from the positions of the neighboring columns for every three columns. In FIG. 2, when the group of three rows of the contact hole patterns formed on the leftmost side is A, the B group located on the right side of the A group is formed above the A group, and the C group located on the right side of the B group is B It is formed located above the group. And the rightmost D group is formed in the uppermost position among the A, B and C groups.

이처럼 서로 동일한 위치의 열을 갖는 군을 3개의 열로 구획할 수도 있으나 이에 한정하는 것은 아니며 작업조건이나 필요에 의해 얼마든지 다양한 갯수의 열을 하나의 군으로 구획할 수 있을 것이다.As such, a group having columns of the same position as each other may be divided into three rows, but the present invention is not limited thereto, and various numbers of rows may be divided into one group depending on working conditions or needs.

이와 같이 구성된 마스크에 의하여 절개선을 지정하는 경우에는 도 3에 도시한 바와 같이, 마스크를 절개하는 절개선 e,f,g선의 경우뿐 아니라 h선의 절개선에서와 같이 어느 위치에서 마스크를 절개하더라도 A,B,C 및 D군 중 적어도 하나 이상의 군에서 컨택홀 패턴을 확인할 수 있는 단면을 갖도록 절개가 이루어지게 된다. In the case of designating the incision line by the mask configured as described above, as shown in FIG. An incision is made to have a cross section in which at least one of the A, B, C, and D groups can identify the contact hole pattern.

따라서 절개시마다 작업자가 일일이 컨택홀 패턴을 확인하여 절개를 실시하지 않고 절개 작업을 실시하더라도 원하는 피치의 컨택홀의 단면 데이터를 얻을 수 있는 것이다.Therefore, even when the operator checks the contact hole pattern at each time of the incision, even if the incision is performed without performing the incision, the cross-sectional data of the contact hole having the desired pitch can be obtained.

본 발명은 상술한 실시예에 한정하지 않는 것이며, 본 발명의 특허청구범위와 상세한 설명 및 첨부도면 이외에 다양하게 변형된 실시예가 가능한 것은 물론이 며, 이러한 실시예도 본 발명의 권리범위에 포함되는 것은 당연하다 할 것이다.The present invention is not limited to the above-described embodiments, and various modifications can be made to the embodiments other than the claims, the detailed description, and the accompanying drawings of the present invention, and the embodiments are included in the scope of the present invention. It will be natural.

이상에서 설명한 바와 같이, 본 발명에 의한 반도체용 마스크는 컨택홀의 패턴을 마스크에서 일정한 주기를 갖고 시프트(shift) 시킴으로써 어느 위치에서 절개를 실시하더라도 원하는 피치의 컨택홀 단면을 정확하게 관찰할 수 있는 효과가 있다.As described above, the semiconductor mask according to the present invention has the effect of accurately observing a contact hole cross section of a desired pitch by making a cut at any position by shifting the contact hole pattern with a constant period in the mask. have.

Claims (3)

삭제delete 다수의 행과 열을 갖고 형성되는 컨택홀 패턴을 포함하는 반도체용 마스크에 있어서, In the mask for a semiconductor comprising a contact hole pattern formed having a plurality of rows and columns, 상기 컨택홀 패턴은 적어도 하나의 열이 이웃하는 열에 대하여 행의 위치를 상이하게 형성하여 전체적으로 행과 열이 위치가 어긋나도록 구성하고,The contact hole pattern is configured so that at least one column has a different position of a row with respect to a neighboring column, so that the rows and columns are shifted from each other. 상기 컨택홀 패턴의 열은 적어도 하나 이상 복수개의 열이 하나의 군으로 형성되어 전체적으로 다수의 군들로 구획되고, 이러한 다수의 군들이 서로 상이한 행의 위치를 갖고 형성된 것을 특징으로 하는 반도체용 마스크.At least one column of the contact hole pattern is formed as a group, and is divided into a plurality of groups as a whole, and the plurality of groups are formed with different row positions. 제 2 항에 있어서,The method of claim 2, 상기 컨택홀 패턴의 군은 3개의 열이 하나의 군을 이루는 것을 특징으로 하는 반도체용 마스크.The group of the contact hole pattern is a mask for a semiconductor, characterized in that three columns form a group.
KR1020070041919A 2007-04-30 2007-04-30 Semiconductor mask KR100875794B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1020070041919A KR100875794B1 (en) 2007-04-30 2007-04-30 Semiconductor mask

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020070041919A KR100875794B1 (en) 2007-04-30 2007-04-30 Semiconductor mask

Publications (2)

Publication Number Publication Date
KR20080096952A KR20080096952A (en) 2008-11-04
KR100875794B1 true KR100875794B1 (en) 2008-12-24

Family

ID=40285029

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020070041919A KR100875794B1 (en) 2007-04-30 2007-04-30 Semiconductor mask

Country Status (1)

Country Link
KR (1) KR100875794B1 (en)

Also Published As

Publication number Publication date
KR20080096952A (en) 2008-11-04

Similar Documents

Publication Publication Date Title
DE07123053T1 (en) Method for forming fan-shaped outflow openings in incinerators
JP4905454B2 (en) Metal plate for wire grid, wire grid, and method for manufacturing metal plate for wire grid
CN109901359A (en) For the alignment patterns of exposure mask, exposure mask and wafer
KR100875794B1 (en) Semiconductor mask
CN107924848B (en) Method for arranging a plurality of semiconductor components on a carrier and carrier having a plurality of semiconductor components
CN108241230B (en) Method for manufacturing color filter substrate
JP2020533648A (en) Pixel display modules and masks for manufacturing pixel display modules
CN102888665A (en) Spinneret plate with identification codes
CN105278234B (en) Method for enhancing precision of OPC model on graphic deviation
KR20150114423A (en) Semiconductor wafer
KR102152441B1 (en) method for depositing thin film using patterned dummy wafer
CN103681624B (en) Overlay marks and forming method thereof
JP2022523492A (en) Moire target and method for measuring misalignment of semiconductor devices using it
CN108289373B (en) Forming method of unit board
KR20080096215A (en) Semiconductor device and manufacturing method thereof
Sims et al. The morphology and taxonomy of the marine centric diatom genus Paralia. II. Paralia crenulata, P. fausta and the new species, P. hendeyi
CN103855047B (en) The physical analysis structure of deep trench product and method
JP2007043024A (en) Circuit for electrical inspection of printed board circuit and its forming method
US20170098601A1 (en) Mask and metal wiring of a semiconductor device formed using the same
CN108241231B (en) Method for manufacturing color filter substrate
US20210358654A1 (en) Substrate
CN115616867B (en) Method for monitoring minimum line width process on photomask
KR20100108002A (en) An aligning mark including a real row and a dummy row
JP2006313852A (en) Semiconductor device and method for evaluating evaluation pattern
KR200440086Y1 (en) Educational tool for learning of fraction

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
LAPS Lapse due to unpaid annual fee