KR100858704B1 - Method for coating high-resistance thin film of case appearance - Google Patents
Method for coating high-resistance thin film of case appearance Download PDFInfo
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- KR100858704B1 KR100858704B1 KR1020070108767A KR20070108767A KR100858704B1 KR 100858704 B1 KR100858704 B1 KR 100858704B1 KR 1020070108767 A KR1020070108767 A KR 1020070108767A KR 20070108767 A KR20070108767 A KR 20070108767A KR 100858704 B1 KR100858704 B1 KR 100858704B1
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/06—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
- C23C14/14—Metallic material, boron or silicon
- C23C14/20—Metallic material, boron or silicon on organic substrates
- C23C14/205—Metallic material, boron or silicon on organic substrates by cathodic sputtering
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02532—Silicon, silicon germanium, germanium
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02439—Materials
- H01L21/02441—Group 14 semiconducting materials
- H01L21/02452—Group 14 semiconducting materials including tin
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02535—Group 14 semiconducting materials including tin
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System
- H01L21/2855—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System by physical means, e.g. sputtering, evaporation
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04M—TELEPHONIC COMMUNICATION
- H04M1/00—Substation equipment, e.g. for use by subscribers
- H04M1/02—Constructional features of telephone sets
- H04M1/18—Telephone sets specially adapted for use in ships, mines, or other places exposed to adverse environment
- H04M1/185—Improving the rigidity of the casing or resistance to shocks
Abstract
Description
본 발명은 이동통신 단말기(휴대폰), 전자제품 등의 케이스 표면에 박막을 코팅하는 방법에 관한 것으로서, 더욱 상세하게는 케이스 표면의 박막 코팅방법에 있어서 케이스의 표면에 주석(Sn) 또는 주석(Sn)-인듐(In) 합금과 실리콘(Si)을 교대로 적층하거나, 주석(Sn) 또는 주석(Sn)-인듐(In) 합금과 실리콘(Si)을 혼합한 혼합박막을 형성함으로써 내식성, 내환경적 특성 및 비전도 특성을 갖는 케이스 외관의 고저항 박막 코팅방법에 관한 것이다.The present invention relates to a method of coating a thin film on the surface of the case of a mobile communication terminal (mobile phone), electronics, etc. More specifically, in the thin film coating method of the case surface Tin (Sn) or tin (Sn) on the surface of the case ) Indium (In) alloy and silicon (Si) are alternately laminated, or a mixed thin film in which tin (Sn) or tin (Sn) -indium (In) alloy and silicon (Si) is formed to form corrosion resistance and environmental resistance The present invention relates to a high resistance thin film coating method of an exterior of a case having mechanical and non-conductive properties.
일반적으로 이동통신 단말기 또는 전자제품의 케이스로는 투명한 아크릴(acryl)이나 폴리카보네이트(PC) 등이 사용되며, 화려한 외관 디자인 효과를 나타내기 위해 니켈(Ni), 알루미늄(Al) 또는 크롬(Cr) 등의 금속 박막을 코팅함으로써 금속 느낌의 실버 색상을 표현하였다.In general, a transparent acryl or polycarbonate (PC) is used as a case of a mobile communication terminal or an electronic product, and nickel (Ni), aluminum (Al), or chromium (Cr) is used to show a gorgeous appearance design effect. By coating a thin metal film such as to express the silver color of the metallic feeling.
그러나 특히 이동통신 단말기의 케이스에 상기와 같은 전도성 물질인 금속 박막을 사용할 경우 무선 신호에 영향을 끼쳐 통화 중 끊김 현상을 발생시키는 주요 원인이 된다는 사실이 밝혀졌다. 또한 품질검사규격 중의 하나인 정전기(Electro Static Discharge:ESD) 테스트에서도 금속 박막이 폭발하는 현상이 발생하였다.In particular, however, it has been found that the use of the metal thin film, which is a conductive material, in the case of the mobile communication terminal affects the wireless signal and causes a disconnection during a call. In addition, an electrostatic discharge (ESD) test, one of quality inspection standards, caused an explosion of a metal thin film.
이러한 문제점을 해결하기 위하여, 종래에는 주석(Sn) 또는 주석(Sn)-인듐(In) 박막을 이용한 비전도 코팅방법이 휴대폰 케이스 또는 버튼류에 사용되어 왔다. 그러나 이와 같이 주석 또는 주석-인듐 박막을 이용할 경우 고온 고습에서 변색되거나 자외선에 오래 방치했을 때 변색되는 문제점이 있었다.In order to solve this problem, conventionally, a non-conductive coating method using a tin (Sn) or tin (Sn) -indium (In) thin film has been used for a cell phone case or a button. However, when using a tin or tin-indium thin film as described above, there is a problem that discoloration at high temperature and high humidity or discoloration when left in the ultraviolet.
또한 휴대폰의 키패드 등과 같이 라이팅(lighting)을 통해 특정한 글자 및 숫자만 투과되게 하고 나머지 주변은 빛을 차단해야 하는 고저항 박막의 경우, 종래기술과 같이 주석 또는 주석-인듐 합금을 이용하게 되면 막의 두께가 두꺼워지면서 저항값이 1MΩ 이하의 저 저항값으로 떨어지면서 비전도의 특성이 사라지는 문제점이 있었다.In addition, in the case of high-resistance thin film that requires only certain letters and numbers to be transmitted through lighting and blocks light around the rest, such as a keypad of a mobile phone, when using tin or tin-indium alloy as in the prior art, the thickness of the film As the thickness increases, the resistance value drops to a low resistance value of 1 MΩ or less, which causes a problem that the characteristics of the non-conductivity disappear.
본 발명은 상술한 바와 같은 문제점들을 해결하기 위하여 안출된 것으로서, 본 발명의 목적은 케이스 표면의 박막 코팅방법에 있어서 케이스의 표면에 주석(Sn) 또는 주석(Sn)-인듐(In) 합금과 실리콘(Si)을 교대로 적층하거나, 주석(Sn) 또는 주석(Sn)-인듐(In) 합금과 실리콘(Si)을 혼합한 혼합박막을 형성함으로써 내식성, 내환경적 특성 및 비전도 특성을 갖는 케이스 외관의 고저항 박막 코팅방법을 제공하기 위한 것이다.The present invention has been made to solve the problems described above, the object of the present invention is a thin film coating method of the case surface of the tin (Sn) or tin (Sn)-indium (In) alloy and silicon Cases having corrosion resistance, environmental resistance, and non-conductive properties by alternately stacking (Si) or forming a mixed thin film of tin (Sn) or tin (Sn) -indium (In) alloy and silicon (Si) It is to provide a high resistance thin film coating method of appearance.
상기와 같은 목적을 달성하기 위한 본 발명은, 소정의 시트(sheet) 혹은 사출물을 형성하는 제1단계; 상기 시트 혹은 사출물의 표면에 스퍼터링법을 이용하여 주석(Sn) 박막 또는 주석(Sn)-인듐(In)의 합금 박막을 코팅하는 제2단계; 상기 제2단계에서 코팅된 합금 박막의 표면에, 스퍼터링법을 이용하여 실리콘(Si) 박막을 코팅하는 제3단계; 상기 제2단계 및 제3단계를 반복 수행하여 주석 또는 주석-인듐 박막과 실리콘 박막을 교차적층하는 제4단계; 를 포함하는 것을 특징으로 한다.The present invention for achieving the above object, the first step of forming a predetermined sheet (sheet) or injection molded; A second step of coating a tin (Sn) thin film or an alloy thin film of tin (Sn) -indium (In) by sputtering on the surface of the sheet or the injection molded product; A third step of coating a silicon (Si) thin film on the surface of the alloy thin film coated in the second step by using a sputtering method; Performing a second step and a third step repeatedly to cross-laminate the tin or tin-indium thin film and the silicon thin film; Characterized in that it comprises a.
이때, 상기 주석(Sn) 박막 또는 주석(Sn)-인듐(In)의 합금 박막 및 상기 실리콘(Si) 박막의 두께는 50nm 이하인 것이 바람직하다.In this case, the thickness of the tin (Sn) thin film or an alloy thin film of tin (Sn) -indium (In) and the silicon (Si) thin film is preferably 50 nm or less.
상기와 같은 목적을 달성하기 위한 또 다른 본 발명은, 소정의 시트(sheet) 혹은 사출물을 형성하는 제1단계; 상기 시트 혹은 사출물의 표면에 스퍼터링법을 이용하여 주석(Sn) 또는 주석(Sn)-인듐(In)의 합금에 실리콘(Si)을 혼합한 혼합박 막을 코팅하는 제2단계; 를 포함하는 것을 특징으로 한다.Another invention for achieving the above object, the first step of forming a predetermined sheet (sheet) or injection molded; A second step of coating a mixed thin film in which silicon (Si) is mixed with an alloy of tin (Sn) or tin (Sn) -indium (In) by sputtering on the surface of the sheet or the injection molded product; Characterized in that it comprises a.
이때, 상기 주석(Sn) 또는 주석(Sn)-인듐(In)의 합금에 실리콘(Si)을 혼합한 혼합박막에서, 실리콘(Si)의 혼합비율은 10~40 중량% 인 것이 바람직하다.At this time, in the mixed thin film in which silicon (Si) is mixed with the alloy of tin (Sn) or tin (Sn) -indium (In), the mixing ratio of silicon (Si) is preferably 10 to 40% by weight.
상기와 같이 케이스의 표면에 주석(Sn) 또는 주석(Sn)-인듐(In) 합금과 실리콘(Si)을 교대로 적층하거나, 주석(Sn) 또는 주석(Sn)-인듐(In) 합금과 실리콘(Si)을 혼합한 혼합박막을 형성함으로써 박막의 내식성, 내환경적 특성을 향상시켜 박막이 고온 고습에서 변색되거나 자외선에 오래 방치했을 때 변색되는 문제점을 해결할 수 있다. As described above, tin (Sn) or tin (Sn) -indium (In) alloy and silicon (Si) are alternately laminated, or tin (Sn) or tin (Sn) -indium (In) alloy and silicon By forming a mixed thin film mixed with (Si) to improve the corrosion resistance and environmental properties of the thin film can be solved the problem of discoloration when the thin film is discolored at high temperature and high humidity or long standing in the ultraviolet.
또한, 상기와 같이 주석 또는 주석-인듐의 합금박막에 실리콘이 교차 적층된 합금박막을 형성할 경우 막의 두께가 두꺼워지면서 저항값이 떨어져 비전도 특성이 사라지는 문제점을 해결하여, 고저항 박막을 유지할 수 있는 효과가 있다.In addition, when forming an alloy thin film cross-laminated with silicon in the alloy thin film of tin or tin-indium as described above, the problem that the non-conductive property disappears due to the thickness of the film is reduced, the high resistance thin film can be maintained. It has an effect.
본 발명의 상기 목적과 기술적 구성 및 그에 따른 작용 효과에 관한 자세한 사항은 본 발명의 명세서에 첨부된 도면에 의거한 이하의 상세한 설명에 의하여 보다 명확하게 이해될 것이다.Details of the above object and technical configuration of the present invention and the effects thereof according to the present invention will be more clearly understood by the following detailed description based on the accompanying drawings.
본 발명의 설명에 앞서 본 발명과 관련된 공지 기능 또는 구성에 대한 구체적인 기술은 본 발명의 요지를 불필요하게 흐릴 수 있다고 판단되는 경우 그 상세한 설명을 생략하기로 한다.Prior to the description of the present invention, a detailed description of known functions or configurations related to the present invention will be omitted if it is determined that the gist of the present invention may be unnecessarily obscured.
또한, 후술 되는 용어들은 본 발명에서의 기능을 고려하여 정의된 용어들로 서 이는 사용자 및 운용자의 의도 또는 관례 등에 따라 달라질 수 있다. 따라서 그러한 정의는 본 명세서 전반에 걸쳐 기재된 내용을 바탕으로 판단되어야 할 것이다.In addition, terms to be described later are terms defined in consideration of functions in the present invention, which may vary according to intentions or customs of users and operators. Therefore, such a definition should be determined based on the contents described throughout the specification.
도 1은 본 발명의 바람직한 실시예에 따른 주석(Sn) 또는 주석(Sn)-인듐(In) 합금과 실리콘(Si)이 교대로 적층된 박막의 코팅과정을 나타낸 순서도이다.1 is a flowchart illustrating a coating process of a thin film in which tin (Sn) or tin (Sn) -indium (In) alloy and silicon (Si) are alternately stacked according to a preferred embodiment of the present invention.
먼저, 소정의 시트(sheet) 혹은 사출물을 형성하고(S110), 상기 결과물의 표면에 스퍼터링법을 이용하여 주석(Sn) 박막 또는 주석(Sn)-인듐(In)의 합금 박막을 코팅한다(S120). 다음으로, 상기 S120 단계에서 형성된 박막의 표면에 스퍼터링법을 이용하여 실리콘(Si) 박막을 코팅한다(S130).First, a predetermined sheet or an injection molded product is formed (S110), and a thin film of Sn (Sn) or an alloy of tin (Sn) -indium (In) is coated on the surface of the resultant by sputtering (S120). ). Next, the silicon (Si) thin film is coated on the surface of the thin film formed in the step S120 by using a sputtering method (S130).
상기 S120 단계 및 S130 단계를 복수 회 반복하여 수행함으로써(S140), 본 발명에 따른 케이스 외관의 박막 코팅과정이 완료된다.By repeating the steps S120 and S130 a plurality of times (S140), the thin film coating process of the case appearance according to the present invention is completed.
이때, 상기 주석 박막, 주석-인듐 박막 및 실리콘 박막은 50nm 이하의 두께를 가지도록 코팅되는 것이 바람직하다.At this time, the tin thin film, tin-indium thin film and the silicon thin film is preferably coated to have a thickness of 50nm or less.
도 2는 본 발명의 또 다른 실시예에 따른 주석(Sn) 또는 주석(Sn)-인듐(In)의 합금에 실리콘(Si)을 혼합한 혼합박막의 코팅과정을 나타낸 순서도이다.2 is a flowchart illustrating a coating process of a mixed thin film in which silicon (Si) is mixed with an alloy of tin (Sn) or tin (Sn) -indium (In) according to another embodiment of the present invention.
먼저, 소정의 시트(sheet) 혹은 사출물을 형성한 후(S210), 상기 결과물의 표면에 스퍼터링법을 이용하여 주석(Sn) 또는 주석(Sn)-인듐(In)의 합금에 실리콘(Si)을 혼합한 혼합박막을 코팅함으로써(S220), 케이스 외관의 박막 코팅과 정이 완료된다.First, after forming a predetermined sheet (sheet) or an injection molded product (S210), the silicon (Si) to the alloy of tin (Sn) or tin (Sn) -indium (In) by the sputtering method on the surface of the resultant By coating the mixed mixed thin film (S220), the thin film coating process of the case appearance is completed.
이때, 상기 주석(Sn) 또는 주석(Sn)-인듐(In)의 합금에 실리콘(Si)을 혼합한 혼합박막에서, 실리콘(Si)의 혼합비율은 10~40 중량% 인 것이 바람직하다.At this time, in the mixed thin film in which silicon (Si) is mixed with the alloy of tin (Sn) or tin (Sn) -indium (In), the mixing ratio of silicon (Si) is preferably 10 to 40% by weight.
이와 같이 주석 또는 주석-인듐의 합금박막에 실리콘이 교차 적층된 합금박막을 구성하거나, 주석-인듐의 합금박막에 실리콘을 혼합한 혼합박막을 코팅하게 되면, 일반 주석 또는 주석-인듐 합금만을 코팅할 경우 고온 고습에서 변색되거나 자외선에 오래 방치했을 때 변색되는 문제점을 해결할 수 있다.As such, when an alloy thin film cross-laminated with silicon is formed on an alloy thin film of tin or tin-indium, or when a mixed thin film mixed with silicon is coated on the alloy thin film of tin-indium, only general tin or tin-indium alloy may be coated. In the case of discoloration at high temperature and high humidity or discoloring when left for a long time can solve the problem.
또한, 상기와 같이 주석 또는 주석-인듐의 합금박막에 실리콘이 교차 적층된 합금박막을 형성할 경우 막의 두께가 두꺼워지면서 저항값이 떨어져 비전도 특성이 사라지는 문제점을 해결할 수 있다. 즉, 종래기술과 같이 주속 또는 주석-인듐의 합금만을 코팅할 경우에는 막의 두께가 두꺼워질수록 저항값이 1MΩ 이하로 떨어져 비전도 특성이 사라지는 문제점이 있었으나, 본 발명의 실시예에서는 막의 두께를 두껍게 형성할 때 주석 또는 주석-인듐 합금의 막과 막 사이에 실리콘 박막층을 형성하여 전반적으로 저항값이 낮아지는 현상을 차단, 고저항 박막을 유지할 수 있게 하였다.In addition, when forming an alloy thin film in which silicon is cross-laminated in the alloy thin film of tin or tin-indium as described above, the problem that the non-conductive property disappears due to the increase in the thickness of the film and the resistance value is lost. That is, in the case of coating only the alloy of the main velocity or tin-indium as in the prior art, there is a problem that the non-conductive property disappears as the thickness of the film becomes thicker and the resistance value falls below 1 MΩ, but in the embodiment of the present invention, When forming, a thin silicon film layer was formed between the film of the tin or tin-indium alloy and the film to prevent the overall resistance value from being lowered, thereby maintaining a high resistance thin film.
한편, 본 발명에 적용되는 스퍼터링(sputtering)법에 대하여 간략히 살펴보면, 스퍼터링(sputtering) 가스를 진공분위기로 이루어진 챔버(camber) 내로 주입하여 플라즈마를 생성시킨 후, 상기 플라즈마 내의 입자를 성막하고자 하는 타겟(target) 물질에 충돌시켜 이 충돌에 의해 타겟으로부터 분리된 물질을 기판(substrate)에 코팅(coating)시키는 방법이다.Meanwhile, the sputtering method applied to the present invention will be briefly described. After injecting a sputtering gas into a chamber made of a vacuum atmosphere to generate a plasma, a target to form a particle in the plasma ( It is a method of coating a substrate with a material separated from the target by the collision by colliding with a target material.
일반적으로 스퍼터링(sputtering) 가스는 불활성 가스(inert gas)인 아르곤(Ar)을 사용한다. 스퍼터(sputter) 시스템은 타겟(target)을 음극(cathod)으로 사용하고, 기판을 양극(anode)으로 사용한다. 전원을 인가하면 주입된 스퍼터링(sputtering) 가스는 음극에서 방출된 전자와 충돌하여 이온화(Ar+)되고, 이 이온들은 음극인 타겟(target)으로 끌려서 타겟(target)과 충돌한다.In general, the sputtering gas uses argon (Ar), which is an inert gas. The sputter system uses a target as a cathode and a substrate as an anode. When the power is applied, the injected sputtering gas collides with electrons emitted from the cathode and is ionized (Ar +), and these ions are attracted to the target, which is the cathode, and collide with the target.
이 충돌에 의해 이온들이 갖고 있던 에너지는 타겟(target)으로 전이되고, 타겟(target) 물질의 원자, 분자 등이 챔버내로 방출되며, 이렇게 방출된 타겟물질이 기판 위에 박막으로 형성되는 것이다.The energy of the ions is transferred to the target by this collision, atoms, molecules, and the like of the target material are released into the chamber, and the released target material is formed as a thin film on the substrate.
이러한 스퍼터링법을 이용한 박막의 제조기술은 코팅층의 두께를 수십 ㎚까지 정밀하게 조절할 수 있으며, 간단한 마스크를 사용하여 부분 코팅과정을 매우 용이하게 처리할 수 있다.The manufacturing technology of the thin film using the sputtering method can precisely control the thickness of the coating layer up to several tens of nm, and can easily process the partial coating process using a simple mask.
이상, 본 발명의 구체적인 실시 형태에 대하여 상세하게 기술하였지만, 본 발명이 속하는 기술분야에서 통상의 지식을 가진 자는 본 발명이 그 기술적 사상이나 필수적 특징을 변경하지 않고서도 다른 구체적인 형태로 실시할 수 있으므로, 이상에서 기술한 실시예들은 모든 면에서 예시적인 것이며 본 발명은 본 상세한 설명에 기재된 것에 한정되는 것은 아닌 것으로 이해되어야만 한다. 본 발명의 권리범위는 상기 상세한 설명보다는 후술하는 특허청구범위에 의하여 나타내어지며, 특 허청구범위의 의미 및 범위 그리고 그 등가개념으로부터 도출되는 모든 변경 또는 변형된 실시형태는 본 발명의 범위에 포함되는 것으로 해석되어야 한다.Although specific embodiments of the present invention have been described in detail above, those skilled in the art to which the present invention pertains may implement the present invention in other specific forms without changing the technical spirit or essential features thereof. It should be understood that the embodiments described above are exemplary in all respects and that the present invention is not limited to those described in the detailed description. The scope of the present invention is shown by the following claims rather than the above description, and all changes or modifications derived from the meaning and scope of the claims and their equivalents are included in the scope of the present invention. Should be interpreted as
도 1은 본 발명의 바람직한 실시예에 따른 주석(Sn) 또는 주석(Sn)-인듐(In) 합금과 실리콘(Si)이 교대로 적층된 박막의 코팅과정을 나타낸 순서도이다.1 is a flowchart illustrating a coating process of a thin film in which tin (Sn) or tin (Sn) -indium (In) alloy and silicon (Si) are alternately stacked according to a preferred embodiment of the present invention.
도 2는 본 발명의 또 다른 실시예에 따른 주석(Sn) 또는 주석(Sn)-인듐(In)의 합금에 실리콘(Si)을 혼합한 혼합박막의 코팅과정을 나타낸 순서도이다.2 is a flowchart illustrating a coating process of a mixed thin film in which silicon (Si) is mixed with an alloy of tin (Sn) or tin (Sn) -indium (In) according to another embodiment of the present invention.
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| PCT/KR2008/005597 WO2009057892A1 (en) | 2007-10-29 | 2008-09-22 | Method of coating exterior surface of case with high resistance thin film |
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| CN109291230A (en) * | 2018-10-12 | 2019-02-01 | 福建省通通发科技发展有限公司 | A kind of modernization zirconia ceramics phone housing equipment |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| KR19980702384A (en) * | 1995-02-22 | 1998-07-15 | 씨. 에프. 브라아크만 | Method of producing a protective coating layer on the surface of glass or ceramic products |
| KR19990028992A (en) * | 1996-05-14 | 1999-04-15 | 뮐러 르네 | Windowpanes with antireflective coatings |
| KR20070074801A (en) * | 2006-01-10 | 2007-07-18 | 바코스 주식회사 | Method for coating thin film of case appearance |
| KR20070076028A (en) * | 2006-01-17 | 2007-07-24 | 바코스 주식회사 | Method for coating dielectric thin film of case appearance |
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- 2007-10-29 KR KR1020070108767A patent/KR100858704B1/en not_active IP Right Cessation
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR19980702384A (en) * | 1995-02-22 | 1998-07-15 | 씨. 에프. 브라아크만 | Method of producing a protective coating layer on the surface of glass or ceramic products |
| KR19990028992A (en) * | 1996-05-14 | 1999-04-15 | 뮐러 르네 | Windowpanes with antireflective coatings |
| KR20070074801A (en) * | 2006-01-10 | 2007-07-18 | 바코스 주식회사 | Method for coating thin film of case appearance |
| KR20070076028A (en) * | 2006-01-17 | 2007-07-24 | 바코스 주식회사 | Method for coating dielectric thin film of case appearance |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109291230A (en) * | 2018-10-12 | 2019-02-01 | 福建省通通发科技发展有限公司 | A kind of modernization zirconia ceramics phone housing equipment |
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