KR100850894B1 - Plasma Display Apparatus - Google Patents

Abstract

According to an embodiment of the present invention, a plasma display panel including a first scan electrode and a second scan electrode, and a first driving module supplying a scan pulse in an address period and a first sustain pulse in a sustain period to the first scan electrode And a second driving module for supplying a scan bias voltage in the address period and a second sustain pulse to the second scan electrode in the sustain period, and connected to the driving integrated circuit to receive the first sustain pulse and the second sustain pulse. The first scan electrode and the second scan electrode are connected to a resonance forming unit and a driving integrated circuit which supply energy for forming to the first scan electrode and the second scan electrode or recover the energy from the first scan electrode and the second scan electrode. An energy storage unit for supplying or recovering energy from the first scan electrode and the second scan electrode. And a gong.

Description

Plasma Display Apparatus {Plasma Display Apparatus}

1 illustrates a driving unit of a general plasma display apparatus.

2 shows a plasma display device according to an embodiment of the present invention.

3 illustrates a plasma display device including a driving integrated circuit according to an exemplary embodiment of the present invention.

 4 illustrates a plasma display device including a driving integrated circuit according to another exemplary embodiment of the present invention.

<Explanation of symbols for the main parts of the drawings>

210: driving integrated circuit 220a: first driving module

220b: second driving module 230a: first reverse current blocking unit

230b: second reverse current blocking unit 240a: first inductor

240b: second inductor 250: energy storage unit

260a: first scan switch 260b: second scan switch

270a: first sustain switch 270b: second sustain switch

The present invention relates to a plasma display device and a driving integrated circuit thereof.

In general, a plasma display apparatus includes a plasma display panel for displaying an image and a driving unit for driving the plasma display panel. The plasma display panel consists of a front substrate and a rear substrate of soda-lime glass. A partition wall is formed between the front substrate and the rear substrate to partition the discharge cells.

The inert gas injected inside the discharge cells causes the discharge by the high frequency voltage. Vacuum ultraviolet rays (Vacuum Ultraviolet rays) are generated due to the discharge, and the image is realized by emitting a fluorescent substance formed between the partition walls by the vacuum ultraviolet rays.

1 illustrates a driving unit of a general plasma display apparatus.

During the reset period, the setup switch Q5 and the seventh switch Q7 are turned on, and the sustain voltage Vs supplied from the sustainer 10 is the body diode of the sixth switch Q6. ), The seventh switch Q7 and the fifteenth switches Q15 _n-1 and Q15 _n of the drive integrated circuit 14 are supplied to the scan electrodes Y _n-1 and Y _n .

At this time, when the setup switch Q5 operating in the active region is turned on, the voltage gradually rises from the sustain voltage Vs to the sum of the sustain voltage Vs and the setup voltage Vst (Vs + Vst). The setup pulse is supplied to the scan electrodes Y _n-1 and Y _n through the seventh switch Q7 and the fifteenth switches Q15 _n−1 and Q15 _n of the drive integrated circuit 14.

When the setup switch Q5 is turned off after the setup pulses are supplied to the scan electrodes Y _n-1 and Y _n , only the sustain voltage Vs supplied from the sustainer 10 is applied to the scan electrodes Y _{n. -1} , Y _n ).

Thereafter, the seventh switch Q7 is turned off and the set-down switch Q10 operating in the active area is turned on. Accordingly, a set down pulse gradually falling from the sustain voltage Vs to the write scan voltage -Vyw is supplied to the scan electrodes Y _n-1 and Y _n .

In the address period, the eleventh switch Q11 and the fifteenth switch Q15 _n-1 of the drive integrated circuit 14 _n-1 are turned on to scan the n−1 th scan electrode Y _n−1 . On, the scan voltage (−Vyw) is supplied to the n−1 th scan electrode Y _n−1 . At this time, the eighth switch Q8, the ninth switch Q9, and the fourteenth switch Q14 _n of the drive integrated circuit 14 _n are turned on to write the scan scan voltage (−Vyw) to the nth scan electrode Y _n . And a scan bias voltage Vsc corresponding to the sum of the scan voltages Vsc. When the scan on the n-1 th scan electrode Y _n-1 is performed, the scan on the n th scan electrode Y _n is performed. The data pulse corresponding to the image signal is supplied to the address electrode (not shown) of the plasma display panel in synchronization with the period during which the write scan voltage (-Vyw) is supplied. As a result, a discharge cell in which sustain discharge will occur in the sustain period is selected.

In the sustain period, the sustain pulse generated by the sustainer 10 is n-th scan electrode Y through the fifteenth switches Q15 _n-1 and Q15 _n of the drive integrated circuits 14 _n-1 and 14 _n . _n-1 ) and the nth scan electrode Y _n are supplied.

Since the driving unit of the conventional plasma display apparatus is configured by separating the sustainer 10 and the drive integrated circuits 14 _n-1 and 14 _n , a circuit configuration is complicated.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems and to provide a plasma display device and a driving integrated circuit thereof capable of simplifying a circuit configuration.

Technical problems to be achieved by the present invention are not limited to the above-mentioned technical problems, and other technical problems not mentioned above will be clearly understood by those skilled in the art from the following description. Could be.

According to an embodiment of the present invention, a plasma display panel including a first scan electrode and a second scan electrode, a scan pulse in an address period, and a first scan electrode in a sustain period A driving integrated circuit including a first driving module to supply a second driving module to supply a scan bias voltage and a second sustain pulse to a second scan electrode in a sustain period in an address period, and a first sustain connected to the driving integrated circuit; The energy for forming the pulse and the second sustain pulse to the first scan electrode and the second scan electrode, or connected to the resonance forming unit and the driving integrated circuit for recovering the energy from the first scan electrode and the second scan electrode, thereby supplying energy to the first scan electrode. To recover or supply energy from the scan electrode and the second scan electrode from the first scan electrode and the second scan electrode. Includes energy storage.

Further, a first sustain switch located between the driving integrated circuit and the resonance forming unit and connected in a sustain period to connect a path for supplying energy, a second sustain switch for connecting a path for energy recovery, and a drive integration A first scan switch connected between one end of the first sustain switch between the circuit and the first sustain switch and connecting a path that is turned on in an address period to form a scan bias voltage, and a second between the drive integrated circuit and the first sustain switch; And a second scan switch connected to the other end of the sustain switch and connected to a path which is turned on in the address period to form a write scan voltage which is the lowest voltage of the scan pulse.

The apparatus may further include a first reverse current blocking unit connected to the driving integrated circuit to block reverse current when supplying energy, and a second reverse current blocking unit connected to the driving integrated circuit to block reverse current when recovering energy.

The apparatus may further include a first reverse current blocking unit connected to the driving integrated circuit to block reverse current when supplying energy, and a second reverse current blocking unit connected to the driving integrated circuit to block reverse current when recovering energy. The blocking portion includes a first diode, the second reverse current blocking portion includes a second diode, an anode end of the first diode is connected to the resonance forming portion, and a cathode end of the first diode is connected to the driving integrated circuit, and The anode end of the two diodes is connected to the driving integrated circuit, and the cathode end of the second diode is connected to the resonance forming portion.

The apparatus may further include a first reverse current interruption unit connected to the first sustain switch to block reverse current when supplying energy and a second reverse current interruption unit connected to the second sustain switch to block reverse current when recovering energy.

In addition, the first reverse current blocking unit includes a first diode, the second reverse current blocking unit includes a second diode, an anode end of the first diode is connected to the resonance forming unit, and a cathode end of the first diode is connected to the first diode. It is connected to the sustain switch, the anode end of the second diode is connected to the second sustain switch, the cathode end of the second diode is connected to the resonance forming portion.

The resonance forming unit may include a first inductor included in the energy supply path and a second inductor included in the energy recovery path.

In addition, the resonance forming unit includes a first inductor included in the energy supply path and a second inductor included in the energy recovery path, and the inductance of the first inductor is smaller than that of the second inductor.

In addition, the driving integrated circuit according to another embodiment of the present invention for driving the plasma display panel driving the plasma display panel including a first scan electrode and a second scan electrode, the scan pulse in the address period and The first driving module supplies the first sustain pulse to the first scan electrode in the sustain period, and the second driving module supplies the scan bias voltage and the second sustain pulse to the second scan electrode in the sustain period in the address period.

Also, the driving integrated circuit includes first to sixth terminals, the first terminal being supplied with the scan bias voltage and the sustain voltage which is the highest voltage of the sustain pulse, and the second terminal being the write scan voltage which is the lowest voltage of the scan pulse. And a base voltage is supplied, the third terminal is included in an energy supply path for the formation of the first sustain pulse and the second sustain pulse, and the fourth terminal is an energy recovery for the formation of the first sustain pulse and the second sustain pulse. Included in the path, the fifth terminal is electrically connected with the first scan electrode and the sixth terminal is electrically connected with the second scan electrode.

In addition, the driving integrated circuit includes first to sixth terminals, at least one of the first terminal and the third terminal receives a scan bias voltage, and the second terminal or the fourth terminal is the lowest voltage of the scan pulse. The write scan voltage is supplied, the fifth terminal is electrically connected to the first scan electrode, and the sixth terminal is electrically connected to the second scan electrode.

Specific details of other embodiments are included in the detailed description and drawings. Advantages and features of the present invention and methods for achieving them will be apparent with reference to the embodiments described below in detail in conjunction with the accompanying drawings.

2 illustrates a plasma display device according to an embodiment of the present invention.

Referring to FIG. 2, a plasma display apparatus according to an embodiment of the present invention includes a plasma display panel 100 including an electrode, a first driver 200, a second driver 300, and a third driver 400. do.

The plasma display panel 100 is bonded to the front panel (not shown) and the rear panel (not shown) at regular intervals, and scan electrodes Y1 to Yn, sustain electrodes Z1 to Zn, and address electrodes X1 to Xm. ).

The first driver 200 supplies reset pulses to the scan electrodes Y1 to Yn to uniformly form wall charges in the discharge cells. The first driver 200 supplies a scan pulse for selecting a discharge cell to be discharged in the address period, and a sustain pulse for generating sustain discharge in the discharge cell selected in the sustain period to the scan electrodes Y1 to Yn.

In addition, the first driver 200 supplies a scan pulse, a scan bias voltage Vsc, a sustain voltage Vs, and the like to the scan electrodes through the driving integrated circuit during the address period or the sustain period. A detailed description of the driving integrated circuit will be described in detail with reference to FIGS. 3 and 4.

The second driver 300 supplies the sustain bias pulses to the sustain electrodes Z1 through Zn during the set down period and the address period, and supplies the sustain pulses to the sustain electrodes Z1 through Zn during the sustain period.

In the third driver 400, after inverse gamma correction and error diffusion by an inverse gamma correction circuit, an error diffusion circuit, and the like, the data mapped to each subfield is supplied by a subfield mapping circuit. The third driver 400 samples and latches data in response to a data timing control signal from a timing controller (not shown), and then supplies the latched data to the address electrodes X1 to Xn.

The driving integrated circuit included in the first driving unit as described above is illustrated in FIG. 3.

3 illustrates a plasma display device including a driving integrated circuit according to an exemplary embodiment of the present invention.

Referring to FIG. 3, the plasma display device according to an embodiment of the present invention includes a driving integrated circuit 210, a resonance forming unit 240, reverse current blocking units 230a and 230b, and an energy storage unit 250. .

The driving integrated circuit 210 may include a scan pulse in an address period, a first driving module 220a for supplying a first sustain pulse to the first scan electrode Yk in a sustain period, and a scan bias voltage Vsc in an address period. And a second driving module 220b for supplying a second sustain pulse to the second scan electrode Yk + 5 during the sustain period.

The driving integrated circuit 210 includes first terminals 211 to sixth terminals 216, and the first terminal 211 receives a scan bias voltage Vsc and a sustain voltage Vs which is the highest voltage of the sustain pulse. The second terminal 212 is supplied with a write scan voltage (-Vy) and a ground voltage (GND), which are the lowest voltages of the scan pulses. In addition, the third terminal 213 is included in the energy supply path for the formation of the first sustain pulse and the second sustain pulse, and the fourth terminal 214 is the energy for the formation of the first sustain pulse and the second sustain pulse. Included in the recovery route. In addition, the fifth terminal 215 is electrically connected to the first scan electrode Yk, and the sixth terminal 216 is electrically connected to the second scan electrode Yk + 5.

The reverse current blocking units 230a and 230b, the resonance forming unit 240, and the energy storage unit 250 connected to the driving integrated circuit 210 will be described below.

The reverse current blocking units 230a and 230b include a first reverse current blocking unit 230a and a second reverse current blocking unit 230b. The first reverse current blocking unit 230a blocks the reverse current supplied to at least one of the first scan electrode Yk or the second scan electrode Yk + 5, and the second reverse current blocking unit 230b The reverse current recovered from at least one of the first scan electrode Yk and the second scan electrode Yk + 5 is blocked.

To this end, the reverse current blocking units 230a and 230b include diodes D1 and D2. The anode terminal of the first diode D1 is connected to the first inductor L1 of the resonance forming unit 240, and the cathode terminal of the first diode D1 is connected to the third terminal 213 of the driving integrated circuit 210. The anode terminal of the second diode D2 is connected to the fourth terminal 214 of the driving integrated circuit 210, and the cathode terminal of the second diode D2 is the second inductor of the resonance forming unit 240. Is connected to (L2). As such, the first reverse current blocking unit 230a and the second reverse current blocking unit 230b are connected to the terminals of the driving integrated circuit 210 to thereby reverse each of the plurality of driving modules included in the driving integrated circuit 210. Since it is not necessary to form the flow interrupting portions 230a and 230b, not only the component element can be reduced but also it is easy to integrate.

The resonance forming unit 240 supplies energy to at least one of the first scan electrode Yk or the second scan electrode Yk + 5 during the sustain period, or the first scan electrode Yk or the second scan electrode Yk +. A resonance forms when energy is recovered from at least one of 5). To this end, the resonance forming unit 240 includes inductors L1 and L2.

In addition, the resonance forming unit 240 may include a first inductor L1 and a second inductor L2. The first inductor L1 forms a resonance when energy is supplied to at least one of the first scan electrode Yk or the second scan electrode Yk + 5 during the sustain period, and the second inductor L2 performs the sustain period during the sustain period. A resonance is formed when energy is recovered from at least one of the first scan electrode Yk or the second scan electrode Yk + 5.

In addition, the inductance of the first inductor L1 may be smaller than the inductance of the second inductor L2. This is because the smaller the inductance than the larger inductance, the faster the voltage can be raised. Therefore, the energy supply path that needs to rise rapidly to the sustain voltage (Vs), which is the highest voltage of the sustain pulse, connects the one having the smallest inductance. In this way, the driving efficiency can be further improved by differentiating the energy supply path and the recovery path.

In an embodiment of the present invention, although the resonance forming unit 240 is divided into the first inductor L1 and the second inductor L2, the resonance forming unit 240 may be formed as one inductor. When the resonance forming unit is formed of one inductor, a path for supplying energy and a path for recovering energy may be used in common.

The energy storage unit 250 stores energy supplied or recovered during the sustain period. For this purpose, the energy storage unit 250 includes a capacitor Cs.

The connection relationship and the operation path of the driving integrated circuit 210, the reverse current blocking units 230a and 230b, the resonance forming unit 240, and the energy storage unit 250 described above will be described below.

The fifth switch S5 of the first driving module 220a included in the driving integrated circuit 210 is electrically connected to the first terminal 211 to be the fifth terminal 215 or the sixth terminal 216 during the address period. ) The scan bias voltage Vsc is supplied to one of the two terminals, and the sustain voltage Vs, which is the highest voltage of the sustain pulse, is supplied to either one of the fifth terminal 215 or the sixth terminal 216 during the sustain period. Supply. The sixth switch S6 is electrically connected to the second terminal 212 to write a scan pulse (-Vy) of a scan pulse to one of either the fifth terminal 215 or the sixth terminal 216 during the address period. Supplies a ground voltage (GND) to one of either the fifth terminal 215 or the sixth terminal 216 during the sustain period. The seventh switch S7 is electrically connected to the third terminal 213 to supply energy supplied from the energy storage unit 250 during the sustain period, either one of the fifth terminal 215 or the sixth terminal 216. To feed. The eighth switch S8 is electrically connected to the fourth terminal 214 to recover energy recovered from the first scan electrode Yk or the second scan electrode Yk + 5 to the energy storage unit 250 during the sustain period. Supply.

The second driving module 220b includes first terminals 211 to sixth terminals 216 that are substantially the same as the first driving module 220a, and each terminal and each of the switches S1, S2, S3, Since the function of S4) is substantially the same as that of the first driving module 220a, a detailed description of the second driving module 220b will be omitted.

Here, the first switch S5 of the first driving module 220a and the first switch S1 of the second driving module 220b may be electrically connected, and the remaining second switches S6 and S2 to the fourth switch. Each of S8 and S4 may also be electrically connected.

The driving integrated circuit 210 of the plasma display apparatus according to an embodiment of the present invention forms a supply path and a recovery path of energy to form a sustain pulse. To this end, the driving integrated circuit 210 includes first switches S5 and S1 to fourth switches S8 and S4 of the first driving module 220a and the second driving module 220b.

One end of the seventh switch S7 of the first driving module 220a is connected to the third terminal 213, and the other end thereof is connected to the fifth terminal 215. Accordingly, the voltage rising up to the sustain voltage Vs, which is the highest voltage of the sustain pulse, by turning on the seventh switch S7, causes the first inductor L1 and the first reverse current blocking unit 230a in the energy storage unit 250. A path for supplying to the first scan electrode Yk connected to the fifth terminal 215 is formed.

One end of the fifth switch S5 is connected to the first terminal 211 and the other end is connected to the fifth terminal 215. Accordingly, after the seventh switch S7 is turned off, the fifth switch S5 is turned on so that the first scan electrode Yk is connected to the fifth terminal 215 to maintain the sustain voltage Vs for a predetermined time. A path to feed is formed.

The other end of the eighth switch S8 is connected to the fourth terminal 214, and one end thereof is connected to the fifth terminal 215. Accordingly, when the eighth switch S8 is turned on after the fifth switch S5 is turned off, the second reverse current blocking unit receives a voltage falling from the sustain voltage Vs to the base voltage from the first scan electrode Yk. 230b, a path for recovering energy to the energy storage unit 250 through the second inductor L2 is formed.

The other end of the sixth switch S6 is connected to the second terminal 212, and one end thereof is connected to the fifth terminal 215. Accordingly, after the eighth switch S8 is turned off, the sixth switch S6 is turned on so that the first scan electrode Yk is connected to the fifth terminal 215 to maintain the base voltage GND for a predetermined time. A path to feed is formed.

The switch S5, S6, S7, and S8 of the first driving module 220a have been described, but the switches S1, S2, S3, and S4 of the second driving module 220b are also the first driving module 220a. Is substantially the same as the operation of the switches S5, S6, S7 and S8.

In addition, the driving integrated circuit 210 of the plasma display apparatus according to the exemplary embodiment forms a path for forming a scan pulse.

First, one end of the fifth switch S5 of the first driving module 220a is connected to the first terminal 211, and the other end thereof is connected to the fifth terminal 215. Accordingly, a path in which the scan bias voltage Vsc is supplied to the first scan electrode Yk through the fifth terminal 215 is formed by turning on the fifth switch S5.

The other end of the second switch S2 of the second driving module 220b is connected to the second terminal 212, and one end thereof is connected to the sixth terminal 216. Accordingly, the second switch S2 is turned on to form a path through which the write scan voltage (-Vy) of the scan pulse is supplied to the second scan electrode Yk + 5 through the sixth terminal 216.

As described above, the first driving module 220a and the second driving module 220b supply the scan bias voltage Vsc and the write scan voltage (-Vy) of the scan pulse to sequentially scan the scan electrodes during the address period. It is due to operating characteristics.

Therefore, when the fifth switch S5 of the first driving module 220a is turned on, the first switch of the second driving module 220b connected to the fifth switch S5 of the first driving module 220a ( S1) is turned off. When the second switch S2 of the second driving module 220b is turned on, the sixth switch S6 of the first driving module 220a connected to the second switch S2 of the second driving module 220b. ) Is turned off.

In addition, although the first scan electrode Yk and the second scan electrode Yk + 5 are not adjacent to each other in FIG. 3, they may be formed adjacent to each other.

In the driving integrated circuit 210 of the plasma display apparatus according to the exemplary embodiment described above, the diodes D, the inductors L, and the capacitors Cs constituting the energy recovery circuit are disposed outside the driving integrated circuit. Since only the switching element is built into the driving integrated circuit, the drive integrated circuit can be equipped with a sustainer function according to the connection relationship of external devices. Therefore, it is possible to provide a circuit configuration that is easy to integrate into a single integrated circuit and can perform various functions. In addition, since the driving integrated circuit is positioned at the position of the conventional drive integrated circuit formed in FIG. 1, a path formed from the energy recovery circuit of the sustainer to the panel may be shorter. The shorter the path that forms the current, the lower the probability of noise that may be generated when driving the panel. Therefore, the driving efficiency can be increased by reducing the noise.

In addition, the driving integrated circuit according to an embodiment of the present invention described above may drive a large capacity drive integrated circuit by changing a connection between terminals, which will be described in detail with reference to FIG. 4.

4 illustrates a plasma display device including a driving integrated circuit according to another exemplary embodiment of the present invention.

Referring to FIG. 4, the plasma display device according to another embodiment of the present invention may include a driving integrated circuit 210, a resonance forming unit 240, reverse current blocking units 230a and 230b, an energy storage unit 250, and a scan switch. Sections 260a and 260b, sustain switch sections 270a and 270b, and the like. The driving integrated circuit 210 according to another exemplary embodiment of the present invention scans the scan pulse in the address period, the first driving module 220a for supplying the first sustain pulse to the first scan electrode Yk in the sustain period, and the scan period in the address period. The second driving module 220b supplies a second sustain pulse to the second scan electrode Yk + 5 during the bias voltage Vsc and the sustain period.

In FIG. 4, the resonance forming unit 240, the reverse current blocking units 230a and 230b, and the energy storage unit 250 described above with reference to FIG. 3 will be omitted.

First, the scan switch units 260a and 260b and the sustain switch units 270a and 270b will be described. The connection relations regarding these are as follows.

The sustain switch parts 270a and 270b are composed of a first sustain switch 270a and a second sustain switch 270b.

The first sustain switch 270a is disposed between the third terminal 213 and the first inductor L1 of the driving integrated circuit 210 and is turned on in the sustain period to form a path for supplying energy. The second sustain switch 270b is disposed between the fourth terminal 214 and the second inductor L2 of the driving integrated circuit 210 and is turned on in the sustain period to form a path for energy recovery.

The scan switch units 260a and 260b are composed of a first scan switch 260a and a second scan switch 260b.

One end of the first scan switch 260a is commonly connected to the other end of the third terminal 213 and the first sustain switch 270a of the driving integrated circuit 210, and the other end thereof is the first terminal of the driving integrated circuit 210. 211 and a supply unit for supplying the scan bias voltage Vsc, and are turned on in an address period to form a path forming the scan bias voltage Vsc.

One end of the second scan switch 260b is commonly connected to one end of the fourth terminal 214 and the second sustain switch 270b of the driving integrated circuit 210, and the other end of the second scan switch 260b is connected to the second terminal of the driving integrated circuit 210. 212) and a supply unit for supplying the write scan voltage (-Vy), which is the lowest voltage of the scan pulse, are turned on in an address period to form a path forming the write scan voltage (-Vy), which is the lowest voltage of the scan pulse. .

 In addition, the other end of the first sustain switch 270a is connected to one end of the first reverse current blocking unit 230a that blocks the reverse current when energy is supplied, and one end of the second sustain switch 270b is reverse current when energy is recovered. It is connected to the other end of the second reverse current blocking unit 230b for blocking.

Here, the first reverse current blocking unit 230a includes a first diode D1, the second reverse current blocking unit 230b includes a second diode D2, and an anode end of the first diode D1. Is connected to the first inductor L1 of the resonance forming unit 240, the cathode end of the first diode D1 is connected to one end of the first sustain switch 270a, and the anode end of the second diode D2 is The other end of the second sustain switch 270b is connected, and the cathode end of the second diode D2 is connected to the second inductor L2 of the resonance forming unit 240.

The first and second scan switches 260a and 260b are turned on during the address period, and when the first scan switch 260a is turned on, the scan bias voltage Vsc is turned on, and the second scan switch 260b is turned on. In this case, the write scan voltage (-Vy), which is the lowest voltage of the scan pulse, is supplied.

The first and second sustain switches 270a and 270b are turned on during the reset or sustain period. When the first sustain switch 270a is turned on, the first and second sustain switches 270a and 270b turn on the sustain voltage Vs which is the highest voltage of the sustain pulse. When 270b is turned on, the ground voltage GND is supplied.

Therefore, when at least one of the first scan switch 260a or the second scan switch 260b is turned on, the first sustain switch 270a and the second sustain switch 270b are turned off, and the first sustain switch 270a is turned off. ) Or when at least one of the second sustain switch 270b is turned on, the first scan switch 260a and the second scan switch 260b are turned off.

When the first sustain switch 270a or the second sustain switch 270b is turned on, it is substantially the same as the operation described with reference to FIG. 3, and thus description thereof will be omitted and the first scan switch 260a or the first sustain switch 270a or the second sustain switch 270b is turned on. The case where at least one of the two scan switches 260b is turned on will be described below.

The driving integrated circuit 210 includes first terminals 211 to sixth terminals 216, and the first terminal 211 or the third terminal 213 receives a scan bias voltage Vsc, and the second terminal 211 or the second terminal 213 receives a scan bias voltage Vsc. The terminal 212 or the fourth terminal 214 is supplied with the write scan voltage (-Vy) which is the lowest voltage of the scan pulse. In addition, the fifth terminal 215 is electrically connected to the first scan electrode Yk, and the sixth terminal 216 is electrically connected to the second scan electrode Yk + 5.

An operation path of the driving integrated circuit 210, the first scan switch 260a, and the second scan switch 260b will be described below.

The fifth switch S5 of the first driving module 220a included in the driving integrated circuit 210 may be electrically connected to the first terminal 211 or the seventh switch S7 by the third terminal 213. The scan bias voltage Vsc is supplied to the first scan electrode Yk through the fifth terminal 215 during the period. At this time, the first scan switch 260a is turned on and the first sustain switch 270a is turned off. Therefore, the scan bias voltage Vsc is routed through the fifth switch S5 of the first driving module 220a through the first terminal 211 and through the first scan switch 260a and the third terminal 213. It may have a path passing through the seventh switch S7 of the first driving module 220a.

In addition, the second switch S2 of the second driving module 220b is electrically connected to the second terminal 212 or the fourth switch S4 to the fourth terminal 214 so that the sixth terminal 216 can be provided during the address period. The write scan voltage (-Vy) of the scan pulse is supplied to the second scan electrode Yk + 5 through the reference numeral. At this time, the second scan switch 260b is turned on and the second sustain switch 270b is turned off.

Therefore, the scan bias voltage Vsc is connected to the path passing through the second switch S6 of the second driving module 220b through the second terminal 212, the second scan switch 260b, and the fourth terminal 214. It may have a path through the fourth switch (S4) of the second driving module 220b through. As such, by supplying the scan bias voltage Vsc through two paths at the same time, even if a large scan bias voltage Vsc loss occurs in one path, the normal scan bias voltage Vsc may be supplied in the other path. Therefore, the scan bias voltage Vsc can be more stably supplied to the first scan electrode Yk or the second scan electrode Yk + 5.

Alternatively, the sixth switch S6 of the first driving module 220a may be electrically connected to the second terminal 212 or the eighth switch S8 to the fourth terminal 214 so that the fifth terminal 215 may be provided during the address period. The scan bias voltage Vsc is supplied to the first scan electrode Yk through. The first switch S1 of the second driving module 220b is electrically connected to the first terminal 211 or the third switch S3 to the third terminal 213 to connect the sixth terminal 216 during the address period. The write scan voltage (-Vy) of the scan pulse is supplied to the second scan electrode Yk + 5 through the scan scan voltage.

Note that when the switches S5, S6, S7, and S8 of the first driving module 220a are turned on, the switches S1, S2, S3, and S4 of the second driving module 220b are turned off. . On the contrary, when the switches S1, S2, S3, and S4 of the second driving module 220b are turned on, the switches S5, S6, S7, and S8 of the first driving module 220a are turned off. As described above, the operation of the scanning electrode can be performed during the address period.

Therefore, the driving integrated circuit 210 of the plasma display apparatus according to another embodiment of the present invention can satisfy the function of the large capacity drive integrated circuit required as the plasma display panel is increased in resolution and size.

As described above, those skilled in the art will appreciate that the present invention can be implemented in other specific forms without changing the technical spirit or essential features.

Therefore, the exemplary embodiments described above are to be understood as illustrative and not restrictive in all respects, and the scope of the present invention is indicated by the following claims rather than the detailed description, and the meaning and scope of the claims and All changes or modifications derived from the equivalent concept should be interpreted as being included in the scope of the present invention.

As described above, the plasma display apparatus and the driving integrated circuit thereof according to the exemplary embodiment of the present invention have the effect of forming a simple circuit through the driving integrated circuit integrating the drive integrated circuit and the sustainer circuit.

In addition, the plasma display device and the driving integrated circuit thereof according to an embodiment of the present invention can also implement an application circuit that can increase the capacity of the driving integrated circuit.

Claims (11)

A plasma display panel including a first scan electrode and a second scan electrode; A first driving module for supplying a scan pulse in an address period and a first sustain pulse to the first scan electrode in a sustain period, and a scan bias voltage in the address period and a second sustain pulse in the sustain period to the second scan electrode A drive integrated circuit comprising a second drive module for supplying to the drive module; Is connected to the driving integrated circuit to supply energy for forming the first sustain pulse and the second sustain pulse to the first scan electrode and the second scan electrode or from the first scan electrode and the second scan electrode. A resonance forming unit to recover; And An energy storage unit connected to the driving integrated circuit to supply the energy to the first scan electrode and the second scan electrode or to recover the energy from the first scan electrode and the second scan electrode; A first sustain switch located between the driving integrated circuit and the resonance forming unit and connected to a path which is turned on in the sustain period to form a supply of energy; A second sustain switch connecting a path forming said energy recovery; A first scan switch connected between one end of the first sustain switch and the driving integrated circuit between the driving integrated circuit and the first sustain switch and connecting a path which is turned on in the address period to form the scan bias voltage; ; And A path which is commonly connected between the other end of the second sustain switch and the driving integrated circuit between the driving integrated circuit and the second sustain switch and is turned on in the address period to form a write scan voltage which is the lowest voltage of the scan pulse; 2nd scan switch to connect Plasma display device comprising a. delete The method of claim 1, A first reverse current blocking unit connected to the driving integrated circuit to block reverse current when the energy is supplied, and a second reverse current blocking unit connected to the driving integrated circuit to block reverse current when the energy is recovered. Plasma display device. The method of claim 1, A first reverse current blocking unit connected to the driving integrated circuit to block reverse current when the energy is supplied, and a second reverse current blocking unit connected to the driving integrated circuit to block reverse current upon energy recovery; The first reverse current blocking unit includes a first diode, the second reverse current blocking unit includes a second diode, An anode end of the first diode is connected with the resonance forming unit, and a cathode end of the first diode is connected with the driving integrated circuit, An anode end of the second diode is connected to the driving integrated circuit, and a cathode end of the second diode is connected to the resonance forming unit. Plasma display device characterized in that. The method of claim 1, And a first reverse current breaker connected to the first sustain switch to block reverse current when energy is supplied, and a second reverse current breaker connected to the second sustain switch to block reverse current when energy is recovered. Plasma display device. The method of claim 5, wherein The first reverse current blocking unit includes a first diode, the second reverse current blocking unit includes a second diode, An anode end of the first diode is connected with the resonance forming portion, and a cathode end of the first diode is connected with the first sustain switch, An anode end of the second diode is connected to the second sustain switch, and a cathode end of the second diode is connected to the resonance forming unit Plasma display device characterized in that. The method of claim 1, The resonance forming unit And a second inductor included in the energy supply path and a second inductor included in the energy recovery path. The method of claim 1, The resonance forming unit A first inductor included in the supply path of energy and a second inductor included in the recovery path of energy; The inductance of the first inductor is smaller than the inductance of the second inductor. delete delete delete

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