KR100848109B1 - An etchant for a wire, a method for manufacturing the wire and a method for manufacturing a thin film transistor array substrate including the method - Google Patents

Abstract

In the method for manufacturing a thin film transistor array substrate according to the present invention, first, a gate line including a gate line, a gate electrode connected to the gate line, and a gate pad is formed on an insulating substrate. Subsequently, a gate insulating film and a semiconductor layer are sequentially formed, and a data line intersecting the gate line, a source electrode connected to the data line, and adjacent to the gate electrode, and connected to a drain electrode and a data line opposite to the source electrode with respect to the gate electrode. The data wiring is formed. Next, a protective film is laminated and the protective film is patterned to form a contact hole exposing at least a drain electrode, and a conductive film made of silver or a silver alloy is laminated on the protective film, and includes phosphoric acid, nitric acid, acetic acid and potassium oxalate and the remaining ultrapure water. The conductive film is patterned using an etching solution for wiring to form a reflective film connected to the drain electrode through the contact hole.

Etch solution, silver, potassium oxalate, phosphoric acid, acetic acid, nitric acid

Description

An etchant for wiring, a method of manufacturing a wiring using the same, and a method of manufacturing a thin film transistor array substrate including the same {an etchant for a wire, a method for manufacturing the wire and a method for manufacturing a thin film transistor array substrate including the method}

1 is a cross-sectional view showing a wire manufacturing method using an etchant for wiring according to an embodiment of the present invention.

2 is a layout view illustrating a structure of a thin film transistor substrate for a reflective liquid crystal display device completed through a method of manufacturing a thin film transistor substrate according to an embodiment of the present invention;

3 is a cross-sectional view taken along the line III-III 'of FIG. 2,

4A, 5A, 6A, and 7A are layout views of a thin film transistor substrate in an intermediate process of manufacturing a thin film transistor substrate for a transflective liquid crystal display device according to an embodiment of the present invention;

4B is a cross-sectional view taken along the line IVb-IVb ′ in FIG. 4A;

FIG. 5B is a cross-sectional view taken along the line Vb-Vb ′ in FIG. 5A and is a cross-sectional view showing the next step in FIG. 4B;

FIG. 6B is a cross-sectional view taken along the line VIb-VIb ′ in FIG. 6A, and is a cross-sectional view illustrating the following steps of FIG. 5B;

FIG. 7B is a cross-sectional view taken along the line VIIb-VIIb ′ in FIG. 7A and illustrates the next step of FIG. 6B.

The present invention relates to a wiring etching solution, a method of manufacturing a wiring using the same, and a method of manufacturing a thin film transistor substrate including the same.

In general, since the wiring of the semiconductor device or the display device is used as a means for transmitting a signal, it is required to suppress the signal delay.

As a method for preventing signal delay, it is required to form wiring using a conductive material having a low resistance, and the conductive material may be silver (Ag) having the lowest specific resistance. However, in the case of using silver or Ag alloy, it is difficult to pattern by a photolithography process using a mask.

On the other hand, the liquid crystal display device is one of the most widely used flat panel display devices, and consists of two substrates on which electrodes are formed and a liquid crystal layer inserted therebetween. The display device controls the amount of light transmitted by rearranging.

Among the liquid crystal display devices, a liquid crystal display device having a thin film transistor that has electrodes formed on two substrates and switches a voltage applied to the electrodes is generally used among liquid crystal display devices, and a thin film transistor is generally formed on one of two substrates. .

Such a liquid crystal display device transmits light emitted by a backlight, which is a specific light source, to a transmissive layer that is a pixel electrode of a transparent conductive material, and displays external images including natural light and a transmissive mode of reflecting light. It can be divided into a reflective mode in which an image is displayed by reflecting on a reflective film that is a pixel electrode.

The liquid crystal display of the reflective mode does not use a specific light source, so the power consumption is small, but the image quality is lowered because the image is displayed only through the light emitted through the reflective film. In order to overcome this disadvantage, it is preferable to use silver or silver alloy or aluminum or aluminum alloy having high reflectivity as the reflecting film.

However, silver or silver alloy has a reflectance of about 15% higher than aluminum or aluminum alloy, and has an effect of improving visibility, but has a disadvantage in that it is difficult to pattern through normal photolithography and thus cannot be used as a reflective film. There is a situation.

An object of the present invention is to provide a wiring etching solution that can be well patterned and a method of manufacturing the wiring using the same.

Another object of the present invention is to provide a method of manufacturing a thin film transistor array substrate for a reflective liquid crystal display device capable of satisfactorily patterning a reflective film.

In the method of manufacturing the wiring according to the present invention and the method of manufacturing the thin film transistor substrate including the same, an etching solution including phosphoric acid, nitric acid, acetic acid, and potassium peroxymonosulfate (oxone) is used as a conductive film for wiring made of silver or silver alloy. By patterning.

At this time, the etchant preferably includes phosphoric acid in the range of 40-60%, nitric acid in the range of 1-10%, acetic acid in the range of 5-15% and potassium oxalate in the range of 1-5%, the silver alloy being based on silver. It is made of a material and contains an electrically conductive material for alloys such as Pd, Cu, Mg, Al, Li, Pu, Np, Ce, Eu, Pr, Ca, La, Nb, Nd or Sm with an atomic percentage of less than 0.01 to 20 atomic%. In addition, the conductive material for the alloy may include one or two binary or ternary systems.

Such a wiring etchant and a manufacturing method of a wiring using the same can be applied to a manufacturing method of a thin film transistor substrate.

In the method for manufacturing a thin film transistor substrate according to the present invention, first, a gate line including a gate line and a gate electrode connected to the gate line is formed on an insulating substrate. Subsequently, the gate insulating film and the semiconductor layer are sequentially stacked, and the data includes a data line crossing the gate line, a source electrode connected to the data line, and a drain electrode positioned adjacent to the source electrode with respect to the gate electrode. Form the wiring. Next, a protective film is laminated and patterned to form a first contact hole that exposes at least the drain electrode, and a conductive film of silver or silver alloy is laminated on the protective film, and an etching solution including nitric acid, acetic acid, phosphoric acid, and potassium oxalate is used. The conductive film is patterned to form a reflective film connected to the drain electrode through the first contact hole.

In this case, the conductive film may be formed in a thickness of 1,000-3,000 kPa or 300-600 kPa, and the protective film is preferably formed of a photosensitive organic material.

The gate line may further include a gate pad configured to receive a scan signal from an external source and transmit the scan signal to a gate line. The data line may further include a data pad configured to transmit an image signal from an external source to a data line. The protective layer may include a data pad. And an auxiliary gate pad and an auxiliary data pad having second and third contact holes exposing the gate pad together with the gate insulating layer, and electrically connected to the gate pad and the data pad through the second and third contact holes in the same layer as the reflective film. Can be further formed.

Then, with reference to the accompanying drawings, a wiring etching solution according to an embodiment of the present invention, a method of manufacturing a wiring using the same and a method of manufacturing a thin film transistor array substrate for a liquid crystal display device including the same in the art. It will be described in detail so that those skilled in the art can easily carry out.

1 is a cross-sectional view showing a method of manufacturing a wiring according to an embodiment of the present invention.

As shown in FIG. 1, a wiring of a semiconductor device, particularly a display device, includes a wiring thin film including a conductive material of silver or a silver alloy having the lowest resistivity on an upper portion of the substrate 100 and an etching mask of the photoresist pattern 500. The wiring 800 is formed by patterning the wafer by using an etching process.                     

However, in order to satisfactorily pattern the wiring 800 made of silver or a silver alloy in a semiconductor manufacturing process, an etching ratio is 50 μs / sec or less, and a taper angle of a side surface is taken into account in consideration of a profile of another film formed thereafter. , θ) is 90 ° or less, and the critical dimension (2 × d) of the width of the wiring 800, which is reduced compared to the photosensitive film pattern 500, is 1.5 μm or less, and the uniformity of this tolerance is within 5%. It is preferred that no residue be left. To this end, in the manufacturing method of the wiring according to the present invention, the wiring 800 is patterned by wet etching, phosphoric acid in the range of 40-60%, nitric acid in the range of 1-10%, acetic acid in the range of 5-15% and 1-5%. The wiring 800 is patterned using an etchant for wiring containing potassium oxalate in the range and the remaining ultrapure water. When the wiring 800 is formed of a silver alloy, the target is made of silver (Ag) as a base material, and Pd, Cu, Mg, Al, Li, Pu, Np, Ce, Eu having an atomic percentage of less than 0.01 to 20 atomic%. And conductive materials for alloys such as Pr, Ca, La, Nb, Nd or Sm. In this case, one or two conductive materials for the alloy may be included so that the silver alloy may be formed of a binary or ternary alloy. In the experimental example, pure silver was laminated to a thickness of 2,000Å, and patterned using an etching solution for wiring containing phosphoric acid in a range of 50%, nitric acid in a range of 5%, acetic acid in a range of 10%, and potassium oxalate in a range of 1-3%. As a result, the etching ratio was about 40Å / sec, the taper angle (θ) was about 70-80 °, the allowable range was about 1.2-1.4㎛, and the uniformity of the allowable range was about 3-4%, respectively. Not left.

The wiring etchant and the manufacturing method of the wiring using the same according to the embodiment of the present invention can be applied to the manufacturing method of the thin film transistor array substrate used in the reflective liquid crystal display device.

First, the structure of the liquid crystal display according to the exemplary embodiment of the present invention will be described in detail with reference to FIGS. 2 and 3.

FIG. 2 is a layout view of a thin film transistor substrate for a reflective liquid crystal display according to an exemplary embodiment of the present invention, and FIG. 3 is a cross-sectional view of the thin film transistor substrate illustrated in FIG. 2 taken along a line III-III '.

On the insulating substrate 10, a gate wiring made of a single film made of silver or a silver alloy having a low resistance or an aluminum or aluminum alloy or a multilayer film including the same is formed. The gate wire is connected to the gate line 22 and the gate line 22 extending in the horizontal direction, and are connected to the gate pad 24 and the gate line 22 which receive a gate signal from the outside and transmit the gate signal to the gate line. A gate electrode 26 of the thin film transistor. In addition, the gate wiring overlaps the reflective film 82 formed later, and the gate wiring may further include a sustain electrode receiving a voltage such as a common electrode voltage input to the common electrode of the upper plate from the outside. The electrode overlaps with the reflective film 82, which will be described later, to form a storage capacitor that improves the charge storage capability of the pixel.

On the substrate 10, a gate insulating film 30 made of silicon nitride (SiN _x ) covers the gate wirings 22, 24, and 26.

A semiconductor layer 40 made of a semiconductor such as amorphous silicon is formed on the gate insulating film 30 of the gate electrode 24, and n + having a high concentration of silicide or n-type impurity is formed on the semiconductor layer 40. Resistive contact layers 55 and 56 made of a material such as hydrogenated amorphous silicon are formed, respectively.

On the resistive contact layers 55 and 56 and the gate insulating layer 30, data wirings including a conductive film made of a low resistance conductive material such as aluminum or silver are formed. The data line is formed in a vertical direction and intersects the gate line 22 to define a pixel region, and a source electrode connected to the data line 62 and the upper portion of the resistance contact layer 55 connected to the data line 62. 65, a data pad 68 connected to one end of the data line 62 and separated from the source electrode 65 to which an image signal from the outside is applied, and the source electrode 65 with respect to the gate electrode 26. And a drain electrode 66 formed over the opposite ohmic contact layer 56.

The passivation layer 70 made of an organic material having excellent planarization characteristics and photosensitivity is formed on the data lines 62, 65, 66, and 68 and the semiconductor layer 40 which is not covered. At this time, the surface of the protective film 70 has a concave-convex pattern to maximize the reflection efficiency of the reflective film 82 formed later. Here, the protective film 70 may further include an insulating film made of silicon nitride.

In the passivation layer 70, contact holes 76 and 78 are formed to expose the drain electrode 66 and the data pad 68, respectively. The contact hole 74 exposing the gate pad 24 together with the gate insulating layer 30 is formed. Is formed.

A reflective film 82 made of silver or a silver alloy is formed on the passivation layer 70 and is electrically connected to the drain electrode 66 through a contact hole 76. At this time, when the reflective film 82 is a silver alloy, silver (Ag) is used as a base material, and Pd, Cu, Mg, Al, Li, Pu, Np, Ce, Eu, and Pr having an atomic percentage of less than 0.01 to 20 atomic%. And conductive materials for alloys such as Ca, La, Nb, Nd or Sm. In this case, one or two conductive materials for the alloy may be included so that the silver alloy may be formed of a binary or ternary alloy. In addition, the auxiliary gate pad 84 and the auxiliary data pad 88, which are connected to the gate pad 24 and the data pad 68, respectively, are formed on the passivation layer 70 through the contact holes 74 and 78. Here, the auxiliary gates and data pads 84 and 88 are for protecting the gate and data pads 24 and 68, but are not essential.

Next, a method of manufacturing a thin film transistor substrate according to an exemplary embodiment of the present invention will be described in detail with reference to FIGS. 4A to 7B and FIGS. 2 and 3.

First, as shown in FIGS. 4A and 4B, a conductive material having a low resistance of silver or silver alloy or aluminum or aluminum alloy is laminated on the glass substrate 10, and patterned by a photolithography process using a mask to form a gate line. (22), the horizontal gate wiring including the gate electrode 26 and the gate pad 24 is formed.

Next, as shown in FIGS. 5A and 5B, a three-layer film of a gate insulating film 30 made of silicon nitride, a semiconductor layer 40 made of amorphous silicon, and a doped amorphous silicon layer 50 is successively laminated and a mask is formed. The semiconductor layer 40 and the ohmic contact layer 50 are formed on the gate insulating layer 30 facing the gate electrode 24 by patterning the semiconductor layer 40 and the doped amorphous silicon layer 50 by the patterning process. do.

Next, as shown in FIGS. 6A to 6B, the conductive film for data wiring is stacked, and patterned by a photolithography process using a mask to be connected to the data line 62 and the data line 62 crossing the gate line 22. The source electrode 65 and the data line 62 extending to the upper portion of the gate electrode 26 are separated from the data pad 68 and the source electrode 65 connected to one end thereof, and the center of the gate electrode 26 is centered. As a result, a data line including a drain electrode 66 facing the source electrode 65 is formed.

Subsequently, the doped amorphous silicon layer pattern 50, which is not covered by the data lines 62, 65, 66, and 68, is etched and separated on both sides of the gate electrode 26, while both doped amorphous silicon layers ( The semiconductor layer pattern 40 between 55 and 56 is exposed. Subsequently, in order to stabilize the surface of the exposed semiconductor layer 40, it is preferable to perform oxygen plasma.

Next, as shown in FIGS. 7A and 7B, the passivation layer 70 is formed by coating an organic material having excellent planarization properties and photosensitive properties on the substrate 10. Subsequently, patterning is performed together with the gate insulating film 30 in a photolithography process using a mask to form contact holes 74, 76, and 78 that expose the gate pad 24, the drain electrode 66, and the data pad 68. A concave-convex pattern is formed on the passivation layer 70.

Next, as shown in FIGS. 2 and 3, silver having reflectance is laminated to a thickness of about 1,000-3000 Å and patterned by a photolithography process using a mask to be connected to the drain electrode 66 through the contact hole 76. The auxiliary gate pad 84 and the auxiliary data pad 88, which are connected to the gate pad 24 and the data pad 68, respectively, are formed through the reflective film 82 and the contact holes 74 and 78, respectively. In this case, as described above, the etching process for patterning the reflective film 82, the auxiliary gate pad 84, and the auxiliary data pad 88 is performed by wet etching, with phosphoric acid in the range of 40-60%, 1-10%. An etchant containing nitric acid in the range, acetic acid in the range 5-15%, potassium oxalate in the range 1-5% and the remaining ultrapure water is used. Again, pure silver was laminated to a thickness of 2,000Å and patterned using an etchant for wiring containing 50% of phosphoric acid, 5% of nitric acid, 10% of acetic acid, and 1-3% of potassium oxalate. As a result, the etching ratio was about 40Å / sec, the taper angle (θ) was about 70-80 °, the allowable range was about 1.2-1.4㎛, and the uniformity of the allowable range was about 3-4%, respectively. Not left.

Here, in the case where the reflective film 82 of silver or silver alloy is formed in the range of about 300-600 Hz, the reflective film 82 has both a reflectance and a transmittance together to display an image using both a reflective mode and a transmissive mode. It can be applied to a transmissive liquid crystal display device.

As described above, in the present invention, a thin film having a good etching ratio, taper angle, and uniformity can be obtained by patterning a conductive film of silver or a silver alloy using an etching solution containing phosphoric acid, nitric acid, acetic acid, potassium oxalate, and the remaining ultrapure water. A reflective film having low resistance and high reflectance can be obtained.

Claims (12)

Wiring etchant comprising nitric acid, acetic acid, phosphoric acid and potassium oxalate. In claim 1, The wiring etchant comprises 40% to 60% phosphoric acid, 1% to 10% nitric acid, 5% to 15% acetic acid, 1% to 5% potassium oxysulfate, and the remaining ultrapure water with respect to the total content of the wiring etching solution. In claim 1, The wiring etching solution is a wiring etching solution for etching a conductive film containing silver or silver alloy. Laminating a conductive film containing silver or silver alloy, and Patterning the conductive film using an etching solution for wiring including phosphoric acid, nitric acid, acetic acid, and potassium oxalate Method for producing a wiring comprising a. In claim 4, The wiring etchant includes 40% to 60% phosphoric acid, 1% to 10% nitric acid, 5% to 15% acetic acid, 1% to 5% potassium oxalate, and the remaining ultrapure water relative to the total content of the wiring etching solution. Way. In claim 4, The said conductive film is a manufacturing method of the wiring formed from silver. Forming a gate line including a gate line and a gate electrode connected to the gate line on the insulating substrate; Stacking a gate insulating film on the gate wiring; Forming a semiconductor layer on the gate insulating film, Forming a data line on the semiconductor layer, the data line including a data line crossing the gate line, a source electrode connected to the data line, and a drain electrode adjacent to the gate electrode and positioned opposite to the source electrode with respect to the gate electrode; Steps, Stacking a protective film on the data line and the gate insulating film; Patterning the passivation layer to form a first contact hole exposing at least the drain electrode, and Forming a pixel electrode connected to the drain electrode through the first contact hole on the passivation layer Including, At least one of forming the gate wiring, forming the data wiring, and forming the pixel electrode may include Laminating a conductive film containing silver or silver alloy, and Patterning the conductive film using an etchant including phosphoric acid, nitric acid, acetic acid, and potassium oxalate Method of manufacturing a thin film transistor array substrate comprising a. In claim 7, The etchant comprises 40% to 60% of phosphoric acid, 1% to 10% of nitric acid, 5% to 15% of acetic acid, 1% to 5% of potassium oxysulfate, and the remaining ultrapure water with respect to the total content of the etching solution. Manufacturing method. In claim 7, And the conductive film is formed of silver. In claim 9, The conductive film is a method of manufacturing a thin film transistor array substrate to form a thickness of 1,000 to 3,000 Å or 300 Å to 600 Å. In claim 7, The protective film is a method of manufacturing a thin film transistor substrate formed of a photosensitive organic material. In claim 7, The gate line further includes a gate pad configured to receive a scan signal from an external device and deliver the scan signal to the gate line, The data line further includes a data pad which transfers an image signal from an external source to the data line. The passivation layer has second and third contact holes exposing the gate pad together with the data pad and the gate insulating layer. And forming an auxiliary gate pad and an auxiliary data pad electrically connected to the gate pad and the data pad through the second and third contact holes in the same layer as the reflective layer.

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