KR100819685B1 - Manufacturing method of semiconductor device - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, wherein a capping insulating film, a metal layer, and a diffusion barrier film are first patterned in a metal gate electrode forming process, an insulating film spacer is formed on the sidewalls, and a polysilicon layer positioned below the pattern is formed. Next, a selective oxidation process is performed to prevent the metal layer and the diffusion barrier from being oxidized, and an oxide film having a desired thickness is formed on the polysilicon layer and the semiconductor substrate to prevent the gate resistance from increasing, and the operation characteristics and reliability of the device are improved. Is a technique to improve.

Description

Manufacturing method of semiconductor device

1A and 1B are cross-sectional views illustrating a method of manufacturing a semiconductor device according to the prior art.

2A to 2D are cross-sectional views illustrating a method of manufacturing a semiconductor device in accordance with the present invention.

<Description of Symbols for Major Parts of Drawings>

11, 31: silicon substrate 13, 33: gate insulating film

15, 36: polysilicon layer pattern 17, 38: diffusion barrier pattern

19, 40: metal layer pattern 21, 42: capping insulating film pattern

23, 47: oxide film 25, 45: insulating film spacer

35 polysilicon layer 37 diffusion barrier film

39: metal layer 41: capping insulating film

43: photosensitive film

The present invention relates to a method for manufacturing a semiconductor device, and more particularly, to a method for manufacturing a semiconductor device that performs a selective oxidation step so that the metal is not oxidized in the metal gate electrode forming step.

As semiconductor devices become more integrated, the gate electrode of a metal oxide semiconductor field effect transistor (hereinafter referred to as a MOS FET) is decreasing in width, but when the width of the gate electrode is reduced by N times, the electrical resistance of the gate electrode is decreased. There is a problem that the N times increased to decrease the operation speed of the semiconductor device. Therefore, in order to reduce the resistance of the gate electrode, polyside, which is a laminated structure of the polysilicon layer and the silicide, is used as the low resistance gate electrode by using the characteristics of the polysilicon layer / oxide layer interface that exhibit the most stable MOSFET characteristics.

In general, the most important function of the transistors constituting the semiconductor circuit is current driving capability, and the channel width of the MOSFET is adjusted in consideration of this. The most widely used MOSFET uses a polysilicon layer doped with impurities as a gate electrode, and a diffusion region doped with impurities on a semiconductor substrate is used as a source / drain region. Here, the sheet resistance of the gate electrode is about 30 to 70 Ω / □, the sheet resistance of the source / drain region is about 70 to 150 Ω / □ for N +, about 100 to 250 Ω / □ for P +, and the gate electrode or source / In the case of a contact formed on the drain region, the contact resistance is about 30 to 70? /? Per contact.

In order to reduce the high sheet resistance and contact resistance of the gate electrode and the source / drain regions, a salicide (self-aligned silicide) method or a selective metal film deposition method may be used between the metal silicide only on the gate electrode and the source / drain regions. A film was formed to increase the current driving capability of the MOSFET. Among these silicides, gate electrodes using TiSi ₂ , CoSi ₂ , and tungsten layers have the lowest resistance, relatively excellent thermal stability, and easy manufacturing methods, and are the most popular.

However, the TiSi ₂ and CoSi ₂ show a low resistance of 18 μΩ · cm or less, but show many disadvantages due to the thermal process. That is, the gate electrode using TiSi ₂ has a problem in that film agglomeration occurs at a narrow line width, and the gate electrode using CoSi ₂ has a high possibility of changing the characteristics of the transistor due to the high diffusion of Co.

As a result, the tungsten layer having high thermal stability has been actively applied to gate materials of devices having a technology of 0.13 or less.

Hereinafter, a method of manufacturing a semiconductor device according to the prior art will be described with reference to the accompanying drawings.

1A and 1B are cross-sectional views illustrating a method of manufacturing a semiconductor device according to the prior art.

First, a gate insulating layer 13 is formed on the silicon substrate 11. In this case, the gate insulating film 13 is formed by a thermal oxidation process.

Next, a stacked structure of a polysilicon layer (not shown), a diffusion barrier layer (not shown), a metal layer (not shown), and a capping insulating layer (not shown) are formed on the gate insulating layer 13. At this time, the diffusion barrier is formed of a TiN layer or WN layer, the metal layer is formed of tungsten (W), tantalum (Ta), titanium (Ti), molybdenum (Mo), cobalt (Co) or its silicide material The capping insulating film is formed of a nitride film.

Next, the layered structure is etched by using a photoresist pattern that protects a portion intended as a gate electrode using an etch mask, thereby capping insulation pattern 21, metal layer pattern 19, diffusion barrier pattern 17, and polysilicon layer pattern 15. ).

Thereafter, the structure is selectively oxidized to form an optional oxide film 23 on the sidewalls of the polysilicon layer pattern 15 and the silicon substrate 11. In this case, the selective oxidation process is carried out using a H ₂ / O ₂ mixed gas or H ₂ / H ₂ O mixed gas in the furnace (furnace). (See Figure 1A)

Next, a nitride film (not shown) having a predetermined thickness is formed on the entire surface, and the nitride film is entirely etched to form the capping insulation pattern 21, the metal layer pattern 19, the diffusion barrier pattern 17, and the polysilicon layer pattern. The insulating film spacers 25 are formed on the sidewalls of the part 15. At this time, the insulating film spacer 25 is formed of a nitride film. (See FIG. 1B)

As described above, in the method of manufacturing a semiconductor device according to the related art, a gate electrode is formed by performing a selective oxidation process using H ₂ / O ₂ mixed gas or H ₂ / H ₂ O mixed gas in a furnace after forming the gate electrode. An oxide film was selectively formed on the polysilicon layer pattern and the silicon substrate.

However, when the selective oxidation process time is increased to form an oxide film having a desired thickness on the polysilicon layer pattern and the silicon substrate ⓐ, an abnormal reaction occurs by the oxidizing gas, thereby forming a metal layer pattern and a diffusion barrier pattern. And the phenomenon that the resistance value increases at the interface of the polysilicon layer pattern occurs.

Due to the above phenomenon, since it is difficult to form a sufficient thickness in part ⓐ of FIG. 1A, the gate-induced drain leakage (GIDL) current flowing to the gate electrode is increased to increase the off current of the MOSFET characteristic, which is a DRAM. In the case of the cell transistor, there is a problem in that the yield is lowered by lowering the refresh characteristics.

The present invention, in order to solve the above problems of the prior art, patterning the capping nitride film, the metal layer and the diffusion barrier film during the gate electrode patterning, forming a nitride film spacer on the sidewalls, patterning the polysilicon layer, and then performing a selective oxidation process It is an object of the present invention to provide a method for manufacturing a semiconductor device which improves the electrical properties and yield of the device since the selective oxide film having a desired thickness can be formed without causing an abnormal reaction at the interface between the metal layer, the diffusion barrier film, and the polycrystalline silicon layer.

Method for manufacturing a semiconductor device according to the present invention for achieving the above object,

Sequentially forming a gate insulating film, a conductive layer, a diffusion barrier film, a metal layer, and a capping insulating film on the silicon substrate;

The capping insulating layer, the metal layer, and the diffusion barrier layer are etched by a photolithography process using a gate electrode mask to form a stacked structure of the capping insulating layer pattern, the metal layer pattern, and the capping insulating layer pattern, and proceed with transient etching to remove the conductive layer having a predetermined thickness. Fair,                     

Forming an insulating film spacer on sidewalls of the laminated structure;

Forming a conductive layer pattern by etching the conductive layer using the capping insulating layer pattern and the insulating layer spacer as an etch mask;

Selectively oxidizing the silicon substrate on the sidewall of the conductive layer pattern and the lower portion of the gate insulating film to form an oxide film;

The gate insulating film is formed to a thickness of 25 ~ 100Å,

The conductive layer is formed of a polycrystalline silicon layer or polycrystalline germanium silicon (poly-Si _x Ge _1-x , 0 <x <1),

The conductive layer is formed to a thickness of 300 ~ 1000Å,

The diffusion barrier is formed to a thickness of 20 ~ 100Å,

The diffusion barrier is formed of a TiN film or WN film,

The metal layer is formed to a thickness of 50 ~ 150Å,

The metal layer is formed using one selected arbitrarily from the group consisting of tungsten (W), tantalum (Ta), titanium (Ti), molybdenum (Mo), cobalt (Co), and silicide materials thereof,

The capping insulating film is formed of a nitride film,

The capping insulating film is formed to a thickness of 500 ~ 4000Å,

The insulating film spacer is formed of a nitride film, an oxynitride film or an oxide film,                     

The insulating film spacer is formed to a thickness of 30 ~ 200Å,

The oxide film is characterized in that it comprises a 10 to 100 ∼ thickness.

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

2A through 2D are cross-sectional views illustrating a method of manufacturing a semiconductor device in accordance with the present invention.

First, a gate insulating film 33, a polysilicon layer 35, a diffusion barrier 37, a metal layer 39, and a capping insulating layer 41 are sequentially formed on the silicon substrate 31.

At this time, the gate insulating film 33 is formed by an oxide film having a thickness of 25 to 100 kPa by thermally oxidizing the surface of the silicon substrate 31, and the polysilicon layer 35 is formed to be 300 to 1000 kPa thick. Here, instead of the polysilicon layer 35, polycrystalline germanium silicon (poly-Si _x Ge _1-x , 0 <x <1) may be used.

The diffusion barrier 37 is formed of a TiN film or a WN film having a thickness of 20 to 100 GPa, and the metal layer 39 includes tungsten (W), tantalum (Ta), titanium (Ti), molybdenum (Mo), and cobalt. (Co), WSi _x , TaSi _x TiSi _x , MoSi _x or CoSi _x is formed to a thickness of 50 to 150 GPa.

In addition, the capping insulating film 41 is formed of a nitride film having a thickness of 500 to 4000 GPa.

Next, a photosensitive film 43 is coated on the capping insulating film 41. (See Figure 2A)                     

Next, the capping insulation layer 41, the metal layer 39, and the diffusion barrier layer 37 are etched by a photolithography process using a gate electrode mask that protects a portion intended as a gate electrode. The capping insulation layer pattern 42 and the metal layer pattern are then etched. A stacked structure of the 40 and the diffusion barrier pattern 38 is formed. Here, the etching process is performed by the transient etching process so that the polysilicon layer 35 having a predetermined thickness is also etched. (See Figure 2b)

Next, an insulating film (not shown) having a predetermined thickness is deposited on the entire surface, and the insulating film is etched entirely to form insulating film spacers 45 on sidewalls of the stacked structure. In this case, the insulating film spacer 45 is formed of a nitride film, an oxynitride film, or an oxide film, and the insulating film spacer 45 is formed to have a thickness of 30 to 200 Å.

Here, the insulating layer spacer 45 is formed up to the sidewall of the polysilicon layer 35, which has been removed by a predetermined thickness in a previous process, so that it is abnormal at the interface between the diffusion barrier pattern 38 and the polysilicon layer 35 in a subsequent selective oxidation process. Prevent the reaction from occurring.

Next, the polysilicon layer is etched using the capping insulating layer pattern 42 and the insulating layer spacer 45 as an etch mask to form the polysilicon layer pattern 36. (See Figure 2c)

Next, the capping insulating layer pattern 42 and the insulating layer spacer 45 are oxidized to selectively oxidize the sidewalls of the polysilicon layer pattern 36 and the semiconductor substrate 31 under the gate insulating layer 33. An oxide film 47 is formed. At this time, the selective oxidation process is carried out using a H ₂ / O ₂ mixed gas or H ₂ / H ₂ O mixed gas in the furnace, the oxide film 47 is formed to a thickness of 10 ~ 100Å. (See FIG. 2D)

As described above, in the method of manufacturing a semiconductor device according to the present invention, the capping insulating layer, the metal layer, and the diffusion barrier layer are first patterned in the metal gate electrode forming step, the insulating layer spacer is formed on the sidewalls, and then the polysilicon is disposed below the polycrystalline silicon. After patterning the layer, a selective oxidation process is performed to prevent the metal layer and the diffusion barrier from being oxidized, and an oxide film having a desired thickness is formed on the polysilicon layer and the semiconductor substrate to prevent an increase in gate resistance, and There is an advantage of improving operating characteristics and reliability.

Claims (13)

Sequentially forming a gate insulating film, a conductive layer, a diffusion barrier film, a metal layer, and a capping insulating film on the silicon substrate; The capping insulating layer, the metal layer, and the diffusion barrier layer are etched by a photolithography process using a gate electrode mask to form a stacked structure of the capping insulating layer pattern, the metal layer pattern, and the capping insulating layer pattern, and proceed with transient etching to remove the conductive layer having a predetermined thickness. Fair, Forming an insulating film spacer on sidewalls of the laminated structure; Forming a conductive layer pattern by etching the conductive layer using the capping insulating layer pattern and the insulating layer spacer as an etch mask; And selectively oxidizing the silicon substrate under the sidewall of the conductive layer pattern and the lower portion of the gate insulating film to form an oxide film. The method of claim 1, The gate insulating film is a semiconductor device manufacturing method, characterized in that formed in a thickness of 25 ~ 100 ∼. The method of claim 1, The conductive layer is a method of manufacturing a semiconductor device, characterized in that formed of a polycrystalline silicon layer or polycrystalline germanium silicon (poly-Si _x Ge _1-x , 0 <x <1). The method of claim 1, The conductive layer is a manufacturing method of a semiconductor device, characterized in that formed to a thickness of 300 ~ 1000Å. The method of claim 1, The diffusion barrier is a manufacturing method of a semiconductor device, characterized in that formed in 20 ~ 100Å thickness. The method of claim 1, The diffusion barrier is a manufacturing method of a semiconductor device, characterized in that formed of a TiN film or WN film. The method of claim 1, The metal layer is a method of manufacturing a semiconductor device, characterized in that formed in 50 ~ 150 50 thickness. The method of claim 1, The metal layer is formed by using one selected from the group consisting of tungsten (W), tantalum (Ta), titanium (Ti), molybdenum (Mo), cobalt (Co) and the silicide material thereof. Manufacturing method. The method of claim 1, And the capping insulating film is formed of a nitride film. The method of claim 1, The capping insulating film is a manufacturing method of a semiconductor device, characterized in that formed to a thickness of 500 ~ 4000Å. The method of claim 1, And the insulating film spacer is formed of a nitride film, an oxynitride film, or an oxide film. The method of claim 1, The insulating film spacer is a semiconductor device manufacturing method, characterized in that formed to a thickness of 30 ~ 200 ∼. The method of claim 1, The oxide film is a manufacturing method of a semiconductor device, characterized in that formed in a thickness of 10 ~ 100Å.

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