KR100807562B1 - A thin film transistor and a flat panel device including the same - Google Patents

Abstract

A thin film transistor and a flat display device having the same are provided to prevent a peeling phenomenon due to a difference between thermal expansion coefficients of a substrate and a buffer layer. An adhesion reinforcing layer(105) is formed on one surface of a substrate(100), and an intermediate buffer layer(110) is formed on the adhesion reinforcing layer. A semiconductor layer(125) is formed on the buffer layer, and a gate electrode(135) is interposed between the semiconductor layer and the gate electrode. Source/drain electrodes(135a,135b) are formed on the gate insulation layer. The intermediate buffer layer and the buffer layer are made of SiO2. A passivation(120) is formed on the other surface of the substrate.

Description

A thin film transistor and a flat panel device including the same

1 is a diagram illustrating a phenomenon in which a substrate is bent due to a difference in thermal expansion coefficient between the substrate and the buffer film.

FIG. 2A is a diagram showing that the substrate is bent when SiO ₂ is deposited on one surface of the substrate at 330 ° C. FIG.

FIG. 2B illustrates a substrate having a flat structure when SiO ₂ is deposited at 200 ° C. on one surface of the substrate.

3A to 3C are diagrams illustrating a manufacturing process of a substrate as an embodiment of the present invention.

4A to 4C are cross-sectional views illustrating a manufacturing process of a thin film transistor using a substrate as an embodiment of the present invention.

<Explanation of symbols for the main parts of the drawings>

100 substrate 115 buffer film

105: adhesion strengthening film 120: antioxidant film

110: intermediate buffer film 125: semiconductor layer

130: gate insulating film 135: gate electrode

135a, 135b: source and drain electrodes

140: interlayer insulating film 150: insulating layer

160: pixel electrode 170: pixel defining layer

180 light emitting layer 190 counter electrode

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thin film transistor, a method for manufacturing the same, and a flat panel display device including the thin film transistor, and more particularly, to a thin film transistor including a pressure-sensitive adhesive film, an intermediate buffer film, and a buffer film on a substrate, and a method of manufacturing the same and a thin film transistor. It relates to a flat panel display device comprising a.

In general, a flat panel display device is divided into a passive matrix method and an active matrix method according to a driving method, and the active driving method includes circuits using thin film transistors (TFTs). Such circuits are typically used in flat panel displays such as liquid crystal displays (LCDs) and organic electroluminescence displays (OLEDs).

The flat panel display devices are required to be thin, light, and not breakable. In order to manufacture a thin and light, there is a method of using a thin glass substrate in the manufacturing, but this has a problem in that the handling is difficult in the manufacturing process, accurate alignment is difficult and weak to the external impact. In order to solve this problem, a method of manufacturing a glass substrate using a conventional glass substrate and then thinning it by a mechanical or chemical method has been introduced. However, such a process is not only complicated but also very weak to external shocks, and thus has a problem in that practical use is difficult.

Due to the above problems of the glass substrate, a method of using a plastic substrate which has better flexible characteristics than the glass substrate but is not easily damaged by an external impact has been introduced. However, the plastic substrate has a problem that the heat resistance is weak, so that a high temperature process such as manufacturing a polysilicon thin film transistor and other vapor deposition cannot be performed.

In order to solve these problems, it is proposed to use the metal substrate 100 excellent in heat resistance and flexible properties.

1 is a diagram illustrating a phenomenon in which a substrate is bent due to a difference in thermal expansion coefficient between the substrate and the buffer film. Referring to FIG. 1, after the buffer film 115 is provided on the metal substrate 100, when the substrate 100 provided with the buffer film 115 undergoes a high temperature process, the substrate and the upper portion of the substrate 100 may be formed. The deformation occurs due to the difference in the coefficient of thermal expansion between the layers. That is, since the thermal expansion coefficient of the metal substrate 100 is larger than the thermal expansion coefficient of the buffer film 115 thereon, the substrate is convexly curved in the direction of the buffer film 115.

Therefore, the adhesion between the substrate 100 and the buffer film 115 is poor, and the peeling phenomenon occurs in which the buffer film is separated in the film forming and the ultrasonic cleaning processes, which are processes for manufacturing the thin film transistor. From these phenomena, there is also a problem that short-circuit defects occur between the substrate and the gate electrode or between the gate electrode and the source and drain electrodes.

In addition, the buffer film is formed at a low temperature in order to prevent thermal stress applied to the substrate due to the difference in the thermal expansion coefficient, which causes a problem that the insulation of the buffer film is degraded. In addition, the other surface of the substrate on which the buffer film is not formed has a problem of being oxidized in the air or being contaminated by chemicals during the process.

SUMMARY OF THE INVENTION The present invention has been made to solve various problems including the above problems, and an object of the present invention is to provide a thin film transistor using a substrate to which an adhesion strengthening film, an intermediate buffer film, and a buffer film are applied.

In addition, another object of the present invention is to form an anti-oxidation film on the other surface of the substrate, a thin film transistor having a substrate with an anti-oxidation film to prevent oxidation by outside air and contamination by chemicals, a manufacturing method thereof and a flat plate comprising the same It is to provide a display element.

The object of the present invention is a substrate; An adhesion reinforcing film provided on one surface of the substrate; An intermediate buffer film provided on the adhesion reinforcing film; A buffer film provided on the intermediate buffer film; A semiconductor layer provided on the buffer film; A gate electrode located above or below the semiconductor layer; A gate insulating layer disposed between the semiconductor layer and the gate electrode; A thin film transistor comprising a source / drain electrode located on the gate insulating film is achieved.

That is, the gate electrode may be located above or below the semiconductor layer, and a gate insulating film is present between the gate electrode and the semiconductor layer.

An antioxidant film may be provided on the other surface of the substrate.

In addition, the present invention provides a flat panel display using the thin film transistor in order to achieve the above object. The flat panel display may be an organic light emitting display or a liquid crystal display.

In addition, to achieve the above object to form an adhesion strengthening film on one surface of the substrate; Forming an intermediate buffer film on the adhesion reinforcing film; Forming a buffer film on the intermediate buffer film; Forming a semiconductor layer on the buffer film; Forming a gate electrode on the semiconductor layer; It is achieved by a method of manufacturing a thin film transistor which forms a source / drain electrode on the gate electrode.

Details of the above object and technical configuration of the present invention and the effects thereof according to the present invention will be more clearly understood by the following detailed description with reference to the drawings showing preferred embodiments of the present invention.

2A and 2B are diagrams showing the state of a substrate after depositing a buffer film on the substrate.

The substrate 100 is generally made of a metal substrate, and the material generally used is stainless steel 304 (hereinafter SS304). In order to prevent deterioration of the characteristics of the thin film transistor due to the conductivity of the substrate, the buffer film 115 is deposited. The thin film transistor provided on the buffer layer 115 controls a signal between the source electrode and the drain electrode according to a signal applied to the gate electrode. To this end, a buffer layer 115 is deposited to prevent impurity penetration from the outside into the semiconductor layer where a channel between the source electrode and the drain region is formed. Generally, the buffer film is composed of silicon oxide or silicon nitride.

The metal substrate SS304 has a coefficient of thermal expansion of 17.3 ppm / 占 폚, and the buffer film made of SiO ₂ has a coefficient of thermal expansion of 0.94 ppm / 占 폚, and the metal substrate has a coefficient of thermal expansion about 18 times or more larger than that of the buffer film.

Referring to FIG. 2A, when the buffer film 115 made of silicon oxide is deposited on a substrate 100 that is not annealed at a temperature of 330 ° C., the substrate 100 receives a compressive stress of −430 MPa to −350 MPa. The substrate 100 and the buffer film 115 are convexly curved upward. In the above embodiment, the substrate 100 on which silicon oxide is not deposited has a curvature value of 1 / R of 0.4311 m ⁻¹ and 1 / R = 0.8 m after the process of depositing the buffer film 115. ^{It has a} value of ^-1 , and after deposition, it can be seen that the substrate 100 on which the buffer film 115 is deposited is severely bent. Here, 1 / R is a curvature value and the degree of curvature of the substrate can be compared.

Referring to FIG. 2B, when the buffer film 115 is deposited on the substrate 100 annealed at a temperature of 200 ° C., the substrate 100 has a compressive stress of −10 MPa to 10 MPa. In the above embodiment, a silicon oxide substrate 100 is not deposited is 1 / R = 0.002m ^- a 1 / R ¹ has a value less than or equal to, after the step of depositing the buffer film (115) 0.002m ^- less than ¹ It can be seen that the substrate on which the buffer film 115 is deposited is less curved at a lower temperature.

Therefore, when the buffer film 115 is deposited at a temperature of 330 ° C., the compressive stress applied to the substrate 100 is greater due to a difference in thermal expansion coefficient than when the buffer film 115 is deposited at a relatively low temperature of 200 ° C. The bending of the substrate 100 and the buffer film 115 occurs more seriously.

3A to 3C are views illustrating a manufacturing process of a substrate according to an embodiment of the present invention.

Referring to FIG. 3A, in the process of manufacturing a substrate, an adhesion reinforcing film 105 is positioned on one surface of the substrate 100, and an intermediate buffer layer 110 is positioned on the adhesion reinforcing film 105.

Since the SS304 substrate 100 may have a peeling phenomenon due to a difference in thermal expansion coefficient between the buffer film and the metal substrate, in order to prevent the peeling phenomenon between the layers and to enhance the adhesiveness, the SS304 substrate 100 may be formed. Form.

The adhesion reinforcing film 105 is made of any one material selected from amorphous silicon (a-Si), amorphous silicon nitride (a-SiN _x ) and molybdenum tungsten alloy (MoW), the temperature of 350 ℃ to 450 ℃ It is preferable to form a thickness of 300Å to 600Å at.

When the pressure-sensitive adhesive film 105 is formed to a thickness of less than 300 kPa at a temperature of less than 350 ℃, the density of the film is lowered, the adhesion effect is reduced due to the thickness of the film is reduced. However, when the pressure-sensitive adhesive film 105 is formed thicker than 600 kPa at a temperature higher than 450 ° C., the density of the film is increased and the substrate is bent due to the increase in the thickness of the film.

When the pressure-sensitive adhesive film is made of amorphous silicon, it is preferable to form by chemical vapor deposition (CVD). The chemical vapor deposition method may use one method selected from the group consisting of low pressure chemical vapor deposition (LPCVD), atmospheric pressure chemical vapor deposition (APCVD) and plasma chemical vapor deposition (PECVD).

When the adhesion strengthening film 105 is formed of amorphous silicon nitride, it is preferable to form the plasma chemical vapor deposition method (PECVD) of chemical vapor deposition (CVD).

When the pressure-sensitive adhesive film 105 is made of molybdenum tungsten alloy (MoW) is preferably formed by a sputtering method.

In this case, the specific resistance of the pressure-sensitive adhesive film 105 is 10 ⁸ to 10 ⁹ Ωcm.

The intermediate buffer layer 110 is positioned on the adhesion reinforcing layer 105. The intermediate buffer layer 110 is made of silicon oxide, and preferably formed at a thickness of 300 kPa to 600 kPa at a temperature of 400 ° C to 300 ° C.

When the intermediate buffer film 110 is formed to a thickness of less than 300 kPa at less than 300 ℃, the density of the film is lowered, the thickness of the film is reduced and the insulation effect is reduced. That is, the specific resistance value drops. However, when the intermediate buffer film 110 is formed thicker than 600 kPa at a temperature exceeding 400 ° C., the density of the film increases and the thickness of the film increases, causing the substrate 100 to bend.

The silicon oxide is preferably formed by chemical vapor deposition (CVD), specifically, plasma chemical vapor deposition (PECVD).

The intermediate buffer layer 110 is formed by forming the buffer layer 115 at a low temperature, thereby forming the intermediate buffer layer 110 having high insulation to prevent the insulation from deteriorating. The resistivity of the intermediate buffer layer 110 is 10 ¹⁴ Ωcm or more, and has a high insulating property, thereby effectively blocking the electrical conductivity between the metal substrate 100 and the thin film transistor.

Referring to FIG. 3B, a buffer layer 115 is positioned on the intermediate buffer layer 110.

The buffer layer 115 disposed on the intermediate buffer layer 110 serves to insulate the substrate and prevent impurities from the outside from penetrating into the semiconductor layer in which a channel between the source electrode and the drain electrode is formed. do. The buffer film 115 is made of silicon oxide, and preferably formed at a thickness of 8000 Pa to 12000 Pa at 150 ° C to 250 ° C.

When the buffer film 115 is formed to a thickness of less than 8000 kPa at a temperature of less than 150 ℃, the density of the film is reduced, the thickness is reduced, the effect of the buffer to prevent impurities from penetrating from the outside to the semiconductor layer is inferior .

However, when the buffer film 115 is formed thicker than 12000 kPa at a temperature higher than 250 ° C., the density of the film increases, and the stress on the substrate increases due to the increase in thickness, thereby causing the substrate to bend. In addition, the process time increases due to the increase in the thickness of the buffer layer 120.

The silicon oxide is preferably formed by chemical vapor deposition (CVD), specifically, plasma chemical vapor deposition (PECVD). The resistance of the buffer film 115 is lower than the resistivity of the intermediate buffer film 110, which is 10 ¹⁴ μmcm.

Referring to FIG. 3C, after the adhesion reinforcing film 105, the intermediate buffer film 110, and the buffer film 115 are provided on one surface of the substrate 100, the anti-oxidation film 120 is formed on the other surface of the substrate 100. ) Is located.

The anti-oxidation film 120 prevents the metal substrate 100 from being oxidized from the outside air and protects the substrate 100 from chemical contaminants during the thin film transistor manufacturing process.

The anti-oxidation film 120 is made of silicon oxide, it is preferable to form a thickness of 300 kPa to 600 kPa within a temperature of 300 ℃ to 400 ℃.

When the antioxidant film 120 is formed to a thickness of less than 300 kPa at a temperature of less than 300 ℃, the effect of oxidation, pollution prevention is reduced due to the decrease in density and thickness of the film.

However, when the anti-oxidation film 120 is formed thicker than 600 kPa at a temperature higher than 400 ° C., the density of the film increases and the thickness increases, so that the stress on the substrate increases, causing the substrate to bend. .

The silicon oxide is preferably formed by chemical vapor deposition (CVD), specifically, plasma chemical vapor deposition (PECVD).

4A to 4C are cross-sectional views illustrating a process of manufacturing a thin film transistor as an embodiment of the present invention.

Referring to FIG. 4A, the substrate to which the thin film transistor is applied is a substrate formed in FIG. 3C, and includes an adhesion reinforcing film 105, an intermediate buffer film 110, and a buffer film 115 on one surface of the metal substrate 100. The other surface of the substrate 100 is a substrate including an antioxidant film 120.

The semiconductor layer 125 is formed by patterning a crystalline silicon film on the substrate. In addition, the semiconductor layer 125 may be formed by forming an amorphous silicon film and performing crystallization after patterning the amorphous silicon film.

Referring to FIG. 4B, a gate insulating layer 130 is formed over the entire surface of the semiconductor layer 125. The gate insulating layer 130 may be formed using a conventional material, for example, silicon oxide (SiO 2) or silicon nitride (SiN x).

A gate electrode 135 is formed on the gate insulating layer 130. The gate electrode 135 may be formed by forming a film using a conductive film and then patterning the film. The conductive film may be performed using one material selected from the group consisting of a metal film, a crystalline silicon film, and a transparent conductive film. Although the gate insulating layer 130, the gate electrode 135, and the source drain electrodes 135a and 135b are disposed on the semiconductor layer 125, the gate insulating layer and the gate electrode are disposed below the semiconductor layer 125. The source drain electrode may be positioned on the gate insulating layer.

After the gate electrode 135 is formed, ions are implanted into the semiconductor layer 125 using the gate electrode 135 as a mask. Due to the ion implantation, a source region and a drain region are formed in the semiconductor layer 125. As a result, the semiconductor layer 125 includes a source region, a drain region, and a channel region.

An interlayer insulating layer 140 is formed on the substrate on which the gate electrode 135 is formed. The interlayer insulating layer 140 may be formed using a conventional insulating material, for example, silicon oxide (SiO 2) or silicon nitride (SiN x).

A contact hole is formed in the interlayer insulating layer 140 to expose source and drain regions of the semiconductor layer 125, respectively. A conductive film is stacked and patterned on the interlayer insulating layer 140 to form a source electrode 135a and a drain electrode 135b that are in contact with the exposed source and drain regions, respectively. The conductive film may be performed using one material selected from the group consisting of a metal film, a crystalline silicon film, and a transparent conductive film.

In addition, a gate electrode is provided on a substrate including the adhesion reinforcement film 105, the intermediate buffer film 110, the buffer film 115, and the anti-oxidation film 120, and a gate insulating film is provided on the gate electrode. A thin film transistor including a semiconductor layer on the gate insulating layer and a source / drain electrode may be formed on the semiconductor layer.

Referring to FIG. 4C, when the thin film transistor of the present invention is used in a flat panel display device, one of the source electrode 135a or the drain electrode 135b may be selected to connect the pixel electrode 160.

After forming the insulating layer 150 on the substrate on which the layers are formed, and forming a via hole in the insulating layer 150, the pixel electrode 160 is formed. Thus, the lower source electrode 135a or drain electrode 135b and the pixel electrode 160 are in contact with each other.

An insulating layer is formed on the pixel electrode 160. The insulating layer is patterned along the pixel opening region to form the pixel defining layer PDL 170. Therefore, the pixel electrode 160 is exposed under the pixel opening region.

A light emitting layer 180 is formed on the exposed pixel electrode 160, and a counter electrode 190 is formed on the light emitting layer 180 to form a flat panel display device. The flat panel display may be an organic light emitting display or a liquid crystal display.

When the flat panel display is an organic electroluminescent display, one or more organic layers selected from the group consisting of a hole injection layer, a hole transport layer, a hole suppression layer, and an electron injection layer are further formed on or below the light emitting layer 180. can do. In addition, the counter electrode 190 may be an anode or a cathode of the organic light emitting display, and together with the pixel electrode 160, serves as an electrode of the organic light emitting diode.

Although described above with reference to a preferred embodiment of the present invention, those skilled in the art will be variously modified and changed within the scope of the invention without departing from the spirit and scope of the invention described in the claims below I can understand that you can.

The present invention prevents the phenomenon of peeling due to the difference in the coefficient of thermal expansion between the substrate and the buffer film by forming the adhesion strengthening film on the substrate.

Further, an intermediate buffer film is formed between the adhesion reinforcing film and the buffer film to improve the problem of insulation deterioration caused by film formation at low temperature in order to produce a buffer film without thermal stress.

In addition, by forming an anti-oxidation film on the opposite side where an adhesion-strength film, an intermediate buffer film and a buffer film are formed on the substrate, the substrate may be oxidized by outside air or contaminated by chemicals or the like during the manufacturing process of the thin film transistor. It is effective to protect.

Claims (11)

Board; An adhesion reinforcing film provided on one surface of the substrate; An intermediate buffer film provided on the adhesion reinforcing film; A buffer film provided on the intermediate buffer film; A semiconductor layer provided on the buffer film; A gate electrode located above or below the semiconductor layer; A gate insulating layer disposed between the semiconductor layer and the gate electrode; And a source / drain electrode positioned on the gate insulating layer. The thin film according to claim 1, wherein the adhesion strengthening film is made of any one material selected from the group consisting of amorphous silicon (a-Si), amorphous silicon nitride (a-SiNx), and molybdenum tungsten alloy (MoW). transistor. The thin film transistor of claim 1, wherein the intermediate buffer layer is made of silicon oxide (SiO ₂ ). The thin film transistor of claim 1, wherein the buffer layer is made of silicon oxide (SiO ₂ ). The thin film transistor of claim 1, further comprising an anti-oxidation film on the other surface of the substrate. The thin film transistor of claim 5, wherein the anti-oxidation layer is made of silicon oxide (SiO ₂ ). Forming an adhesion strengthening film on one surface of the substrate; Forming an intermediate buffer film on the adhesion reinforcing film; Forming a buffer film on the intermediate buffer film; Forming a semiconductor layer on the buffer film; Forming a gate electrode on the semiconductor layer; And forming a source / drain electrode on the gate electrode. The method of claim 7, wherein the pressure-sensitive adhesive film is made of any one selected from amorphous silicon film (a-Si), amorphous silicon nitride (a-SiNx) and MoW, characterized in that formed at a temperature of 350 ℃ to 450 ℃. The manufacturing method of a thin film transistor. The method of claim 7, wherein the intermediate buffer layer is made of silicon oxide (SiO ₂ ) and is formed at a temperature of 300 ° C. to 400 ° C. 9. The method of claim 7, wherein the buffer layer is made of silicon oxide (SiO ₂ ) and is formed at a temperature of 150 ° C. to 250 ° C. 9. The method of claim 7, further comprising forming an anti-oxidation film on the other surface of the substrate at a temperature of 300 ° C. to 400 ° C. with silicon oxide (SiO ₂ ).

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