KR100790292B1 - Method of forming a fine pattern in semiconductor device - Google Patents

Method of forming a fine pattern in semiconductor device Download PDF

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KR100790292B1
KR100790292B1 KR1020060058776A KR20060058776A KR100790292B1 KR 100790292 B1 KR100790292 B1 KR 100790292B1 KR 1020060058776 A KR1020060058776 A KR 1020060058776A KR 20060058776 A KR20060058776 A KR 20060058776A KR 100790292 B1 KR100790292 B1 KR 100790292B1
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South Korea
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exposure
pattern
forming
mask
light source
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KR1020060058776A
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Korean (ko)
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심귀황
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주식회사 하이닉스반도체
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    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70—Microphotolithographic exposure; Apparatus therefor
    • G03F7/70008—Production of exposure light, i.e. light sources
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70—Microphotolithographic exposure; Apparatus therefor
    • G03F7/70425—Imaging strategies, e.g. for increasing throughput or resolution, printing product fields larger than the image field or compensating lithography- or non-lithography errors, e.g. proximity correction, mix-and-match, stitching or double patterning
    • G03F7/70433—Layout for increasing efficiency or for compensating imaging errors, e.g. layout of exposure fields for reducing focus errors; Use of mask features for increasing efficiency or for compensating imaging errors
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70—Microphotolithographic exposure; Apparatus therefor
    • G03F7/70425—Imaging strategies, e.g. for increasing throughput or resolution, printing product fields larger than the image field or compensating lithography- or non-lithography errors, e.g. proximity correction, mix-and-match, stitching or double patterning
    • G03F7/70433—Layout for increasing efficiency or for compensating imaging errors, e.g. layout of exposure fields for reducing focus errors; Use of mask features for increasing efficiency or for compensating imaging errors
    • G03F7/70441—Optical proximity correction [OPC]
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70—Microphotolithographic exposure; Apparatus therefor
    • G03F7/70483—Information management; Active and passive control; Testing; Wafer monitoring, e.g. pattern monitoring
    • G03F7/7055—Exposure light control in all parts of the microlithographic apparatus, e.g. pulse length control or light interruption

Abstract

A method for forming a fine pattern in a semiconductor device is provided to obtain the fine pattern by adjusting a pattern width of an exposure mask and exposure energy. A pattern forming layer(102) and a photoresist layer(103) are formed on a top surface of a semiconductor substrate(101). A photoresist layer exposure process is performed by using a light source of an exposure system through an exposure mask(104). The number of exposure parts is larger than the number of exposure masks. A photoresist layer pattern is formed by removing the exposure parts formed on the photoresist layer. A pattern having a pitch smaller than a pitch of the exposure mask is formed by removing the exposed pattern forming layer by using the photoresist layer pattern as a mask.

Description

반도체 소자의 미세패턴 형성 방법{Method of forming a fine pattern in semiconductor device}Method of forming a fine pattern in semiconductor device

도 1은 일반적인 노광장비에 의해 형성되는 1차파, 2차파 또는 3차파 점광원을 설명하기 위한 도면이다.1 is a view for explaining a primary, secondary or tertiary wave point light source formed by a general exposure equipment.

도 2a 내지 도 2d는 본 발명의 실시예에 따른 반도체 소자의 미세 패턴 형성방법을 설명하기 위한 공정별 단면도이다.2A through 2D are cross-sectional views illustrating processes of forming a fine pattern of a semiconductor device according to an exemplary embodiment of the present invention.

< 도면의 주요 부분에 대한 부호의 설명 ><Description of Symbols for Main Parts of Drawings>

101 : 반도체 기판 102 : 패턴 형성층101 semiconductor substrate 102 pattern forming layer

103 : 감광막 104 : 노광 마스크103: photosensitive film 104: exposure mask

105 : 노광장치105: exposure apparatus

본 발명은 반도체 소자의 미세 패턴 형성 방법에 관한 것으로서, 특히 노광 마스크의 패턴폭과 노광에너지를 조절하여 광원의 1차파 점광원 뿐만 아니라 2차파 점광원을 이용함으로써, 200 nm 피치(Pitch)의 미세 패턴 형성을 위한 노광장비로 100 nm 피치의 미세 패턴을 형성할 수 있는 반도체 소자의 미세 패턴 형성 방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming a fine pattern of a semiconductor device, and in particular, by adjusting a pattern width and exposure energy of an exposure mask to use not only a primary point light source but also a secondary wave point light source of a light source, a 200 nm pitch fine. The present invention relates to a method of forming a fine pattern of a semiconductor device capable of forming a fine pattern of 100 nm pitch as an exposure apparatus for forming a pattern.

도 1은 일반적인 노광장비에 의해 형성되는 1차파, 2차파 또는 3차파 점광원을 설명하기 위한 도면이다. 도 1을 참조하면, 노광장비는 일반적으로 광원 및 렌즈를 포함한 구조로 형성되어 있다.1 is a view for explaining a primary, secondary or tertiary wave point light source formed by a general exposure equipment. Referring to FIG. 1, an exposure apparatus is generally formed in a structure including a light source and a lens.

슬릿의 구멍을 통과하여 렌즈를 통해 웨이퍼에 쪼여지는 광원의 강도를 포락선으로 나타내면, 평행한 광원이 슬릿의 구멍에 도달하고 평행한 광선이 슬릿의 구멍을 떠나가는 원리인 프라운호퍼 회절(fraunhofer diffraction) 원리 및 시간 t 이후의 새로운 파면의 위치는 2차 점광원들의 포락선에 의해 형성된다는 원리인 호이겐스(huygens) 원리에 의해 강도가 가장 센 1차파 점광원과 그보다 약한 2차파 점광원 및 3차파 점광원 등이 형성된다.The intensity of the light source that passes through the hole in the slit and into the wafer through the lens is represented by an envelope. Principle and the new wavefront after time t is formed by the Huygens principle, which is formed by the envelope of the secondary point sources, and the weaker and weaker secondary and tertiary point sources. Etc. are formed.

이러한 1차 내지 3차파 점광원 중 종래에는 강도가 가장 센 1차파 점광원만을 사용하고 2차파 및 3차파 점광원은 최소화 시키는 근접 효과 보정(optical proximity correction : OPC) 처리공정을 실시하였다.Conventionally, among the first to third wave point light sources, an optical proximity correction (OPC) processing process is performed in which only the first wave point light source having the strongest intensity is used and the second and third wave point light sources are minimized.

최근, 반도체 디바이스의 미세화를 위한 다양한 연구에 의해 전술한 노광장비의 1차파 점광원만을 이용하여 200나노 피치의 미세 패턴 형성도 가능하게 되었으나, 200나노 피치 이하의 미세 패턴 형성은 1층으로 포토마스크를 2매 사용하는 이중 노광 프로세스를 사용하여야 하는 문제점이 있다.Recently, various studies for miniaturization of semiconductor devices have made it possible to form a fine pattern of 200 nm pitch using only the first-wave point light source of the above-described exposure equipment, but fine pattern formation of less than 200 nm pitch is a single layer of photomask. There is a problem in that a double exposure process using two sheets is used.

일례로, 현재 이중 노광 프로세스 중에서 특히 주목받고 있는 기술인 페이즈 엣지(phase edge) 기술은 주로 게이트 형성에 사용되고 있으며, 미세 게이트 패턴을 형성하는 영역에 통상 패턴을 형성하는 포토마스크(바이너리 마스크나 하프톤 위상 시프트 마스크) 이외에, 레벤슨 위상 시프트 마스크(levenson phase shift mask)가 이용된다.For example, a phase edge technique, which is currently attracting particular attention in the double exposure process, is mainly used for forming a gate, and a photomask (binary mask or halftone phase) that normally forms a pattern in a region forming a fine gate pattern. In addition to the shift mask, a Levenson phase shift mask is used.

그러나, 이러한 이중 노광 프로세스는 공정단계가 추가되어야 하기 때문에 비용과 시간 측면에서 제조원가가 높아지게 되는 문제점이 있으며, 오버레이(Overlay) 제어가 어렵기 때문에 역시 고가의 노광장비를 이용해야만 하는 문제점이 있다.However, such a double exposure process has a problem in that the manufacturing cost increases in terms of cost and time because a process step must be added, and there is a problem in that expensive exposure equipment must also be used because overlay control is difficult.

본 발명의 목적은 노광 마스크의 패턴폭과 노광에너지를 조절하여 광원의 1차파 점광원 뿐만 아니라 2차파 점광원을 이용함으로써, 200 nm 피치(Pitch)의 미세 패턴 형성을 위한 노광장비로 100 nm 피치의 미세 패턴을 형성할 수 있는 반도체 소자의 미세 패턴 형성 방법을 제공하는 데 있다.An object of the present invention is to adjust the pattern width and the exposure energy of the exposure mask to use a secondary wave point light source as well as the primary wave point light source of the light source, 100 nm pitch as exposure equipment for forming a fine pattern of 200 nm pitch (Pitch) The present invention provides a method for forming a fine pattern of a semiconductor device capable of forming a fine pattern of the semiconductor device.

본 발명의 일 실시예에 따른 반도체 소자의 미세 패턴 형성 방법은, 반도체 기판 상부에 패턴 형성층 및 감광막을 형성하는 단계, 노광 마스크를 통해 노광장치에서 발생한 광원을 이용하여 노광 마스크의 개구부의 개수보다 많은 복수의 노광부가 형성되도록 감광막을 노광하는 단계, 감광막에 형성된 복수의 노광부를 제 거하여 감광막 패턴을 형성하는 단계 및 감광막 패턴을 마스크로 하여 노출된 패턴 형성층을 제거함으로써 노광 마스크의 피치보다 작은 피치를 갖는 패턴을 형성하는 단계를 포함하는 플래쉬 메모리 소자의 제조 방법을 포함한다. In the method of forming a fine pattern of a semiconductor device according to an embodiment of the present invention, forming a pattern forming layer and a photosensitive film on the semiconductor substrate, using a light source generated in the exposure apparatus through the exposure mask more than the number of openings of the exposure mask Exposing the photosensitive film to form a plurality of exposed portions, removing the plurality of exposed portions formed on the photosensitive film to form a photosensitive film pattern, and removing the exposed pattern forming layer using the photosensitive film pattern as a mask to have a pitch smaller than that of the exposure mask. It includes a method of manufacturing a flash memory device comprising the step of forming a pattern.

본 발명은 DRAM, SRAM 등의 반도체 개발 전영역에 응용될 수 있으며, 특히 낸드 플래시 메모리의 플로팅게이트 형성을 위한 배선 공정에 유용하며, 200나노 피치의 미세 패턴 형성을 위한 노광장비를 이용하는 환경을 일례로 기술한다.The present invention can be applied to the entire area of semiconductor development, such as DRAM, SRAM, and is particularly useful for the wiring process for forming a floating gate of NAND flash memory, an environment using an exposure apparatus for forming a fine pattern of 200nm pitch Describe as.

이하, 첨부된 도면을 참조하여 본 발명의 바람직한 실시예를 설명하기로 한다. 그러나, 본 발명은 이하에서 개시되는 실시예에 한정되는 것이 아니라 서로 다른 다양한 형태로 구현될 수 있으며, 단지 본 실시예는 본 발명의 개시가 완전하도록 하며 통상의 지식을 가진자에게 발명의 범주를 완전하게 알려주기 위해 제공되는 것이다.Hereinafter, with reference to the accompanying drawings will be described a preferred embodiment of the present invention. However, the present invention is not limited to the embodiments disclosed below, but can be implemented in various forms, and only the present embodiments are intended to complete the disclosure of the present invention and to those skilled in the art. It is provided for complete information.

도 2a 내지 도 2d는 본 발명의 실시예에 따른 반도체 소자의 미세 패턴 형성방법을 설명하기 위한 공정별 단면도이다.2A through 2D are cross-sectional views illustrating processes of forming a fine pattern of a semiconductor device according to an exemplary embodiment of the present invention.

도 2a를 참조하면, 반도체 기판(101) 상부에 미세패턴이 형성될 패턴 형성층(102) 및 감광막(103)을 순차적으로 형성한다. 200 나노(nm) 피치의 미세패턴을 형성하기 위한 노광 마스크층(104)을 형성하되, 노광 마스크층(104)의 개구부 폭은 종래 개구부 폭 보다 30 내지 50 % 축소된 폭인 50 내지 70 나노로 형성한다. 상기 제시한 값은 본 발명의 이해를 돕기 위한 일 예로써 패터닝 하고자 하는 사이즈에 따라 조절 가능하다.Referring to FIG. 2A, the pattern forming layer 102 and the photosensitive film 103 on which the micropattern is to be formed are sequentially formed on the semiconductor substrate 101. An exposure mask layer 104 is formed to form a 200 nm (nm) pitch micropattern, wherein the opening width of the exposure mask layer 104 is formed from 50 to 70 nanometers, which is 30 to 50% smaller than the conventional opening width. do. The above values are adjustable according to the size to be patterned as an example to help understanding of the present invention.

광원 및 렌즈를 포함한 노광장치(105)를 이용하여 노광공정을 실시한다. 노광장치(105)는 약 0.85NA의 렌즈구경을 가진 일반적인 노광장치를 사용할 수 있다. 이때, 노광 에너지는 노광 마스크층(104)의 개구부 폭이 줄어든 만큼 종래의 200 나노 피치의 미세패턴 형성시 사용하는 노광 에너지 보다 30 내지 50 % 증가된 에너지로 노광공정을 실시한다. 또한, 광원은 193나노 파장의 ArF 소스 또는 248나노 파장의 KrF 소스를 사용한다. An exposure process is performed using the exposure apparatus 105 including a light source and a lens. The exposure apparatus 105 may use a general exposure apparatus having a lens diameter of about 0.85 NA. At this time, the exposure energy is performed by the exposure process with energy increased by 30 to 50% more than the exposure energy used when forming the fine pattern of the conventional 200 nano pitch as the opening width of the exposure mask layer 104 is reduced. In addition, the light source uses an ArF source of 193 nm wavelength or a KrF source of 248 nm wavelength.

도 2b를 참조하면, 노광 마스크층(104)의 개구부를 통해 광원의 1차 점광원이 통과되어 감광막(103)에 노광부(A)가 형성되는 동시에, 개구부와 개구부 사이의 중앙부에 대응되는 감광막(103)에 2차 점광원에 의한 노광부(B)가 형성된다. 따라서, 노광 마스크(104)의 개구부 개수보다 두 배 개수의 노광부를 형성할 수 있게 된다. Referring to FIG. 2B, the primary point light source of the light source passes through the opening of the exposure mask layer 104 to form the exposure portion A in the photosensitive film 103, and at the same time, the photosensitive film corresponding to the central portion between the opening and the opening. The exposure portion B by the secondary point light source is formed at 103. Therefore, it is possible to form twice as many exposed portions as the number of openings of the exposure mask 104.

도 2c를 참조하면, 감광막(103)의 노광부(A 및 B)를 노광하고 현상하여 감광막 패턴(103a)을 형성한다. Referring to FIG. 2C, the exposed portions A and B of the photosensitive film 103 are exposed and developed to form the photosensitive film pattern 103a.

도 2d를 참조하면, 감광막 패턴(103a)을 마스크로 하여 노출된 패턴 형성층(102)을 식각하여 패턴 형성층 패턴(102a)을 형성하고 감광막 패턴(103a)을 제거한다. Referring to FIG. 2D, the exposed pattern forming layer 102 is etched using the photosensitive film pattern 103a as a mask to form the pattern forming layer pattern 102a, and the photosensitive film pattern 103a is removed.

상기에서 설명한 본 발명의 기술적 사상은 바람직한 실시예에서 구체적으로 기술되었으나, 상기한 실시예는 그 설명을 위한 것이며 그 제한을 위한 것이 아님을 주의하여야 한다. 또한, 본 발명은 본 발명의 기술 분야의 통상의 전문가라면 본 발명의 기술적 사상의 범위 내에서 다양한 실시예가 가능함을 이해할 수 있을 것이다. Although the technical spirit of the present invention described above has been described in detail in a preferred embodiment, it should be noted that the above-described embodiment is for the purpose of description and not of limitation. In addition, the present invention will be understood by those skilled in the art that various embodiments are possible within the scope of the technical idea of the present invention.

본 발명은 노광 마스크의 패턴폭과 노광에너지를 조절하여 광원의 1차파 점광원 뿐만 아니라 2차파 점광원을 이용함으로써, 200 nm 피치(Pitch)의 미세 패턴 형성을 위한 노광장비로 100 nm 피치의 미세 패턴을 형성할 수 있다.The present invention is to adjust the pattern width and the exposure energy of the exposure mask to use the secondary wave point light source as well as the primary wave point light source of the light source, the exposure equipment for forming a fine pattern of 200 nm pitch (100 nm pitch fine) Patterns can be formed.

Claims (4)

반도체 기판 상부에 패턴 형성층 및 감광막을 형성하는 단계;Forming a pattern forming layer and a photosensitive film on the semiconductor substrate; 노광 마스크를 통해 노광장치에서 발생한 광원을 이용하여 상기 노광 마스크의 개구부의 개수보다 많은 복수의 노광부가 형성되도록 상기 감광막을 노광하는 단계;Exposing the photosensitive film to form a plurality of exposed portions greater than the number of openings in the exposure mask using a light source generated in the exposure apparatus through an exposure mask; 상기 감광막에 형성된 복수의 노광부를 제거하여 감광막 패턴을 형성하는 단계; 및Removing a plurality of exposed portions formed on the photosensitive film to form a photosensitive film pattern; And 상기 감광막 패턴을 마스크로 하여 노출된 패턴 형성층을 제거함으로써 상기 노광 마스크의 피치보다 작은 피치를 갖는 패턴을 형성하는 단계를 포함하는 반도체 소자의 미세패턴 형성 방법.Forming a pattern having a pitch smaller than the pitch of the exposure mask by removing the exposed pattern forming layer using the photosensitive film pattern as a mask. 제 1 항에 있어서,The method of claim 1, 상기 노광 마스크의 개구부의 폭은 설정된 개구부의 폭 보다 30 내지 50 % 축소하여 형성하는 반도체 소자의 미세패턴 형성 방법.And a width of the opening of the exposure mask is reduced by 30 to 50% from a width of the set opening. 제 1 또는 제 2 항에 있어서,The method according to claim 1 or 2, 상기 노광 단계에서의 상기 노광 에너지는 상기 노광 마스크의 개구부 폭이 줄어든 비율만큼 증가된 에너지로 노광공정을 실시하는 반도체 소자의 미세패턴 형성 방법.And wherein the exposure energy in the exposure step is subjected to an exposure process at an energy increased by a rate at which the opening width of the exposure mask is reduced. 제 1 항에 있어서,The method of claim 1, 상기 광원은 193나노 파장의 ArF 소스 또는 248나노 파장의 KrF 소스를 사용하는 반도체 소자의 미세패턴 형성 방법.The light source is a fine pattern forming method of a semiconductor device using an ArF source of 193nm wavelength or KrF source of 248nm wavelength.
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Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR960011461B1 (en) * 1993-06-25 1996-08-22 현대전자산업 주식회사 Diffractive light controlling mask
KR20030017431A (en) * 2001-08-23 2003-03-03 가부시키가이샤 니콘 Illuminaire optical apparatus, exposure apparatus, exposure method, and method for fabricating micro device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR960011461B1 (en) * 1993-06-25 1996-08-22 현대전자산업 주식회사 Diffractive light controlling mask
KR20030017431A (en) * 2001-08-23 2003-03-03 가부시키가이샤 니콘 Illuminaire optical apparatus, exposure apparatus, exposure method, and method for fabricating micro device

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