KR100782911B1 - Method of forming uniformly distributed nanocrystal and device of including the nanocrystal - Google Patents

Abstract

A method of forming uniformly nanocrystal and a device having the nanocrystal are provided to form the nanocrystal having high controllability of density and dimension and control a distance easily between nanocrystals. A first mask layer(403a) and a second mask layer(403b) are formed on a substrate. A first nanocrystal forming material(404a) is applied onto one side of the substrate at an inclined angle by using the first mask layer as a mask, and a second nanocrystal forming material(404b) is applied onto the other side of the substrate at an inclined angle by using the second mask layer as a mask. A third nanocrystal forming material(404c) is applied onto the substrate at a right angle by using the first nanocrystal forming material formed on the first mask layer and the second nanocrystal forming material formed on the second mask layer as a mask.

Description

METHOD OF FORMING UNIFORMLY DISTRIBUTED NANOCRYSTAL AND DEVICE OF INCLUDING THE NANOCRYSTAL}

1 is a cross-sectional view of a low voltage memory device including a conventional nanocrystal.

2 is a cross-sectional view of a silicon nanocrystalline memory device including a conventional floating gate.

3 illustrates a method of manufacturing a nanocrystalline memory device having a fast long-term storage time including a conventional floating gate.

4 illustrates a method of forming uniform nanocrystals according to a first embodiment of the present invention.

5 illustrates a method of forming uniform nanocrystals according to a second embodiment of the present invention.

6 illustrates a method of forming uniform nanocrystals according to a third embodiment of the present invention.

FIG. 7 illustrates a method for forming uniform nanocrystals according to the first to third embodiments of the present invention using materials having different work functions.

The present invention relates to a method for uniformly forming nanocrystals and an element comprising the nanocrystals.

In order to reduce power consumption and miniaturization in electronic devices, a memory device having a high density, low power consumption, and nonvolatile memory capable of being electrically erased and written is required. In the nonvolatile memory device, a floating gate is formed between the channel region and the gate region. This floating gate acts as a carrier confined region.

However, nonvolatile memory devices have limited write and erase operations because the number of times of injection and removal of charges into the floating gate is limited in view of a decrease in reliability due to hot carriers. In addition, since a memory device having a nonvolatile requires a relatively thick insulating film to maintain the nonvolatile, a large voltage of 10 V or more must be applied. Therefore, there is a disadvantage in that hot carriers are generated as a high voltage is applied, and deterioration of the insulating layer occurs due to trap formation by the generated hot carriers, reaction at the interface, and relaxation of the hot carriers. In addition, in the nonvolatile memory device, since the write and erase operations are performed by the minute current flowing through the charge and discharge to the floating gate, the charge and discharge time is increased in millisecond units.

In order to overcome this disadvantage, as shown in FIG. 1, a nonvolatile low voltage memory device including a conventional nanocrystal has been developed.

As shown in FIG. 1A, a low voltage memory device including a conventional nanocrystal includes a lower insulating layer 112, a floating gate 104, an upper insulating layer 102, and a semiconductor substrate 106. The control gate 100 is formed sequentially. After removing the lower insulating layer 112, the floating gate 104, the upper insulating layer 102, and the control gate 100, the unit memory device is formed by forming the source region 108 and the drain region 110. Here, the floating gate 104 is formed of a cluster or island 122 composed of a semiconductor material having a diameter of 1 nm to 20 nm, as shown in Fig. 1B. The insulating layer 112 between the channel region 106 and the floating gate 104 is made thin until electrons can pass directly by the tunnel effect, and at the same time, the energy level of the floating gate 104 is formed in the channel region ( Lower than 106), trapped electrons cannot be easily escaped.

In the conventional memory device including the floating gate 104 described above, referring to FIG. 2, a tunnel insulating film having a thickness of 1.1 nm to 1.8 nm is formed on a semiconductor substrate 201 in which a source region 206 and a drain region 207 are formed. 202 is formed. A nanocrystal 203 having a diameter of 5 nm, an interval of 5 nm, and a density of 1 × 10 ¹² cm ^-2 is formed on the tunnel insulating film 202 by using chemical vapor deposition (CVD). Further, a control gate insulating film 204 was formed on the nanocrystal 203, and SiO ₂ having a thickness of 7 nm was deposited on the control gate insulating film 204 to form a control gate 205.

However, since the conventional memory device described above uses nanocrystals that are accidentally present on the SiO ₂ film surface or nanocrystals that grow in the form of islands around random crystal nuclei that occur early in the CVD process, nanocrystal density The disadvantage is that the size of the nanocrystals is not controlled.

In another conventional memory device including the floating gate 104 described above, a thermal oxide film 302 of 5 nm to 20 nm is formed on the semiconductor substrate 301 as shown in FIG. After the thermal oxide film 302 is formed, as shown in (b) of FIG. 3, ions are formed in the thermal oxide film 302 until the high-dose silicon (Si) or germanium (Ge) is supersaturated. Injected and subjected to heat treatment at 950 ° C. for 30 minutes in a nitrogen (N ₂ ) atmosphere to grow a nanocrystal 303 of silicon (Si) or germanium (Ge) having a diameter of 5 nm on the thermal oxide film 302, and the semiconductor. The source region 305 and the drain region 306 are formed in the substrate 301 at predetermined intervals. Here, ion implantation is performed on 5 keV and 5 * 10 <^15> cm <^-2> conditions. Next, as shown in FIG. 3C, the gate electrode 304 is formed on the thermal oxide film 302.

However, since the above-described memory device implants silicon (Si) or germanium (Ge) into the thermal oxide film 302 and heat-treats it to grow nanocrystals in the thermal oxide film 302, the implanted ion concentration is in the depth direction. As a result, the ion concentration of the thermal oxide film 302 cannot be made uniform. In addition, since the heat treatment is performed in a state where there is a gap in the concentration distribution, the nanocrystal density in the depth direction of the thermal oxide film 302 is also distributed, and the nanocrystal density, the size of the nanocrystal, and the tunneling insulating film between the nanocrystal and the channel. It is difficult to control the thickness of the disadvantage.

As a result, in the conventional memory device in which the floating gate is formed, the nanocrystal density and the size of the nanocrystal cannot be controlled, the ion concentration of the thermal oxide film 302 cannot be uniform, and the tunneling insulating film between the nanocrystal and the channel cannot be controlled. It was difficult to control the thickness.

An object of the present invention for solving the above-described problems is to provide a manufacturing method and a structure thereof capable of forming nanocrystals having high controllability in density and size and small gaps.

In addition, the above-described manufacturing method and structure thereof provide a memory device having a small characteristic gap such as a threshold voltage and a write performance, enabling fast rewriting, and having a nonvolatile memory.

Method of forming a nanocrystal uniformly according to the present invention for solving the above problems is a method of forming a uniform nanocrystal (a) forming a first mask layer and a second mask layer on the substrate spaced apart from each other (B) injecting the first nanocrystal forming material onto the substrate adjacent to the second mask layer at a first inclination angle at an oblique angle with respect to one side of the upper surface of the substrate using the first mask layer as a mask; c) injecting a second nanocrystal forming material onto the substrate adjacent to the first mask layer at a second inclination angle at an oblique angle with respect to the other side of the upper surface of the substrate using the second mask layer as a mask, (d) A first nanocrystal-forming material formed on the first mask layer in a form protruding toward the second mask layer and a second b formed on the second mask layer in a form protruding toward the first mask layer; Incorporating a third nanocrystal forming material on the substrate at a third inclination angle perpendicular to the substrate using the crystal forming material as a mask, and (e) removing the first and second mask layers. It is characterized by.

Here, after the step (e), forming the first to third nanocrystal forming material formed on the substrate into a plurality of spherical nanocrystals of equal intervals; It is preferable to further include.

Here, the spherical nanocrystals are preferably formed by heat treatment in a gas atmosphere of 10 Torr or less.

Wherein the first or second tilt angle satisfies the following equation, Θ = tan ⁻¹ (B / A), where Θ is the first or second tilt angle and B is the angle of the first or second mask layer. It is preferable that A is the height from one surface of the first mask layer to one surface of the second mask layer.

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Here, it is preferable that the first to third nanocrystal forming materials are materials having different work functions.

In addition, the method for forming a uniform nanocrystal according to the present invention comprises the steps of (a) forming a first mask layer and a second mask layer on the first substrate with a second substrate formed on the first substrate therebetween; (b) injecting a first nanocrystal forming material on one side of the second substrate at a first inclination angle at an oblique angle with respect to an upper surface of the first mask layer using the first mask layer as a mask, (c (B) injecting a second nanocrystal forming material onto the other side of the second substrate at a second inclination angle at an oblique angle with respect to an upper surface of the second mask layer using the second mask layer as a mask; and (d) Removing the first and second mask layers.

Here, after the step (d), the step of forming the first and second nanocrystal forming material formed on one side or the other side of the second substrate into a plurality of spherical nanocrystals of equal intervals; It is preferable to further include.

Here, the spherical nanocrystals are preferably formed by heat treatment in a gas atmosphere of 10 Torr or less.

Wherein the first or second tilt angle satisfies the following equation: 0 ° <Θ ≦ tan ⁻¹ (B / A) where Θ is the first or second tilt angle and B is the first or second mask It is preferable that it is the height of a layer, and A is the distance from one surface of the said 1st mask layer to one surface of the said 2nd mask layer.

Here, the first nanocrystal forming material is formed on at least two sides on one side of the second substrate spaced apart according to the first inclination angle, each having a different work function according to the first inclination angle, the second nanocrystal It is preferable that at least two forming materials are formed on the other side of the second substrate by being spaced apart according to the second inclination angle, and have different work functions according to the second inclination angle.

In addition, the method for forming a uniform nanocrystal according to the present invention comprises the steps of (a) forming nanoparticles on a substrate, (b) injecting a plurality of nanocrystal forming materials on the nanoparticles at different incidence angles And (c) removing the nanoparticles.

Here, the nanoparticles are preferably polystyrene nanoparticles.

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Here, it is preferable that the work functions of the plurality of nanocrystal forming materials are different from each other.

In addition, a device including a nanocrystal according to the present invention is a substrate, a drain and source formed spaced apart from the substrate, a first insulating film formed on the substrate, formed on the first insulating film, the first, seventh and A floating gate comprising nanocrystals formed by the method of forming a uniform nanocrystal according to any one of claims 12, a second insulating film formed on the floating gate and a control gate formed on the second insulating film.

Here, the nanocrystals are preferably 3 to 5nm in diameter.

In addition, a device comprising a nanocrystal according to the present invention is a substrate; Drains and sources formed spaced apart on the substrate; A channel connected to the drain and the source; A first insulating layer spaced apart from the drain and the source to surround the channel; A floating gate formed to surround the first insulating layer, the floating gate including nanocrystals formed by a method of forming the uniform nanocrystals of any one of the first, seventh, and twelfth layers; 2 insulating film; And a control gate formed to surround the second insulating film.

Here, the nanocrystals are preferably 3 to 5nm in diameter.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

4 illustrates a method of forming uniform nanocrystals according to a first embodiment of the present invention.

In the method of forming a uniform nanocrystal according to the first embodiment of the present invention, the first and second mask layers 403a and 403b are formed on the substrate to be spaced apart from each other. Herein, the substrate refers to a general material. In the first embodiment of the present invention, the substrate may refer to the semiconductor substrate 401 or the insulating film 402 formed on the semiconductor substrate 401. Here, the method of forming the first and second mask layers 403a and 403b corresponds to known techniques and will be omitted. Here, for convenience of description, the substrate will be described as an insulating film 402 formed on the semiconductor substrate 401. Here, the first and second mask layers 403a and 403b are deposition mask layers such as photoresist, SiO ₂ , SiN ₄ , Al ₂ O _3, or HfO ₂ , which are arranged in parallel at regular intervals under low pressure below atmospheric pressure. Most preferred.

As shown in FIG. 4A, the first nanocrystal forming material 404a uses a first mask layer 403a as a mask, and has a first inclination angle at an oblique angle with respect to one side of the upper surface of the substrate 401. The light is incident on the insulating film 402 adjacent to the second mask layer 403b by Θ ₁ . Here, the first inclination angle Θ ₁ of the first nanocrystal forming material 404a is the second mask layer 403b from the height B ₁ of the first mask layer 403a and one surface of the first mask layer 403a. It must be equal to the ratio of distance A to one side of () ¹ (tan ₁ = tan ^-1 (B ₁ / A)). In this manner, the first nanocrystal forming material 404a is incident at the first inclination angle Θ ₁ and the upper surface of the first mask layer 403a to which the first nanocrystal forming material 404a abuts the insulating film 402. It is formed as a nanowire uniformly distributed on the upper surface of.

As shown in FIG. 4B, the second nanocrystal forming material 404b has a second inclination angle that is an oblique angle with respect to the other side of the upper surface of the substrate 401 using the second mask layer 403b as a mask. The light is incident on the insulating film 402 adjacent to the first mask layer 403a by Θ ₂ . Here, the second inclination angle Θ ₂ of the second nanocrystal forming material 404b is the first mask layer 403a from the height B ₂ of the second mask layer 403b and one surface of the second mask layer 403b. It must be equal to the ratio of distance A to one side of () ₂ = tan ^-1 (B ₂ / A). In this manner, the second nanocrystal forming material 404b is incident on the second inclination angle Θ ₂ so that the top surface of the second mask layer 403b is positioned on the path where the second nanocrystal forming material 404b is incident. And nanowires uniformly distributed on an upper surface of the insulating layer 402 adjacent to the first mask layer 403a. Here, when the height of the first mask layer 403a and the height of the second mask layer 403b are the same, the second inclination angle Θ ₂ becomes a negative first inclination angle θ ₁ .

As shown in FIG. 4C, the third nanocrystal forming material 404c is formed on the first mask layer 403a in a form protruding toward the second mask layer 403b. A third inclination angle perpendicular to the substrate with the second nanocrystal forming material 404b formed on the second mask 403b layer as a mask protruding toward the material 404a and the first mask 403a layers ( Θ ₃ ) is incident. Here, 90 ° or −90 ° is most suitable for the third inclination angle Θ ₃ of the third nanocrystal forming material 404c. That is, the first nanocrystal forming material 404a is formed on the first mask layer 403a by using FIGS. 4A and 4B, and the second mask layer 403b is formed on the second mask layer 403b. Since the nanocrystal forming material 404b is formed to narrow the inlet, the third nanocrystal forming material 404c is formed of nanowires uniformly distributed on the upper surface of the insulating film 402 by the narrowed inlet. More specifically, the third nanocrystal forming material 404c is formed in the form of a nanowire at an intermediate point between the first nanocrystal forming material 404a and the second nanocrystal forming material 404b.

As shown in FIG. 4D, the first and second mask layers 403a and 403b are removed. Here, the first and second mask layers 403a and 403b are removed using a lift-off process, and when the first and second mask layers 403a and 403b are removed, the first and second mask layers ( The first and second nanocrystal forming materials 404a and 404b formed on the top surfaces of 403a and 403b are also removed. Here, the process of selectively removing the first and second mask layers 403a and 403b is omitted according to the known art.

Here, using the process illustrated in FIGS. 4A to 4D, the first and third nanocrystal forming materials 404a, 404b, and 404c may be formed using the first to third inclination angles Θ. ₁ , Θ ₂ , Θ ₃ ) may directly form nanowires incident on the insulating film 402 and uniformly distributed at predetermined intervals and at predetermined sizes. Here, when the first and third nanocrystal forming materials 404a, 404b, and 404c are semiconductors or metals (TiN, TaN, Ag, Pt, Ni, Zn, Au), the first and third nanocrystal forming materials ( 404a, 404b, and 404c are incident on the insulating film 402 according to the first to third inclination angles Θ ₁ , Θ ₂ , Θ ₃ to directly distribute nanocrystals uniformly distributed at predetermined intervals and at predetermined sizes. Can be formed.

In addition, when the first and third nanocrystal forming materials 404a, 404b, and 404c are not semiconductors or metals, the first and third nanocrystal forming materials 404a, 404b, and 404c are uniformly distributed at predetermined intervals and at predetermined sizes using the process as shown in FIG. Nanocrystals can be formed. Here, as shown in (e) of FIG. 4, when the nanowires are heat-treated at a temperature above the deposition temperature of the nanowires in a gas atmosphere having no vacuum of 10 Torr or less and oxidizing properties of helium, nitrogen, argon or hydrogen of 10 Torr or less. At the same interval, a plurality of spherical nanocrystals having a diameter of 3-5 nm can be formed.

Here, the variation ΔVth of the threshold voltage change Vth when one electron is accumulated per nanocrystal in the storage device including the nanocrystal may be expressed by the following equation.

ΔV _th = q (n _well / ε _ox ) (t _cntl + (ε _ox / ε _si ) t _well / 2)

Where q is the charge of the electron,

n _well is nanocrystalline density,

ε _ox is the dielectric constant of the oxide film,

t _cntl is the thickness of the control gate oxide film,

ε _si is the dielectric constant of silicon,

t _well is the size of the nanocrystals.

By reducing the gap between the nanocrystal density (n _well ) and the nanocrystal size (t _well ) from Equation 1, the variation (ΔVth) of the threshold voltage change (Vth) of the device may be kept constant.

In addition, since the thickness of the tunnel insulating film between the nanocrystal and the channel is a channel condition that determines direct tunneling of electrons to the nanocrystal, the difference in film thickness affects the difference in writing characteristics. In order to improve the characteristics of the memory device by such a structure, the nanocrystal density, the size of the nanocrystal, and the thickness of the tunnel insulating layer between the nanocrystal and the channel must be controlled.

As a result, when the memory device is formed by using the method of forming a uniform nanocrystal according to the first embodiment of the present invention, since the metallic material to be nanocrystal is uniformly distributed at a uniform one-dimensional line shape, the nano The diameter of the crystal and the discreteness of the number are improved.

In addition, when the memory device is formed using the method of forming a uniform nanocrystal according to the first embodiment of the present invention, the controllability of the nanocrystal density, the size of the nanocrystal and the thickness of the tunneling insulating film between the nanocrystal and the channel is controlled. And uniformity is improved, and the uniformity margin of the nanocrystals required to make a reliable device is increased due to a small variation in threshold voltage.

In addition, as shown in FIG. 7A, the first to third inclination angles Θ ₁ and Θ ₂ , wherein the first to third nanocrystal forming materials 404a, 404b, and 404c having different work functions, respectively, are different. , Θ ₃ ), it is possible to form a group of nanocrystals with different work functions in the same layer, and different voltages for charges to be stored in the nanocrystals depending on the work function, so that multiple bits per single memory cell There is an advantage that can be stored.

Here, a non-volatile memory device or sensor (image or bio) including a transistor (FinFET, Ω-FET, π-FET) structure using a method of forming a uniform nanocrystal according to the first embodiment of the present invention Can be formed.

5 illustrates a method of forming uniform nanocrystals according to a second embodiment of the present invention.

In the method of forming a uniform nanocrystal according to the second embodiment of the present invention, the first and second on the first substrate 501 with the second substrate 502 formed on the first substrate 501 interposed therebetween. Mask layers 503a and 503b are formed. Herein, the second substrate 502 refers to a general material. In the second embodiment of the present invention, the second substrate 502 may be a material formed by patterning the first substrate 501 or may be formed of silicon-on-insulator (SOI). The first substrate 501 is an insulator and the second substrate 502 may be formed by patterning the second substrate with a general material. Here, the method of forming the first and second mask layers 503a and 503b corresponds to known techniques and will be omitted. Here, for convenience of description, the first and second mask layers 503a and 503b will be described as being formed of the second substrate 502 that is part of the patterned first substrate 501. The first and second mask layers 503a and 503b are most preferably deposition mask layers such as photoresist, SiO ₂ , SiN ₄ , Al ₂ O _3, or HfO ₂ , arranged in parallel at regular intervals under low pressure below atmospheric pressure. desirable.

As shown in FIGS. 5A and 5B, the first nanocrystal forming material 504a has an oblique angle with respect to the upper surface of the first mask 503a layer using the first mask layer 503a as a mask. It is incident on the first inclination angle Θ ₁ . The incident first nanocrystal forming material 504a is formed in the form of nanowires on one side of the second substrate 502 and the top surface of the first mask layer 503a. One side of the second substrate 502 refers to a side of the side of the second substrate 502 facing the first mask layer 503a. Here, the first inclination angle Θ ₁ of the first nanocrystal forming material 504a is the second substrate 502 from the height B ₁ of the first mask layer 503a and one surface of the first mask layer 503a. It must be less than or equal to the ratio of the distance A ₁ to one side of (Θ ₁ ≤ tan ^-1 (B ₁ / A ₁ )). Therefore, the first inclination angle Θ ₁ may vary within a range of (Θ ₁ ≦ tan ⁻¹ (B ₁ / A ₁ )). In this manner, the plurality of first nanocrystal forming materials 504a may be sequentially incident from a small inclination angle among the first inclination angles Θ ₁ to partially cover the first mask layer 503a and the second substrate 502. A plurality of nanowires are formed on one side.

As shown in FIG. 5C, the second nanocrystal forming material 504b has a second oblique angle at an oblique angle with respect to the top surface of the second mask layer 503b using the second mask layer 503b as a mask. Is incident on (Θ ₂ ). The incident second nanocrystal forming material 504b is formed in a nanowire shape on the other side of the second substrate 502 and the upper surface of the second mask layer 503b. The other side of the second substrate 502 refers to the opposite side of one side of the second substrate 502. Here, the second inclination angle Θ ₂ of the second nanocrystal forming material 504b is the second substrate 502 from the height B ₂ of the second mask layer 503b and one surface of the second mask layer 503b. It must be less than or equal to the ratio of the distance A ₂ to the other side of (Θ ₂ ≤ tan ^-1 (B ₂ / A ₂ )). Therefore, the second inclination angle Θ ₂ may vary within a range of (Θ ₂ ≤ tan ⁻¹ (B ₁ / A ₁ )). In this manner, the plurality of second nanocrystal forming materials 504b may be sequentially incident at a small inclination angle among the second inclination angles Θ ₂ to partially cover the second mask layer 503b and the second substrate 502. A plurality of nanowires are formed on the other side. Here, when the height of the first mask layer 503a and the height of the second mask layer 503b are the same, the second inclination angle Θ ₂ is a negative first inclination angle θ ₁ .

As shown in FIG. 5D, the first and second mask layers 503a and 503b are removed. Here, the method of removing the first and second mask layers 503a and 503b is omitted according to the known art.

Using the process illustrated in FIGS. 5A to 5D, when the first nanocrystal forming material 504a is sequentially incident to a smaller than the first inclination angle Θ ₁ , the second substrate When a plurality of nanowires are sequentially formed on one side of 502, and the second nanocrystal forming material 504b is sequentially incident to a smaller than the second inclination angle Θ ₂ , the other side of the second substrate 502. A plurality of nanowires are formed sequentially. Here, when the first and second nanocrystal forming materials 504a and 504b are semiconductors or metals (TiN, TaN, Ag, Pt, Ni, Zn, Au), the first and second nanocrystal forming materials 504a, 504b is sequentially incident on one side of the second substrate 502 and the other side of the second substrate 502 according to the first and second inclination angles Θ ₁ and Θ ₂ at predetermined intervals and a predetermined size. Uniformly distributed nanocrystals can be formed directly.

In addition, when the first and second nanocrystal forming materials 504a and 504b are not semiconductors or metals, the nanoparticles are uniformly distributed at predetermined intervals and at predetermined sizes using a process as shown in FIG. Crystals can be formed. Here, as shown in (e) of FIG. 5, when the nanowires are heat-treated at a temperature above the deposition temperature of the nanowires in a gas atmosphere having no vacuum of 10 Torr or less and oxidizing properties of helium, nitrogen, argon or hydrogen of 10 Torr or less. At the same interval, a plurality of spherical nanocrystals having a diameter of 3-5 nm can be formed.

As a result, as shown in Equation 1, when the memory device is formed using the method of forming the uniform nanocrystals according to the second embodiment of the present invention, the metallic material to be nanocrystals is uniformly uniform at a line-like interval. Because of their distribution, the discreteness of the diameter and number of nanocrystals is improved.

In addition, when the memory device is formed using the method of forming a uniform nanocrystal according to the second embodiment of the present invention, the controllability of the nanocrystal density, the size of the nanocrystal and the thickness of the tunneling insulating film between the nanocrystal and the channel is controlled. And uniformity is improved, and the uniformity margin of the nanocrystals required to make a reliable device is increased due to a small variation in threshold voltage.

In addition, as shown in FIG. 7B, the first and second nanocrystal forming materials 504a and 504b having different work functions are respectively different from the first and second inclination angles Θ ₁ and Θ _2, respectively. When formed sequentially, it is possible to form a group of nanocrystals having different work functions in the same layer, and different voltages for charges to be stored in the nanocrystals can be varied depending on the work function, so that multiple bits can be stored in a single memory cell. There is an advantage.

Here, a non-volatile memory device or sensor (image or bio) including a transistor (FinFET, Ω-FET, π-FET) structure using a method of forming a uniform nanocrystal according to a second embodiment of the present invention Can be formed.

6 illustrates a method of forming uniform nanocrystals according to a third embodiment of the present invention.

As shown in FIG. 6A, a plurality of spherical nanoparticles 601 is formed on the substrate 603. Herein, the nanoparticles 601 are most preferably polystyrene nanoparticles. Here, the method of forming the nanoparticles 601 in the shape of a sphere on the substrate 603 corresponds to a known technique and will be omitted.

The plurality of nanocrystal forming materials are incident on the nanoparticles at different incident angles. Here, the incidence angle refers to the inclination angle and the direction angle, the inclination angle refers to the angle formed by the path of the plurality of nanocrystal forming materials and the normal to the upper surface of the substrate, the direction angle refers to the angle between the incident paths. For example, as shown in FIGS. 6B and 6C, the plurality of nanocrystal forming materials may include a plurality of inclination angles Θ ₁ , Θ ₂ , Θ ₃ , and azimuth angles Θ ₁₁ , Θ ₂₁ , Incident on the nanoparticles 601 at different incidence angles having Θ ₃₁ ) may be uniformly formed. Here, the plurality of direction angles Θ ₁₁ , Θ ₂₁ , and Θ ₃₁ may be incident on the nanoparticles 601 by 120 °, respectively. 6 (c) is a cross-sectional view of x-x 'in FIG. 6 (b), where a plurality of inclination angles Θ having the same angle on the nanoparticles 601 are provided. ₁ , Θ ₂ , Θ ₃ ). Here, it is preferable that the work functions of the plurality of incident nanocrystal forming materials are different from each other.

Next, as shown in FIG. 6D, the nanoparticles 601 are removed. Here, by removing the nanoparticles 601 from the substrate 603, it is possible to form a uniformly arranged high density nanocrystals (602).

As a result, when the memory device is formed using the method of forming a uniform nanocrystal according to the third embodiment of the present invention, the metallic material (TiN, TaN, Ag, Pt, Ni, Zn, Au) to be nanocrystals is Since it is formed evenly distributed at intervals, the discreteness of the diameter and number of nanocrystals is improved.

In addition, when the memory device is formed using the method of forming a uniform nanocrystal according to the third embodiment of the present invention, the controllability of the nanocrystal density, the size of the nanocrystal and the thickness of the tunneling insulating film between the nanocrystal and the channel is controlled. And uniformity is improved, and the uniformity margin of the nanocrystals required to make a reliable device is increased due to a small variation in threshold voltage.

In addition, as shown in FIG. 7C, the first to third direction angles Θ ₁₁ and Θ that the first to third nanocrystal forming materials 604a, 604b, and 604c each having different work functions are different from each other. ₂₁ , Θ ₃₁ ), which may form a group of nanocrystals having different work functions in the same layer, and may vary voltages for storing charges in the nanocrystals according to the work function. Each bit has the advantage of storing multiple bits.

Although the embodiments of the present invention have been described above with reference to the accompanying drawings, the technical configuration of the present invention described above may be modified in other specific forms by those skilled in the art to which the present invention pertains without changing its technical spirit or essential features. It will be appreciated that it may be practiced.

Therefore, the above-described embodiments are to be understood as illustrative and not restrictive in all respects, and the scope of the present invention is indicated by the appended claims rather than the detailed description, and the meaning and scope of the claims and All changes or modifications derived from the equivalent concept should be interpreted as being included in the scope of the present invention.

According to the configuration of the present invention described above, it is possible to form nanocrystals having high controllability of density and size and small gaps.

In addition, it is possible to manufacture a nonvolatile memory device that can easily control the distance between the nanocrystals and the nanocrystals, has a small characteristic gap such as threshold voltage and write performance, and enables high-speed rewriting.

Claims (20)

In the method of forming nanocrystals, (a) forming a first mask layer and a second mask layer spaced apart from each other on the substrate; (b) injecting a first nanocrystal forming material onto a substrate adjacent to the second mask layer at a first inclination angle at an oblique angle with respect to one side of the upper surface of the substrate using the first mask layer as a mask; (c) injecting a second nanocrystal forming material onto the substrate adjacent to the first mask layer at a second inclination angle at an oblique angle with respect to the other side of the upper surface of the substrate using the second mask layer as a mask; (d) a first nanocrystal forming material formed on the first mask layer in a form protruding toward the second mask layer and a second nano formed on the second mask layer in a form protruding toward the first mask layer. Incident a third nanocrystal forming material on the substrate at a third inclination angle perpendicular to the substrate using the crystal forming material as a mask; And (e) removing the first and second mask layers; Including, a method of forming a uniform nanocrystals. According to claim 1, After step (e), Forming the first to third nanocrystal forming materials formed on the substrate into a plurality of spherical nanocrystals at equal intervals; Further comprising, a method of forming a uniform nanocrystals. The method of claim 2, The spherical nanocrystals, A method of forming a uniform nanocrystal, which is formed by heat treatment in a gas atmosphere of 10 Torr or less. According to claim 1, The first or second inclination angle satisfies the following equation, Θ = tan ^-1 (B / A), Where Θ is the first or second tilt angle, B is the height of the first or second mask layer, A is a distance from one side of the first mask layer to one side of the second mask layer. delete According to claim 1, The first to third nanocrystal forming material is a method of forming a uniform nanocrystal, each work function is different. In the method of forming nanocrystals, (a) forming a first mask layer and a second mask layer on the first substrate with a second substrate formed thereon; (b) injecting a first nanocrystal forming material onto one side of the second substrate at a first inclination angle at an oblique angle with respect to an upper surface of the first mask layer using the first mask layer as a mask; (c) injecting a second nanocrystal forming material on the other side of the second substrate at a second inclination angle at an oblique angle with respect to an upper surface of the second mask layer using the second mask layer as a mask; And (d) removing the first and second mask layers; Including, a method of forming a uniform nanocrystals. The method of claim 7, wherein After step (d), Forming the first and second nanocrystal forming materials formed on one side or the other side of the second substrate into a plurality of spherical nanocrystals at equal intervals; Further comprising, a method of forming a uniform nanocrystals. The method of claim 8, The spherical nanocrystals, A method of forming a uniform nanocrystal, which is formed by heat treatment in a gas atmosphere of 10 Torr or less. The method of claim 7, wherein The first or second inclination angle satisfies the following equation, 0 ° <Θ≤tan ^-1 (B / A) Where Θ is the first or second tilt angle, B is the height of the first or second mask layer, A is a distance from one side of the first mask layer to one side of the second mask layer. The method of claim 10, The first nanocrystal forming material is formed on at least two sides on one side of the second substrate spaced apart according to the first inclination angle, each having a different work function according to the first inclination angle, The second nanocrystal forming material may be spaced apart according to the second inclination angle to form at least two on the other side of the second substrate, and form uniform nanocrystals each having a different work function according to the second inclination angle. Way. In the method of forming nanocrystals, (a) forming nanoparticles on the substrate; (b) injecting a plurality of nanocrystal forming materials on the nanoparticles at different incident angles; And (c) removing the nanoparticles; Including, a method of forming a uniform nanocrystals. The method of claim 12, Wherein said nanoparticles are polystyrene nanoparticles. delete delete The method of claim 12, Forming a uniform nanocrystals having different work functions of the plurality of nanocrystal forming materials. A drain and a source spaced apart from the substrate; A first insulating film formed on the substrate; A floating gate formed on the first insulating film and including nanocrystals formed by a method of forming uniform nanocrystals of any one of the first, seventh and twelfth ones; A second insulating film formed on the floating gate; And A control gate formed on the second insulating film; Comprising a device comprising a nanocrystal. The method of claim 17, The nanocrystals are 3 to 5nm diameter, the device comprising a nanocrystal. Drains and sources formed spaced apart on the substrate; A channel connected to the drain and the source; A first insulating layer spaced apart from the drain and the source to surround the channel; A floating gate formed to surround the first insulating layer and including nanocrystals formed by a method of forming uniform nanocrystals of any one of the first, seventh and twelfth ones; A second insulating film formed to surround the floating gate; And A control gate formed to surround the second insulating film; Comprising a device comprising a nanocrystal. The method of claim 19, The nanocrystals are 3 to 5nm diameter, the device comprising a nanocrystal.

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