KR100781894B1 - Method for exposure of semiconductor device - Google Patents

Abstract

A method for exposing a semiconductor device is provided to maximize productivity by performing TIS(Tool Induced Shift) correction in an exposure process. A wafer is loaded in a wafer stage(100). Whether TIS correction is executed is determined(110). When the TIS correction is executed, the wafer is rotated as much as a predetermined angle(120). A first alignment is then executed(130-150). The wafer is recovered from the rotated angle(160). A second alignment is then executed(170-190) and an alignment correction is executed(200). An exposure process is then executed(210). The first and second alignments sequentially execute pre-alignment, search alignment, and fine alignment.

Description

Exposure method for semiconductor devices {Method for Exposure of Semiconductor Device}

1 is a view showing the degree of shift in the optical system according to the rate of change of focus.

2 is a flowchart illustrating a method of exposing a semiconductor device in accordance with an embodiment of the present invention.

In this invention, the exposure method of a semiconductor element is disclosed.

In the case of recent semiconductor devices, high integration is essential for achieving low cost and high quality required for securing competitiveness.

In order to achieve high integration, scale-down including thinning and shortening of gate oxide film thickness and channel length of a transistor device is accompanied, and accordingly, a technology and a manufacturing system of a semiconductor manufacturing process are being developed in various forms.

Processing of wafers for mass production of semiconductor devices is an essential task for constructing electronic circuits having the same pattern on each chip in the wafer.

In such a wafer processing operation, various kinds of films are formed on the surface of each semiconductor wafer in a lot unit, and the operation of selectively etching a specific portion of the wafer using a pattern mask is repeatedly performed.

In general, a photolithography process, which is one of semiconductor manufacturing processes, is performed in order of a coating process, an alignment and exposure process, a developing process, an overlay measuring process, a critical dimension measuring process, and the like.

Here, the coating process and the developing process are usually performed by a spinner (also called a track equipment), and the alignment and exposure process are usually performed by a stepper.

The two equipments are usually referred to as inline equipment because they are connected in-line and perform the above processes one by one, and the coating, alignment, exposure, and developing processes belong to the inline process.

At this time, the stepper equipment measures the alignment degree using the sensor and alignment mark built in the stepper device in order to match the overlap level of each pattern level to be formed to a desired level. After compensation through the internal calculation method, the exposure operation is performed.

Therefore, in the stepper equipment, management of the sensor performance used for the measurement of alignment degree is required in order to keep the performance constant.

Specifically, as shown in FIG. 1, although the data change rate is small in the best focus according to the degree of telecentricity of the exposure apparatus, the asymmetry of the top, bottom, left, and right sides may occur like the coma phenomenon in the defocus area. It may also be necessary to manage the sensor to reduce this effect.

In the conventional method, the optical axis orthogonality of the light source used for the alignment is managed as an important item among the alignment sensor management items. When the optical axis orthogonality is out of the preset range, it is important to affect the degree of alignment. Item.

Therefore, for the alignment sensor management of the stepper equipment, periodic inspections should be performed to finely manage the optical axis orthogonality items that most affect the degree of alignment, or additionally check for abnormalities.

However, such a conventional alignment management method has a problem in that a method for managing a cycle of alignment sensor management is additionally required, or equipment maintenance time for inspection and adjustment is required, thereby lowering the productivity of the semiconductor exposure apparatus.

In addition, since it must be managed through a certain period, there was a problem that it is difficult to prepare for the degree of optical axis orthogonality that occurs before the inspection cycle, these problems affect the degree of overlay of the semiconductor product, the product yield decreases There is a problem that causes.

The present invention maximizes the yield by applying the TIS compensation technique in the management of the sensor used to measure the stepper alignment during the exposure process of the semiconductor device to correct the degree of optical axis orthogonality which has the greatest influence on the degree of the stepper alignment. It is a technical object of the present invention to provide a method for exposing a semiconductor device capable of increasing equipment efficiency.

Exposure method of a semiconductor device according to the present invention comprises the steps of loading a wafer to the wafer stage; Determining whether to execute a tool induced shift (TIS) compensation method; Rotating the wafer by a predetermined angle when it is determined to execute a TIS compensation method; Performing a first alignment process; Repositioning the wafer; Performing a second alignment process: performing alignment correction; And performing an exposure process.

Hereinafter, with reference to the accompanying drawings will be described in detail a preferred embodiment of the present invention.

In the exposure process of the semiconductor device, the wafer is processed in a pre-alignment, search-alignment, and fine alignment process after loading the wafer.

The present invention is to enable the setting in the job (Job), as shown in Figure 2 so that when performing fine alignment can perform a Tool Induced Shift (TIS) compensation function.

This will be described in detail with reference to FIGS. 2 and 3 illustrating an exposure method according to an embodiment of the present invention.

First, the wafer is loaded into the wafer stage (step 100).

Next, when a recipe configured to perform TIS execution is used, it is determined whether to execute TIS (step 110). If it is determined that TIS is executed, the wafer is rotated by a predetermined angle ( Step 120).

In one embodiment, the wafer may be rotated by 170 to 190 degrees, in a preferred embodiment by 180 degrees.

If it is determined that the TIS is not executed, as shown in FIG. 2, since the second alignment process is immediately performed, the pre-alignment (step 170) included in the second alignment process is performed.

After the wafer is rotated by a predetermined angle, a first alignment process is performed, wherein the first alignment process includes pre-alignment (step 130), search alignment (step 140), and fine alignment 150 as described above. Step). At this time, fine alignment is performed in the TIS state.

The pre-alignment is a process of floating the loaded wafer by using air supplied from the lower part of the wafer stage, and then driving a hammer to a portion of the wafer notch to fix the wafer to a desired position. Search alignment is a step of performing a wafer alignment by moving the wafer stage in the X-axis and Y-axis directions, and the fine alignment completes the microscopic movement of the wafer stage in the X-axis and Y-axis directions with a more precise amount of change in the search alignment. Wafer fine alignment is performed.

Since the detailed description of the alignment at each of these steps is well known in the semiconductor manufacturing process, the detailed description is omitted.

After the first alignment process is completed, the wafer is returned to its original position (step 160). Specifically, when the wafer is rotated by 180 degrees in step 120, the wafer is rotated by 180 degrees again.

After that, the second alignment process, which is an alignment process used in the conventional exposure process, is performed. In detail, the pre-alignment (step 170), the search alignment (step 180), and the fine alignment (step 190) are performed.

After all of these second alignment processes are performed, alignment correction is performed (step 200). In the alignment correction process, the alignment measurement value is calculated. At this time, the TIS execution value is compensated, and the mismeasurement portion by the optical axis orthogonal component of the sensor is compensated. Thereafter, an exposure process is performed based on the alignment correction value (operation 210).

In the case of the wafer that has been exposed through this process, the overlay degree of the wafer maintains a reproducible value without being affected by the optical axis orthogonality of the sensor when calculating the alignment measurement value. Even if the optical axis orthogonality variation of the alignment sensor occurs, it is possible to implement an alignment improvement system.

Those skilled in the art to which the present invention pertains will understand that the present invention can be implemented in other specific forms without changing the technical spirit or essential features. For example, when the exposure method according to the embodiment of the present invention is implemented, a limit value holding function may be added to automatically correspond to the TIS measurement value when it falls below the limit value.

Therefore, it is to be understood that the embodiments described above are exemplary in all respects and not restrictive. The scope of the present invention is shown by the following claims rather than the detailed description, and all changes or modifications derived from the meaning and scope of the claims and their equivalent concepts should be construed as being included in the scope of the present invention. do.

As described above, the semiconductor device exposure method according to the embodiment of the present invention performs TIS compensation in the exposure process, thereby improving alignment measurement accuracy even if the optical axis orthogonality of the alignment sensor of the stepper device is changed. .

In addition, it is possible to maximize the productivity improvement by increasing the efficiency of the facility because it is not necessary to constantly check the equipment to check the sensor performance periodically.

In addition, according to the present invention, it is possible to manage the TIS measurement value in real time to manage the management factors in detail, such data can be used as important data for the cause analysis of the difference in overlay degree during the semiconductor process It is effective in managing Cpk and Rework efficiently.

In addition, there is an effect that it is possible to reduce the likelihood that the lot in the process may abnormally flow through the holding function through the threshold set value.

In addition, it is possible to improve the degree of overlay, which is a factor that has a decisive effect on semiconductor yield, thereby increasing the yield of semiconductor devices.

Claims (3)

Loading a wafer into a wafer stage; Determining whether to execute a tool induced shift (TIS) compensation method; Rotating the wafer by a predetermined angle when it is determined to execute a TIS compensation method; Performing a first alignment process; Repositioning the wafer; Performing a second alignment process: Performing alignment correction; And An exposure method of a semiconductor device comprising a step of performing an exposure process. The method of claim 1, The first and second alignment processes are performed by sequentially performing pre-alignment, search alignment, and fine alignment. The method of claim 1, The predetermined angle is 170 to 190 degrees exposure method of a semiconductor device.

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