KR100774558B1 - Measure method for nanotopography - Google Patents

Abstract

A nanotopography measuring method is provided to simplify a measuring process by measuring the flatness and nanotopography using only a flatness measuring system. A thickness of a wafer is measured(S310), and then plural sites of predetermined size are defined on the wafer(S320). A reference plane is set to the sites(S330), and then a distance between the reference plane and a surface of the wafer corresponding to each site is calculated to determine a flatness parameter(S340). The sites are reset as circular analysis areas having a constant diameter(S350), and the reference plane is reset as a back side(S360). A distance between the reset reference plane and a surface of the wafer corresponding to each analysis area to determine a parameter corresponding to nanotopography(S370).

Description

Nano Topography Measurement Method {MEASURE METHOD FOR NANOTOPOGRAPHY}

1 is a flowchart illustrating a conventional method of measuring flatness.

2 is a flowchart illustrating a method of measuring conventional nanotopography.

3 is a flow chart illustrating a method of measuring flatness and nanotopography of the present invention.

4 and 5 are simulation pictures comparing the image of the nanotopography measured by the nanotopography measuring method of the present invention and the nanotopography measured by the conventional nanotopography measuring system.

6 is a graph showing the correlation between the SBIR calculated by the nanotopography measuring method using the flatness measuring system of the present invention and the nanotopography parameter PV calculated by the conventional nanotopography measuring system.

<Description of the symbols for the main parts of the drawings>

100: Wafer

The present invention relates to a nanotopography measuring method using a flatness measuring system, and more particularly, to measure flatness using a flatness measuring system and simultaneously measure nanotopography, thereby saving cost and time. The present invention relates to a nanotopography measurement method using a flatness measurement system.

Silicon wafers can be very important in that the semiconductor device technology itself is inseparable from the physical properties of the silicon wafer, as well as the external aspect that takes up more than half of the fixed material required for the semiconductor. Silicon wafers not only vary depending on the type of semiconductor device, but also require different quality levels in the same device, such as a memory. Quality evaluation items required for such semiconductor devices have conventionally been limited to several items such as resistance according to the electrical characteristics of the device and flatness according to the degree of integration.

Recently, however, the quality of silicon wafers that are optimized according to the characteristics of semiconductor processes such as thermal process, device isolation, contact formation, and metallization are required, and new adoption such as CMP (Chemical Mechanical Polishing) and STI (Shallow Trench Isolation) Depending on the process, new quality items, such as nanotopography, are required.

Generally, silicon wafers are produced by thinly cutting single crystal ingots in the vertical direction. When cutting the wafer, the shape loss such as surface damage or warping occurs due to the loss of thickness, and in order to reduce the wafer thickness, it is highly evaluated through various steps such as lapping, grinding, etching, and polishing. A wafer with burnt and high reflective surfaces can be obtained.

By the way, when such shaping is usually performed, warpage or surface curvature occur in the wafer. The warping or warping degree of the wafer in the molding process can be defined as flatness, which is defined as the flatness of the entire wafer after setting one reference plane for the entire surface of the wafer. After the wafer is defined as a plurality of local sites, it is divided into site flatness indicating the degree of warping for each site.

Flatness can be expressed using various parameters, such as Warp, Bow, Total Thickness Variation (TTV), Global Backside Ideal focal plane Range (GBIR), Site Backside Ideal focal plane Range (SBIR), Site Backside Ideal focal plane Deviation (SBID), Site Frontside Least Squares focal plane Range (SFLR), and Site Frontside Least Squares focal plane Deviation (SFLD) are used. This parameter is determined primarily as a function of the deviations calculated between the reference plane and the angular displacements using the thickness data of the wafer measured from the capacitive type sensor at non-contact.

The surface curvature of the wafer has a shape in which various sine waves having various wavelengths and amplitudes are synthesized. Nanotopography and surface roughness may be defined to represent the degree of surface curvature.

Wavelength is the distance from one sinusoid to an adjacent peak or from one valley to an adjacent valley in the sinusoidal curve, and is generally a curve of a wafer having a wavelength of 0.2 to 20 mm. The surface roughness of the wafer is defined as nanotopography, the wavelength of 0.25mm or less. In nanotopography, surface curvature data is measured by using a phase shift of light reflected by irradiating light onto a wafer surface, and then filtering only a sine wave having a specific wavelength. It is measured by a method of calculating nanotopography parameters by setting a circular analysis area from the filtered data. Peak to Valley (PV), a nanotopography parameter, is defined as the distance from the peak to the valley for each analysis area.

On the other hand, roughness is generally measured continuously using an interferometer or stylus using a laser, or by the attraction between the probe and the surface atoms. After measuring the fine height difference of the surface continuously by using the repulsive force is filtered by a specific wavelength of the filter (Filtering) to a specific wavelength and then measured by the method of calculating the surface roughness parameters such as Rms, Rt. For surface roughness measurement, optical and mechanical surface roughness profiles and atomic force microscopes are mainly used.

In particular, the flatness and nanotopography of silicon wafers are known to affect photolithography during the device manufacturing process, so the flatness and nanotopography measurements are important inspection items of the wafer. Hereinafter, a method of measuring conventional flatness and nanotopography will be described.

1 is a schematic flowchart illustrating a conventional method of measuring flatness, and FIG. 2 is a schematic flowchart illustrating a method of measuring conventional nanotopography.

As shown in the drawing, a wafer may be manufactured through cutting, polishing, grinding, etching, and polishing from a single crystal ingot. When cutting the manufactured wafer, the wafer is bent or distorted and bending occurs in the cut surface. Such methods of measuring bending or warping and surface curvature include a method of measuring flatness and a method of measuring nanotopography, respectively.

First, the flatness measurement method is as follows.

The thickness of the manufactured wafer is measured using a non-contact capacitive type sensor for measuring flatness (S110).

Then, a plurality of local sites are defined on the wafer to calculate flatness parameters such as SBIR, SBID, SFLR, and SFLD (S120).

Next, a reference plane for each site is set (S130).

Next, a flatness parameter is calculated by calculating a deviation between the reference plane and the respective displacements (S140).

In addition, the nanotopography measurement method is as follows.

The manufactured wafer measures surface bending data by analyzing a phase shift of light reflected after irradiating light onto the wafer surface using an interferometer for nanotopography measurement (S210).

The surface bending data filters only a sine wave having a wavelength corresponding to nanotopography (S220).

Next, a circular analysis area is set from the filtered data (S230).

Finally, the distance from the peak to the curvature for each analysis area is measured to calculate nanotopography parameters (S240).

The semiconductor device may be manufactured using the calculated flatness parameters, nanotopography parameters, and other inspection processes to check and use quality.

As described above, the flatness is calculated from the thickness measurement data of the wafer and the nanotopography is obtained from the surface bending data using phase shift. In other words, in order to measure the flatness and nanotopography of the wafer, different expensive precision measuring instruments were used, and each had to undergo a separate measurement procedure.

Meanwhile, in the wafer manufacturing process, lapping, grinding, etching, mirror polishing, etc. are continuously performed in order to reduce bending caused in the cutting process. It is important to understand the changes in nanotopography and to select wafers with abnormal nanotopography properties so that further processing does not proceed.

However, since the conventional nanotopography measurement system uses a phase change of light reflected from the wafer surface, there are many limitations depending on the wafer surface state such as contamination, gloss, surface roughness, and the like in the measurement. For this reason, it is impossible to measure nanotopography in the pre-polishing process by the conventional nanotopography measuring method.

According to an object of the present invention for solving the above problems, a method of measuring nanotopography using a flatness measurement system capable of measuring nanotopography while measuring the flatness of the wafer through a flatness measurement system In providing.

Another object of the present invention is to provide a method for measuring nanotopography using a flatness measurement system capable of accurately determining the degree of bending of a wafer cut surface without restriction of wafer surface conditions such as contamination, glossiness, and surface roughness.

Another object of the present invention is to measure the nanotopography prior to the photolithography process during the semiconductor process, it is possible to screen the defective wafers in advance, thereby avoiding unnecessary waste of time and cost flatness The present invention provides a method for measuring nanotopography using a measurement system.

According to a preferred embodiment of the present invention for achieving the above object of the present invention, in the nanotopography measuring method using a flatness measuring system for determining the degree of warping and bending of the wafer of the present invention, the thickness of the wafer Measuring, a plurality of defining a site (Site) of a predetermined size on the surface of the wafer, setting a reference surface for the site, the reference surface and the wafer surface corresponding to each site Calculating a flatness parameter by calculating a distance between the steps, resizing the site to a circular analysis area having a predetermined diameter, and resetting the reference plane to the backside of the wafer. resetting to a flat back surface and the wafer corresponding to the reset reference plane and the respective analysis area Calculating a distance between the surface and a step of calculating a parameter that corresponds to the nano-topography.

Measuring the thickness of the wafer includes measuring a distance between an upper surface and a lower surface of the wafer using a capacitive sensor.

The step of defining the plurality of sites is a step of dividing the surface of the wafer into a plurality of regions. When the size of the site is increased, the characteristics of the large wavelength can be observed. Of course you can. The reference plane may be bent to correspond to each of the plurality of sites. Alternatively, the reference plane may be formed in a virtual plane on the wafer and commonly applied to the plurality of sites.

Meanwhile, the flatness may be largely divided into global flatness and site flatness according to a measuring method.

The global flatness refers to the flatness over the entire surface of the wafer. The reference plane for measuring the global flatness may be set through a 3-point focal plane or a best-fit focal plane and a least-square focal plane.

Various flatness parameters such as Total Thickness Variation (TTV), Total Indicated Reading (TIR), Focal Plane Deviation (FPD), Bow / Warp, and Taper / Roll-off calculated through the reference planes can be calculated. The global flatness can be measured using the FIG. Parameter, and the calculation process is well known and will be omitted.

The flatness parameter used to measure the global flatness is as follows.

The total thickness variation (TTV) refers to the difference between the thickest and the thinnest regions from the reference surface. That is, the TTV is a numerical value indicating how inclined the wafer is geometrically.

The total indicated reading (TIR) refers to the sum of the absolute values of the highest point and the lowest point from the reference plane. In other words, the TIR is a numerical value indicating how uneven the wafer is geometrically. Here, the TTV and the TIR have the same value when measured on the same backside reference plane.

The FPD (Focal Plane Deviation) means a larger value among the highest (Peak) and the lowest (Valley) in the TIR.

The Bow / Warp represents the degree of warpage of the wafer. In particular, the Bow is a value representing the difference between the reference plane and the center of the wafer, and has a (+) value when the center is located above the reference plane and a (-) value when it is located below.

The Taper represents the thickness difference between one side of the wafer and the other side of the flat, and the positive value is thicker on one side and the negative value is thinner on one side. Indicates.

The roll-off is a value indicating whether the overall shape of the wafer is concave or convex, and it can be seen that a positive value is a wafer having a convex shape and a negative value is a concave shape.

In addition, the site flatness means the flatness at each site divided by a predetermined size of the surface of the wafer.

The site flatness may use flatness parameters such as Site Total Indicated Reading (STIR) and Site Focal Plane Deviation (SFPD). The Site Total Indicated Reading (STIR) means the sum of absolute values of the highest point and the lowest point from the reference plane at each site. In other words, the STIR is a numerical value indicating how rugged each site of the wafer is.

In addition, the SFPD (Site Focal Plane Deviation) means a larger value among the highest (Peak) and the lowest (Valley) in the STIR.

The method for measuring site flatness through the flatness parameters of the STIR and SFPD is well known and thus will be omitted.

On the other hand, the STIR and SFPD can be divided into several sub-parameters according to the method of setting, measuring and calculating the reference plane, the frontside reference plane, front focus method, frontside reference plane, center focus method, backside reference plane , Center Focus method and Site Best Fit method.

The frontside reference plane and front focus method is a method of calculating the STIR / SFPD by focusing each site, using the global frontside focal plane of the wafer as a reference plane. The flatness parameter obtained through this is Site Frontside 3 Point focal plane Range (SF3R) / Site Frontside 3 Point focal plane Deviation.

The Site Best Fit method is a method of calculating the STIR / SFPD using a Frontside Reference Best-Fit Focal Plane in each site as a reference plane. The flatness parameter thus obtained is Site Frontside Least Squares focal plane Deviation (SFLR) / Site Frontside Least Squares focal plane Deviation (SFLD).

The backside reference plane and center focus method is a method of calculating the STIR / SFPD using a plane parallel to the global ideal reference plane of the wafer and passing through the center of the corresponding site as a reference plane. The flatness parameter thus obtained is SBIR (Site Backside Ideal focal plane Range) / SBID (Site Backside Ideal focal plane Deviation).

In particular, in the present invention, it is preferable to use the SBIR (Site flatness, Back reference surface, Ideal reference plane, Range) parameter obtained by setting the reference plane as the (Ideal flat back surface) to measure the nanotopography with the flatness. desirable.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings, but the present invention is not limited or limited by the embodiments.

3 is a flowchart illustrating a method of measuring flatness and nanotopography of the present invention. As shown in the figure, first, the thickness of the wafer is measured using a non-contact capacitive type sensor (S310). That is, the overall shape of the wafer may be calculated by measuring the distance between the upper surface and the lower surface of the wafer through the capacitive type sensor. In addition, respective profiles are formed for the front and rear surfaces of the calculated wafer.

Next, a plurality of local sites are defined on the wafer (S320), and then a reference plane is set corresponding to the defined sites (S330). Since the reference plane is set corresponding to each site, the surface of the wafer is formed by bending, so that the reference plane is also formed by the curved surface. In addition, the reference plane may be set to one flat surface.

Next, the deviation from the reference plane to the surface of the wafer defined as the site is calculated to measure the SBIR, which is a flatness parameter (S340). Of course, in this process, in addition to the SBIR, SFLR, TTV, Bow, Warp, etc. may be calculated. On the other hand, the method for calculating the SBIR is a known theory and will be omitted.

Next, the site is reset to the surface of the wafer (S350). The size of the reset site is set to a size corresponding to the diameter of the analysis area used in the conventional nanotopography measuring system. At this time, a relational expression such as Equation 1 is established between the analysis area diameter D and the length L of one side of the site having a square shape.

Next, the reference plane is reset to the rear face (Ideal flat back surface) of the wafer so as to correspond to each of the reset sites (S360).

Next, a new SBIR is calculated by calculating a deviation between the back surface of the wafer and the surface of the wafer defined as the reset site (S370).

The wafer may be used in semiconductor device fabrication after checking the quality through various inspection processes in addition to the measurement of flatness and nanotopography.

Meanwhile, according to the reset site and the reference plane and the deviation calculation method, various parameters such as SBID, SFLR, or SFLD can be calculated in addition to SBIR, but only the SBIR shows correlation with PV, a nanotopography parameter. This will be described later.

4 and 5 are simulation pictures comparing the image of the nanotopography measured by the nanotopography measuring method of the present invention and the nanotopography measured by the conventional nanotopography measuring system.

As shown in the drawing, it can be seen that the images measured using the flatness measuring system of the present invention are similar to each other when comparing the images measured by the conventional nanotopography measuring system.

That is, when comparing (a), (b) and (c) in FIG. 4 and (A), (B) and (C) in FIG. 4, respectively, the pattern of the pattern drawn on the surface of the wafer 100 is compared. It can be seen that the changes in shape and color are similar to each other.

Therefore, based on the image measured using the flatness measuring system of the present invention, it can be proved that the image measured in the nanotopography measuring system using the phase difference of the conventional light can be used.

6 is a graph showing the correlation between the SBIR calculated by the nanotopography measuring method using the flatness measuring system of the present invention and the nanotopography parameter PV calculated by the conventional nanotopography measuring system.

As shown in the graph, the linear regression analysis results are plotted based on several experiments, and the SBIR calculated based on the reset site and the reference plane in the nanotopography measurement method using the flatness measurement system is the same wafer. It can be seen that there is a constant correlation with the PV obtained using the conventional nanotopography measuring system. That is, it can be seen that as the value of the SBIR increases, the PV also increases proportionally.

In this way, based on the parameters obtained using the flatness measurement system, the parameters obtained using the conventional nanotopography measurement system are correlated with each other. Graphics can be measured simultaneously. In particular, even in the pre-polishing process, which is not observed with the conventional nanotopography measuring system, the yield change can be increased by predicting the bending change corresponding to the nanotopography.

As described above, according to the present invention, after measuring the thickness data of the wafer using the flatness measuring system to calculate the flatness parameter, the plurality of local sites on the wafer are further analyzed by the nanotopography measuring system on the thickness data. By resetting to the size corresponding to the area diameter, and by setting the reference plane of each site to the back of the wafer to calculate the SBIR, a parameter corresponding to the nanotopography, a measurement method requiring two different conventional high-precision precision measurement equipment Instead, it is possible to measure flatness and nanotopography with a single device of the flatness measurement system, thereby rethinking the efficiency of the device, and saving time and money by simplifying wafer inspection procedures.

In addition, the nanotopography measuring method of the wafer using the flatness measuring system has the effect of predicting the bending change corresponding to the nanotopography in the process before the mirror polishing, which has not been observed conventionally by using the wafer thickness data. have.

As described above, although described with reference to the preferred embodiment of the present invention, those skilled in the art various modifications and variations of the present invention without departing from the spirit and scope of the invention described in the claims below I can understand that you can.

Claims (6)

In the nanotopography measuring method of the wafer using the flatness measuring system, Measuring a thickness of the wafer; Defining a plurality of sites, which are areas of a constant size, on a surface of the wafer; Setting a reference plane for the site; Calculating a flatness parameter by calculating a distance between the reference plane and the wafer surface corresponding to each site; Resetting each of the plurality of sites to a circular analysis area having a predetermined diameter; Resetting the reference plane to the back side of the wafer; And Calculating a parameter corresponding to nanotopography by calculating a distance between the reset reference plane and the wafer surface corresponding to each analysis area; Nanotopography measuring method using a flatness measuring system comprising a. The method of claim 1, Measuring the thickness of the wafer Calculating an overall shape of the wafer by measuring a distance between an upper surface and a lower surface of the wafer using a capacitive sensor; And Forming respective profiles for front and back shapes of the wafer; Nanotopography measuring method using a flatness measuring system comprising a. The method of claim 1, The reference plane is a nanotopography measuring method using a flatness measurement system, characterized in that the bending is set to correspond to each of the plurality of sites. The method of claim 1, The reference plane is a nanotopography measuring method using a flatness measurement system, characterized in that formed in the virtual plane on the wafer is commonly applied to the plurality of sites. The method of claim 1, The reference plane is a nanotopography measuring method using a flatness measurement system, characterized in that defined by setting the back (Ideal flat back surface) of the wafer. The method of claim 1, The flatness parameter is SBIR (Site Back Side Ideal Range) nanotopography measuring method using a flatness measuring system, characterized in that.

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