KR100761622B1 - Inductor and method of manufacturing the same - Google Patents

Inductor and method of manufacturing the same Download PDF

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KR100761622B1
KR100761622B1 KR1020010081931A KR20010081931A KR100761622B1 KR 100761622 B1 KR100761622 B1 KR 100761622B1 KR 1020010081931 A KR1020010081931 A KR 1020010081931A KR 20010081931 A KR20010081931 A KR 20010081931A KR 100761622 B1 KR100761622 B1 KR 100761622B1
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inductor
coil
coil part
forming
core
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KR1020010081931A
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KR20030051033A (en
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양준석
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매그나칩 반도체 유한회사
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01FMAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F27/00Details of transformers or inductances, in general
    • H01F27/24Magnetic cores
    • H01F27/245Magnetic cores made from sheets, e.g. grain-oriented
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01FMAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F17/00Fixed inductances of the signal type 
    • H01F17/0006Printed inductances
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01FMAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F17/00Fixed inductances of the signal type 
    • H01F17/0006Printed inductances
    • H01F17/0013Printed inductances with stacked layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01FMAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F27/00Details of transformers or inductances, in general
    • H01F27/24Magnetic cores
    • H01F27/245Magnetic cores made from sheets, e.g. grain-oriented
    • H01F27/2455Magnetic cores made from sheets, e.g. grain-oriented using bent laminations
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01FMAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F41/00Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties
    • H01F41/14Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for applying magnetic films to substrates
    • H01F41/18Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for applying magnetic films to substrates by cathode sputtering
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01FMAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F17/00Fixed inductances of the signal type 
    • H01F17/0006Printed inductances
    • H01F2017/0086Printed inductances on semiconductor substrate

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Coils Or Transformers For Communication (AREA)

Abstract

본 발명은 인덕터 및 그의 제조 방법에 관한 것으로, 하부 금속층 상에 인덕터의 코일부를 형성한 후 상기 코일부를 덮도록 연자성 물질로 코어부를 형성함으로써 상기 코어부가 코일부를 감싸는 형태의 불연속 박막 인덕터를 MLM(Multi Level Metal)에 삽입시킨 효과를 얻어 인덕터의 효율을 개선시킬 수 있는 인덕터 및 그의 제조 방법을 제시한다.
The present invention relates to an inductor and a method of manufacturing the same. A discontinuous thin film inductor in which a core portion surrounds a coil portion by forming a core portion of a soft magnetic material to cover the coil portion after forming a coil portion of an inductor on a lower metal layer. The present invention provides an inductor and a method of manufacturing the same, which can improve the efficiency of the inductor by obtaining the effect of inserting the MLM into a multi-level metal.

반도체 소자, 인덕터, 코일부, 코어부, 자성층, 연자성Semiconductor element, inductor, coil part, core part, magnetic layer, soft magnetic

Description

인덕터 및 인덕터의 제조 방법{Inductor and method of manufacturing the same} Inductor and method of manufacturing the same             

도 1a 내지 도 1h는 본 발명의 실시예에 따른 인더터의 제조 방법을 설명하기 위해 도시한 반도체 소자의 단면도.
1A to 1H are cross-sectional views of a semiconductor device for explaining a method of manufacturing an inductor according to an embodiment of the present invention.

<도면의 주요 부분에 대한 부호의 설명>       <Explanation of symbols for main parts of the drawings>

10 : 반도체 기판 12 : 층간 절연막  10 semiconductor substrate 12 interlayer insulating film

14 : 금속층 16 : 하드 마스크  14 metal layer 16: hard mask

18, 28 : 포토레지스트 패턴 20 : 코일부  18 and 28 photoresist pattern 20 coil portion

22 : 질화막 24 : FOX  22: nitride film 24: FOX

26 : 제 1 TEOS 30 : 자성층  26: first TEOS 30: magnetic layer

32 : 코어부 34 : 제 2 TEOS  32: core 34: second TEOS

36 : 패시베이션층
36: passivation layer

본 발명은 인덕터 및 그의 제조 방법에 관한 것으로, 단일 금속층에 집적화된 인덕터(Inductor)에 코어부를 삽입하여 인덕터의 효율을 개선시킬 수 있는 인덕터 및 그의 제조 방법에 관한 것이다.
The present invention relates to an inductor and a method for manufacturing the same, and relates to an inductor and a method for manufacturing the same that can improve the efficiency of the inductor by inserting a core part into an inductor integrated in a single metal layer.

일반적으로, 인덕터(Inductor)는 페라이트 코어(Ferrite core)를 기본으로 하며, 그 본체에 금속으로 이루어진 코일을 권선하여 인덕턴스(Inductance)를 형성하는 소자로서, 코어에 감긴 도선에 전류를 흐르게 하여 전자기를 발생하는 소자로 널리 사용하고 있다. 또한, 인덕터는 주파수에 비례하여 임피던스(Impedance)가 높아지는 특성을 이용하여 해당 주파수 대역에 있는 잡음(Noise)을 제거하거나, 캐패시터(Capacitor)와 함께 공진회로를 구성하여 특정 주파수 대역의 신호를 증폭하는 소자로 저항 및 캐패시터와 함께 전기/전자 회로의 중요한 구성 요소를 이루는 수동 소자이다. In general, an inductor is based on a ferrite core, and is a device that forms an inductance by winding a coil made of metal on its body. It is widely used as a generating device. Also, the inductor removes noise in a corresponding frequency band by using an impedance that is increased in proportion to frequency, or amplifies a signal of a specific frequency band by forming a resonance circuit together with a capacitor. A device is a passive device that, together with resistors and capacitors, forms an important component of an electrical / electronic circuit.

최근, 개인용 휴대 통신의 발전으로 인해 RF 아날로그 IC(Radio Frequency Analog Integrated Circuit)의 개발이 필요함에 따라 수동 소자인 인덕터(Inductor)의 집적화가 요구되고 있다. 인덕터의 집적화는 MLM(Multi Level Metal) 부분의 금속층(Metal layer)을 패터닝하여 코일(Coil)을 형성하는 방법으로 진행되고 있다. Recently, due to the development of personal mobile communication, the development of an RF analog IC (Radio Frequency Analog Integrated Circuit) is required, and the integration of an inductor, which is a passive element, is required. Integration of the inductor is progressing by forming a coil by patterning a metal layer of a multi-level metal (MLM) part.

상기에서 설명한 바와 같이, 인덕터는 기본적으로 자기장을 형성하기 위한 코일부와, 코일부에 의해 형성된 자기장을 저장하기 위한 코어부로 분리된다. 이에 따라, 인덕터는 코일부로부터 형성된 자기장을 저장하는 코어부의 저장 능력에 따라 그 특성이 결정되는데, 일반적으로, 코어부의 효율은 투자율(Permeability)에 의해 좌우된다. As described above, the inductor is basically divided into a coil portion for forming a magnetic field and a core portion for storing a magnetic field formed by the coil portion. Accordingly, the characteristics of the inductor are determined according to the storage capacity of the core part for storing the magnetic field formed from the coil part. In general, the efficiency of the core part depends on the permeability.

그러나, 최근 널리 사용되는 인덕터의 집적화 기술은 탑(Top) 금속층을 이용한 코일 부분만 존재하며, 코어 부분은 존재하지 않는다. 이는 진공 상태의 코어를 가지고 있는 것과 같으며, 단지 '1'이하의 투자율을 갖게 된다. 투자율이 높은 연자성 박막을 사용하여 코어 부분을 형성하면 인덕터의 효율을 개선할 수 있다. 이러한 코어 부분을 형성하기 위해 많은 방법이 연구되어졌으나, 일반적으로 2개 이상의 금속층을 이용하여 인덕터가 형성됨으로 레이아웃(Layout)이 복잡해지는 문제가 있다.
However, recently, the inductor integration technology widely used has only a coil part using a top metal layer, and no core part. It is like having a core in a vacuum, with a permeability of just under '1'. Forming the core portion using a high magnetic permeability thin film can improve the efficiency of the inductor. Many methods have been studied to form such a core part, but there is a problem in that the layout is complicated by forming an inductor using two or more metal layers.

따라서, 본 발명은 상기 문제를 해결하기 위해 안출된 것으로, 소정의 구조가 형성된 반도체 기판 상에 인덕터의 코일부를 형성한 후 상기 코일부를 덮도록 연자성 물질로 코어부를 형성함으로써 상기 코어부가 코일부를 감싸는 형태의 불연속 박막 인덕터를 MLM(Multi Level Metal)에 삽입시킨 효과를 얻어 인덕터의 효율을 개선시킬 수 있는 인덕터 및 그의 제조 방법을 제공함에 그 목적이 있다.
Accordingly, the present invention has been made to solve the above problems, and after forming the coil part of the inductor on a semiconductor substrate having a predetermined structure, the core part is formed by forming a core part with a soft magnetic material to cover the coil part. It is an object of the present invention to provide an inductor capable of improving the efficiency of an inductor by obtaining an effect of inserting a discontinuous thin film inductor having a portion encapsulated into a multi-level metal (MLM), and a method of manufacturing the same.

상술한 목적을 달성하기 위해 본 발명은 소정의 구조가 형성된 반도체 기판 상에 형성되는 코일부; 상기 코일부를 보호하기 위해 상기 코일부를 덮도록 형성되는 질화막; 및 상기 질화막 상에 형성되어 상기 코일부에 의해 유도되는 자기장을 저장하기 위한 코어부를 포함하여 이루어지는 것을 특징으로 한다. The present invention to achieve the above object is a coil portion formed on a semiconductor substrate having a predetermined structure; A nitride film formed to cover the coil part to protect the coil part; And a core part formed on the nitride film to store a magnetic field induced by the coil part.

또한, 본 발명은 소정의 구조가 형성된 반도체 기판 상에 코일부를 형성하는 단계; 상기 코일부를 덮도록 질화막을 형성하는 단계; 및 상기 질화막 상에 코어부를 형성하는 단계를 포함하여 이루어지는 것을 특징으로 한다.
In addition, the present invention comprises the steps of forming a coil portion on a semiconductor substrate having a predetermined structure; Forming a nitride film to cover the coil unit; And forming a core part on the nitride film.

이하, 첨부된 도면을 참조하여 본 발명의 바람직한 실시예를 상세히 설명하기로 한다.
Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

도 1a 내지 도 1h는 본 발명의 실시예에 따른 인덕터의 제조 방법을 설명하기 위해 도시한 인덕터의 단면도이다. 1A to 1H are cross-sectional views illustrating an inductor for explaining a method of manufacturing an inductor according to an exemplary embodiment of the present invention.

도 1a를 참조하면, 소정의 능동 소자를 포함한 금속 배선층(도시하지 않음)이 형성된 반도체 기판(10) 상에 층간 절연막(Inter Metal Dielectric; IMD)(12)을 형성한 후 그 상부에 인덕터의 코일로 사용되는 금속층(14)과 하드 마스크(16)를 순차적으로 형성한다. Referring to FIG. 1A, an intermetal dielectric (IMD) 12 is formed on a semiconductor substrate 10 on which a metal wiring layer (not shown) including a predetermined active element is formed, and then a coil of an inductor thereon. The metal layer 14 and the hard mask 16 to be used are sequentially formed.

이어서, 전체 구조 상부에 포토레지스트(Photoresist)를 도포한 후 포토 마스크를 이용한 노광공정을 실시하여 하드 마스크(16)의 소정 부위가 오픈되도록 포토레지스트 패턴(18)을 형성한다. Subsequently, after the photoresist is applied over the entire structure, an exposure process using a photo mask is performed to form a photoresist pattern 18 so that a predetermined portion of the hard mask 16 is opened.                     

도 1b를 참조하면, 포토레지스트 패턴(18)을 이용한 식각공정을 실시하여 층간 절연막(12)의 소정 부위가 노출되도록 하드 마스크(16) 및 금속층(14)을 순차적으로 패터닝하여 인덕터의 코일부(20)를 형성한다. Referring to FIG. 1B, the hard mask 16 and the metal layer 14 are sequentially patterned so as to expose a predetermined portion of the interlayer insulating layer 12 by performing an etching process using the photoresist pattern 18 to form a coil part of the inductor ( 20).

도 1c를 참조하면, 후속 코어부를 형성하기 위한 식각공정시 코일부(20) 사이로 오픈되는 층간 절연막(12)의 손상을 최소화하며, 코일부(20)와 코어부가 직접 접촉되는 것을 방지하기 위해 인덕터의 코일부(20)를 포함한 전체 구조 상부에 질화막(22)을 형성한다. 이때, 질화막(22)은 증착 온도가 비교적 높은 LPCVD(Low Pressure Chemical Vapor Deposition) 대신 증착 온도가 낮은 PECVD(Plasma Enhanced Chemical Vapor Deposition)를 이용하여 형성한다. Referring to FIG. 1C, an inductor is formed to minimize damage of the interlayer insulating layer 12 that is opened between the coil units 20 during an etching process for forming a subsequent core unit, and to prevent the coil unit 20 and the core unit from directly contacting each other. The nitride film 22 is formed in the upper part of the whole structure including the coil part 20 of FIG. In this case, the nitride film 22 is formed by using a plasma enhanced chemical vapor deposition (PECVD) having a low deposition temperature instead of a low pressure chemical vapor deposition (LPCVD) having a relatively high deposition temperature.

도 1d 및 도 1e를 참조하면, 전체 구조 상부에 IMD(Inter Metal Dielectric)물질로 사용되는 FOX(24) 및 제 1 TEOS(26)을 순차적으로 형성한다. 이어서, 인덕터의 코일부(20)가 형성되는 부위가 오픈되도록 포토레지스트 패턴(28)을 형성한 후 이 포토레지스트 패턴(28)을 마스크로 이용하고, 질화막(22)을 식각 베리어층으로 이용한 식각공정을 실시하여 코일부(20)와 대응되는 질화막(22)이 노출되도록 제 1 TEOS(26) 및 FOX(24)을 순차적으로 패터닝한다. 이때, 식각공정은 질화막과 산화막 또는 산화막과 금속층 간의 식각 선택비가 우수한 가스를 사용한다. 1D and 1E, a FOX 24 and a first TEOS 26, which are used as an inter metal dielectric (IMD) material, are sequentially formed on the entire structure. Subsequently, after forming the photoresist pattern 28 so that the portion where the coil part 20 of the inductor is formed is opened, the photoresist pattern 28 is used as a mask, and the etching layer using the nitride film 22 as an etching barrier layer is used. By performing the process, the first TEOS 26 and the FOX 24 are sequentially patterned to expose the nitride film 22 corresponding to the coil unit 20. In this case, the etching process uses a gas having excellent etching selectivity between the nitride film and the oxide film or the oxide film and the metal layer.

도 1f를 참조하면, 소정의 포토레지스트 스트립공정을 실시하여 포토레지스트 패턴(28)을 제거한 후 전체 구조 상부에 자성층(30)을 형성한다. 이때, 자성층(30)은 니켈(Ni)과 철(Fe)이 80:20의 비율로 함유된 이원합금인 퍼몰로이(Permalloy)를 이용하거나, 코발트(Co)계의 비정질 연자성 또는 철(Fe)계 의 초미세 결정질 연자성을 이용한 스퍼터링(Sputtering) 방법으로 증착한다.Referring to FIG. 1F, a predetermined photoresist strip process is performed to remove the photoresist pattern 28 to form a magnetic layer 30 over the entire structure. In this case, the magnetic layer 30 is made of Permolloy, a binary alloy containing nickel (Ni) and iron (Fe) in a ratio of 80: 20, or cobalt-based amorphous soft magnetic or iron (Fe). It is deposited by sputtering method using ultra-fine crystalline soft magnetic property.

도 1g를 참조하면, 전체 구조 상부에 CMP(Chemical Mechanical Polishing)을 이용한 평탄화 공정을 실시하여 제 1 TEOS(26)가 노출되도록 자성층(30)을 연마하여 코일부(20)을 덮도록 코어부(32)을 형성한다. Referring to FIG. 1G, a planarization process using chemical mechanical polishing (CMP) is performed on an entire structure to polish the magnetic layer 30 so that the first TEOS 26 is exposed to cover the coil unit 20. 32).

도 1h를 참조하면, 전체 구조 상부에 제 2 TEOS(34)을 형성한 후 그 상부에 실리콘 산화막을 이용하여 패시베이션층(36)을 형성한다. 이후의 공정은 일반 공정과 동일함으로 여기서는 생략하기로 한다.
Referring to FIG. 1H, after forming the second TEOS 34 over the entire structure, the passivation layer 36 is formed using the silicon oxide film thereon. The subsequent process is the same as the general process and will be omitted here.

본 발명은 소정의 구조가 형성된 반도체 기판 상에 인덕터의 코일부를 형성한 후 상기 코일부를 덮도록 연자성 물질로 코어부를 형성함으로써 상기 코어부가 코일부를 감싸는 형태의 불연속 박막 인덕터를 MLM(Multi Level Metal)에 삽입시킨 효과를 얻어 인덕터의 효율을 개선시킬 수 있다. According to the present invention, after forming a coil part of an inductor on a semiconductor substrate having a predetermined structure, a core part is formed of a soft magnetic material so as to cover the coil part. The efficiency of the inductor can be improved by inserting an effect into the level metal.

또한, 본 발명은 인덕터의 효율을 개선시킴으로써 인덕터의 크기를 줄일 수 있어 RF 아날로그 IC(Radio Frequency Analog Integrated Circuit)의 크기를 감소시킬 수 있다. In addition, the present invention can reduce the size of the inductor by improving the efficiency of the inductor, thereby reducing the size of the RF analog IC (Radio Frequency Analog Integrated Circuit).

Claims (5)

반도체 기판상에 형성된 코일부;A coil part formed on the semiconductor substrate; 상기 코일부를 보호하기 위해 상기 코일부를 포함한 상기 반도체 기판 표면에 형성되는 질화막; 및A nitride film formed on a surface of the semiconductor substrate including the coil part to protect the coil part; And 상기 질화막 상에 상기 코일부를 감싸는 형태로 형성되어 상기 코일부에 의해 유도되는 자기장을 저장하기 위하여 니켈과 철이 함유된 이원합금인 퍼몰로이, 코발트계의 비정질 연자성 및 철계의 초미세 결정질 연자성 중 어느 하나의 물질로 이루어진 코어부를 포함하여 이루어지는 것을 특징으로 하는 인덕터. Permolloy, a binary alloy containing nickel and iron to store the magnetic field induced by the coil part on the nitride film to enclose the coil part, and the ultra-fine crystalline soft magnetic property of iron based on cobalt. An inductor comprising a core part made of any one of materials. 제 1 항에 있어서, The method of claim 1, 상기 니켈과 철의 함유 비율이 80:20인 것을 특징으로 하는 인덕터.Inductor, characterized in that the content ratio of nickel and iron is 80:20. 제1항에 있어서,The method of claim 1, 상기 물질은 스퍼터 방법에 의해 형성되는 것을 특징으로 하는 인덕터. And the material is formed by a sputtering method. 삭제delete 삭제delete
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JPH11354323A (en) * 1998-06-05 1999-12-24 Mitsubishi Electric Corp Inductor
JP2000323656A (en) * 1999-05-10 2000-11-24 Nippon Telegr & Teleph Corp <Ntt> Semiconductor device and manufacture thereof
JP2001044778A (en) * 1999-07-27 2001-02-16 Fuji Electric Co Ltd Composite electronic component
KR20030046747A (en) * 2001-12-06 2003-06-18 삼성전자주식회사 Inductor element having high quality factor

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11354323A (en) * 1998-06-05 1999-12-24 Mitsubishi Electric Corp Inductor
JP2000323656A (en) * 1999-05-10 2000-11-24 Nippon Telegr & Teleph Corp <Ntt> Semiconductor device and manufacture thereof
JP2001044778A (en) * 1999-07-27 2001-02-16 Fuji Electric Co Ltd Composite electronic component
KR20030046747A (en) * 2001-12-06 2003-06-18 삼성전자주식회사 Inductor element having high quality factor

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