KR100759568B1 - Apparatus for driving plasma display panel - Google Patents

Abstract

The present invention provides a first control switch for driving a display panel by applying power to each of a plurality of electrode lines from at least one level of power, and controlling a connection of a first level of power to each of the electrode lines. A switching element having a second control switch for controlling the connection of each of the electrode lines and a power source of a second level, the switching element being included in at least one of the first control switch and the second control switch; Heat dissipation means attached to the switching element to absorb heat of the switching element; And an insulating pad interposed between the switching element and the heat dissipation means and including an insulating pad.

Description

Apparatus for driving plasma display panel

1 is a perspective view showing an internal structure of a three-electrode surface discharge plasma display panel to which a driving device of a display panel according to the present invention is applied.

FIG. 2 is a block diagram schematically illustrating an apparatus for driving a plasma display panel for driving the plasma display panel of FIG. 1.

FIG. 3 is a circuit diagram schematically illustrating a Y driver in the driving apparatus of the plasma display panel of FIG. 2.

Figure 4 is a preferred embodiment according to the present invention, is a view schematically showing that the heat dissipation means and the insulating pad is attached to the switching element of the Y drive unit of FIG.

FIG. 5 is a graph schematically showing the EMI level of the 30MHz ~ 100MHz band according to the thickness of the insulating pad of FIG.

<Explanation of symbols for main parts of the drawings>

22: logic controller, 23: address driver,

24: X driver, 25: Y driver.

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a driving device of a display panel, and more particularly to a driving device of a display panel for displaying an image by repetitive discharge for a short time by using electrical energy of high voltage and high frequency.

As flat panel display devices, plasma display panels (PDPs), which are easy to manufacture large panels, have attracted attention. A plasma display panel is a display device that displays an image by using a discharge phenomenon. In general, a plasma display panel can be classified into a direct current type and an alternating current type according to the type of driving voltage. Due to the disadvantages, the development of the AC plasma display panel has been made a lot.

An AC plasma display panel includes a three-electrode AC surface discharge type plasma display panel having three electrodes and driven by an AC voltage. A typical three-electrode surface discharge type plasma display panel is composed of a multi-layered plate, which is spatially advantageous because it can provide a thinner, lighter, and wider screen than a conventional cathode ray tube (CRT).

As an example of a conventional plasma display panel, a three-electrode surface discharge plasma display panel, a driving apparatus thereof, and a driving method thereof are disclosed in US Patent No. 6,744,218 (name: Method of driving a plasma display panel in which the). width of display sustain pulse varies). Matters related to the plasma display panel, the driving apparatus, and the driving method disclosed in the above-mentioned US patent are included in the present specification, and a detailed description thereof will be omitted.

The plasma display panel includes a plurality of display cells formed in an area where the sustain electrode and the address electrode cross each other, and one display cell includes three discharge cells (red, green, and blue). The gray level of the image is expressed by adjusting the discharge state.

In order to express the gray scale of the plasma display panel, one frame applied to the plasma display panel may be configured with eight subfields having different emission counts to express 256 gray scales. That is, in the case where the image is to be displayed with 256 gray levels, the frame period (16.67 ms) corresponding to 1/60 second is divided into eight subfields. There is a reset period, an address period, and a sustain discharge period in each of the sub-fields to drive the plasma display panel.

Power is applied to each of the electrode lines in each driving period. Power is applied to each of the electrode lines by a driving device of the plasma display panel. In order to control the application of power to the respective electrode lines, a plurality of switching elements are used in the driving device of the plasma display panel. In each switching element, a large number of switching operations occur in a short time, and the switching operation controls the flow of the high voltage current.

At this time, a sudden current change occurs in a short time due to the switching operation of the switching elements, and thus there is a problem in that the radiation amount of EMI (Electro-Magnetic Interference) is increased.

The present invention provides a drive device for a display panel that can reduce the EMI radiation amount caused by the sudden change in the current flowing through the switching element by limiting the range of the thickness of the insulating pad used between the switching elements and the heat radiating means. For the purpose of

The present invention provides a first control switch for driving a display panel by applying power to each of a plurality of electrode lines from at least one level of power, and controlling a connection of a first level of power to each of the electrode lines. A switching element having a second control switch for controlling the connection of each of the electrode lines and a power source of a second level, the switching element being included in at least one of the first control switch and the second control switch; Heat dissipation means attached to the switching element to absorb heat of the switching element; And an insulating pad interposed between the switching element and the heat dissipation means and including an insulating pad.

It is preferable that the thickness d of the insulating pad has a value of 0.01 mm ≦ d ≦ 0.2 mm.

It is preferable that the voltage of the said first level is 210V or more.

Preferably, the switching element is mounted on a PCB substrate, and the heat dissipation means is electrically connected to a ground terminal on the PCB substrate.

It is preferable that the switching element is an Insulated Gate Bipolar Transistor (IGBT) or a Metal-Oxide Semiconductor Field Effect Transistor (MOSFET).

It is preferable that a discharge cell is formed in an area where the X electrode line, the Y electrode line and the address electrode line intersect, and the electrode lines are at least one of the X electrode line, the Y electrode line, and the address electrode line.

A logic controller for generating a drive control signal including an X drive control signal, a Y drive control signal, and an A drive control signal according to an image signal to be displayed, and processing and applying the X drive control signal to the X electrode lines; An X driver, a Y driver for processing the Y driving control signal and applying the Y electrode lines, and an address driver for processing and applying the A driving control signal to the address electrode lines, may be provided.

According to another aspect of the present invention, a discharge cell is formed in an area where an X electrode line, a Y electrode line, and an address electrode line intersect, and a power is applied to each of the plurality of Y electrode lines from at least one level or more of power. A first control switch for driving a panel and controlling a connection of a power supply of a first level and each of the Y electrode lines, and a second control for controlling a connection of the power of the second Y electrode line and a second level; A switching element having switches and included in at least one of the first control switch and the second control switch; Heat dissipation means attached to the switching element to absorb heat of the switching element; And an insulating pad interposed between the switching element and the heat dissipation means and including an insulating pad.

According to the present invention, by limiting the range of the thickness of the insulating pad used between the switching elements used in the driving device of the display panel and the heat dissipation means, it is possible to reduce the EMI radiation amount due to the rapid change of the current flowing through the switching element. have.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 is an internal perspective view showing the structure of a three-electrode surface discharge plasma display panel.

Referring to the drawings, between the front and rear glass substrates 10 and 13 of the surface discharge plasma display panel 1, the address electrode lines A _{R1 to} A _Bm , the dielectric layers 11 and 15, and the Y electrode line (Y ₁ to Y _n ), X electrode lines (X ₁ to X _n ), fluorescent layer 16, partition wall 17, and magnesium monoxide (MgO) layer 12 as a protective layer are provided.

The address electrode lines A _{R1 to} A _Bm are formed in a predetermined pattern on the front side of the rear glass substrate 13. The lower dielectric layer 15 is applied to the entire surface in front of the address electrode lines A _{R1 to} A _Bm . In front of the lower dielectric layer 15, barrier ribs 17 are formed in a direction parallel to the address electrode lines A _{R1 to} A _Bm . The partition walls 17 function to partition the discharge area of each discharge cell 14 and to prevent optical cross talk between the discharge cells 14. The fluorescent layer 16 is formed on the inner surface of the space formed between the lower dielectric layer 15 and the partition walls 17 formed on the rear glass substrate 13.

The X electrode lines X ₁ to X _n and the Y electrode lines Y ₁ to Y _n have a constant pattern on the rear side of the front glass substrate 10 to be orthogonal to the address electrode lines A _{R1 to} A _Bm . Is formed. Each intersection sets a corresponding discharge cell 14. Each X electrode line (X _{1 to} X _n ) and each Y electrode line (Y _{1 to} Y _n ) are combined with a transparent electrode line made of a transparent conductive material such as indium tin oxide (ITO) and a metal electrode line for increasing conductivity. Is formed. Here, the X electrode lines X ₁ to X _n become sustain electrodes in the respective discharge cells 14, and the Y electrode lines Y ₁ to Y _n correspond to scan electrodes in the respective discharge cells 14. And become an address electrode in the discharge cell 14 of each of the address electrode lines A _{R1 to} A _Bm .

In this case, scan electrodes are sequentially applied to select discharge cells to be displayed on the Y electrode lines.

FIG. 2 is a block diagram schematically illustrating an apparatus for driving a plasma display panel for driving the plasma display panel of FIG. 1.

Referring to the drawing, the driving device 20 of the plasma display panel 1 includes an image processor 21, a logic controller 22, an address driver 23, an X driver 24, and a Y driver 25. do. The image processor 21 converts an external analog image signal into a digital signal to generate internal image signals. The internal video signal may be 8 bits of red (R), green (G), and blue (B) image data, a clock signal, a vertical and horizontal synchronization signal, and the like. The logic controller 22 generates driving control signals S _A , S _Y , and S _X according to an internal image signal from the image processor 21.

In this case, the driving unit such as the address driver 23, the X driver 24, and the Y driver 25 receives input from the driving control signals S _A , S _Y , and S _X , and generates respective driving signals. The applied driving signal to each of the electrode lines.

That is, the address driver 23 applies the display data signal corresponding to the address signal S _A input from the logic controller 22 to the address electrode lines. The X driver 24 processes the X driving control signal S _X input from the logic controller 22 and applies the X driving control signal S _X to the X electrode lines. The Y driver 25 processes the Y driving control signal S _Y input from the logic controller 22 and applies it to the Y electrode lines.

FIG. 3 is a circuit diagram schematically illustrating a Y driver in the driving apparatus of the plasma display panel of FIG. 2.

Referring to the drawings, the driving device of the plasma display panel according to the present invention may include a sustain pulse applying unit 610, a first switching unit 605, a second switching unit 617, a third voltage applying unit 607, and a third device. And a fourth voltage applying unit 609, a scan switching unit 601, a fifth voltage applying unit 603, a sixth voltage applying unit 615, and an energy recovery unit 620.

The sustain pulse applying unit 610 includes a first voltage applying unit 611 and a ground voltage applying unit 612. The first voltage applying unit 611 outputs a first voltage Vs to the first node N1 in order to output a driving signal to the Y electrodes Cp. The ground voltage applying unit 612 outputs a ground voltage Vg to the first node N1.

The first switching unit 605 includes a seventh switching element S7 having one end connected to the first node N1 and the other end connected to the second node N2. The second switching unit 617 includes a fifteenth switching element S15 having one end connected to the second node N2 and the other end connected to the third node N3.

The third voltage applying unit 607 is connected between the first node N1 and the second node N2, and gradually raises the first voltage Vs by the third voltage Vset to allow the second node N2 to be used. Output to The fourth voltage applying unit 609 is connected to the third node N3 and gradually lowers the first voltage Vs to the fourth voltage Vnf and outputs the same to the third node N3.

The scan switching unit 601 includes a first scan switching element SC1 and a second scan switching element SC2 connected in series with each other. At this time, the fourth node N4 formed between the first scan switching element SC1 and the second scan switching element SC2 is connected to the Y electrodes (the second end of the Cp) of the panel. The scan switching unit 601 may be configured as a scan IC that can control the application of power to the Y electrode lines. In this case, the scan switching unit 601 may include a plurality of scan ICs so that all the Y electrode lines are divided into a plurality of blocks, and one scan IC may be connected to each block.

The fifth voltage applying unit 603 includes a fifth voltage source Vsch and is connected to the first scan switching device SC1 to output the fifth voltage Vsch to the first scan switching device SC1. The sixth voltage applying unit 615 is connected to the third node N3 and the second scan switching device SC2 and outputs a sixth voltage Vscl.

The energy recovery unit 620 accumulates charges in the panel Cp or stores charges in the panel Cp.

The first voltage applying unit 611 includes an eighth switching element S8 having one end connected to the first voltage source Vs and the other end connected to the first node N1. The ground voltage applying unit 612 includes a ninth switching element S9 having one end connected to the ground and the other end connected to the first node N1. The sustain pulse applying unit 610 alternately turns on the eighth switching element S8 and the ninth switching element S9 to generate a sustain pulse.

The third voltage applying unit 607 includes a fourth capacitor C4 and a tenth switching element S10. One end of the fourth capacitor C4 is connected to the first node N1 and the other end thereof is connected to the third voltage source Vset. The tenth switching element S10 is connected between the third voltage source Vset and the second node N3.

The seventh switching element S7 of the first switching unit 605 is turned off, the fifteenth switching element S15 of the second switching unit 617 is turned on, and the seventh switching element S612 of the first voltage applying unit 612 is turned on. 8 The switching element S9 is turned on, the tenth switching element S10 of the third voltage applying unit 607 is turned on, and the first scan switching element SC1 of the scan switching unit 601 is turned on. As a result, the voltage rises gradually from the fifth voltage Vsch by the third voltage Vset, and finally the rising maximum voltage Vset + Vsch is output to all the Y electrode lines through the fourth node N4.

The fourth voltage applying unit 609 includes an eleventh switching element S11 having one end connected to the third node N3 and the other end connected to the fourth voltage source Vnf. The eighth switching element S8 of the first voltage applying unit 611, the seventh switching element S7 of the first switching unit 605, the fifteenth switching element S15 of the second switching unit 617, and the fifth When the eleventh switching element S11 of the four voltage applying unit 609 is turned on, a voltage gradually lowered from the first voltage Vs to the fourth voltage Vnf is output to the third node N3.

The sixth voltage applying unit 615 includes a twelfth switching element S12 connected between the third node N3 and the sixth voltage source Vscl. The twelfth switching element S12 is turned on and outputs a sixth voltage Vscl to the third node N2.

When the first scan switching device SC1 of the scan switching unit 601 is turned on and the second scan switching device SC2 is turned off, the fifth voltage Vsch passes through the fourth node N4 to Y electrodes. It is output to (the second stage of Cp). On the other hand, when the first scan switching device SC1 of the scan switching unit 601 is turned off and the second scan switching device SC2 is turned on, each voltage output to the third node N3, that is, the first voltage is turned on. Vs, the ground voltage Vg, the fourth voltage Vnf, and the sixth voltage Vscl are output to the Y electrodes Cp through the fourth node N4.

The energy recovery unit 620 includes an energy storage unit 621, an energy recovery switching unit 622, and an inductor L2. The energy storage unit 621 stores the charge in the panel Cp. The energy recovery switching unit 622 is connected to the energy storage unit 621 and accumulates the charge stored in the energy storage unit 621 in the panel Cp or stores the charge in the panel Cp in the energy storage unit 621. Control what you do One end of the inductor L2 is connected to the energy recovery switching unit 622 and the other end thereof is connected to the first node N1.

The energy storage unit 621 may include a capacitor C5 to store the charge in the panel. The energy recovery switching unit 622 includes a thirteenth switching element S13 and a fourteenth switching element S14 having one end connected to the energy storage unit 621 and the other end connected to the inductor L2. In addition, two third and fourth diodes D3 and D4 having different directions may be connected between the thirteenth switching element S13 and the fourteenth switching element S14.

Figure 4 is a preferred embodiment according to the present invention, is a view schematically showing that the heat dissipation means and the insulating pad is attached to the switching element of the Y drive unit of FIG. FIG. 5 is a graph schematically showing the EMI level of the 30MHz ~ 100MHz band according to the thickness of the insulating pad of FIG.

Referring to the drawings, the driving apparatus of the plasma display panel according to the present invention includes a first voltage applying unit 611 and a ground voltage applying unit 612 as in the sustain pulse applying unit 610 of FIG. 3. do. The first voltage applying unit 611 includes a first control switch S8, and the ground voltage applying unit 612 includes a second control switch S9, and each of the sustain voltage Vs and the Y electrode line, respectively. The application of the ground voltage Vg is controlled.

The first control switch S8 and the second control switch S9 are composed of a switching element 41. The switching element 41 is preferably an Insulated Gate Bipolar Transistor (IGBT) or a Metal-Oxide Semiconductor Field Effect Transistor (MOSFET).

The switching element 41 is mounted on the PCB substrate 42. In addition, the radiating means 43 is attached to the switching element 41, and the insulating means 44 of the insulator is interposed between the switching element 41 and the radiating means 43. The heat dissipation means 43 is attached to the switching element 41, absorbs heat generated by the switching operation of the switching element 41 and discharges it to the outside.

The heat dissipation means 43 is electrically connected to the ground terminal on the PCB substrate 42 so that only a current necessary for discharging is applied to the electrode of the panel, and the noise of the high frequency component is transferred to the PCB substrate 42 through the heat dissipation means 43. It flows through the ground through. Therefore, it is possible to reduce the EMI radiation amount caused by the rapid change of the current flowing through the switching element 41.

At this time, the insulating pad 44 is a capacitor is formed between the drain (drain) terminal and the heat dissipation means 43 is connected to the ground terminal of the FET device used as the switching element 41 is a current. Even when the sustain discharge voltage is increased, the thickness of the insulating pad 44 needs to be limited so that the noise component can be absorbed to the ground terminal through the insulating pad 44.

As a result, an electrical path is formed to the ground terminal of the PCB substrate 42 through the switching element 41, the insulating pad 44, and the heat dissipation means 43. Therefore, EMI radiation in the 30 MHz to 100 MHz band generated by the switching element 41 is emitted through the ground end of the PCB substrate 42 through the insulating pad 44 and the heat dissipation means 43.

Meanwhile, as shown in FIG. 5, as the thickness d of the insulating pad 44 increases, the EMI level in the 30 MHz to 100 MHz band increases. Therefore, it is preferable that the thickness d of the insulating pad has a value of 0.01 mm ≦ d ≦ 0.2 mm. In this case, when the thickness d of the insulating pad is less than 0.01 mm, the insulating element may not be insulated from the heat dissipating means 43, so the thickness d of the insulating pad is preferably 0.01 mm or more.

In addition, when the thickness d of the insulating pad is larger than 0.2 mm, the impedance is increased so that the current of the high frequency component does not flow back to the ground terminal of the PCB substrate 42 but is applied to the panel and radiated. Therefore, it is preferable that the thickness d of the insulating pad has a value of 0.01 mm ≤ d ≤ 0.2 mm in order to reduce the EMI radiation amount caused by the rapid change of the current flowing by the switching operation of the switching element 41.

In particular, the limitation of the thickness d of the insulating pad according to the present invention is more meaningful because a sudden current change may occur when the voltage applied through the switching element 41 is 210V or more.

According to the driving device of the display panel according to the present invention, by limiting the range of the thickness of the insulating pad used between the switching elements used in the driving device of the display panel and the heat dissipation means, it is possible to prevent a sudden change in the current flowing through the switching element. EMI emissions can be reduced.

Although the present invention has been described with reference to one embodiment shown in the accompanying drawings, it is merely an example, and those skilled in the art may realize various modifications and equivalent other embodiments therefrom. I can understand. Accordingly, the true scope of protection of the invention should be defined only by the appended claims.

Claims (13)

delete The display panel is driven by applying power to each of the plurality of electrode lines from at least one or more levels of power. A first control switch controlling a connection of a power supply of a first level and each of the electrode lines, and a second control switch controlling a connection of the power of a second level with each of the electrode lines; A switching element included in at least one of the first control switch and the second control switch; Heat dissipation means attached to the switching element to absorb heat of the switching element; And An insulation pad interposed between the switching element and the heat dissipation means, the insulation pad comprising an insulator; And a thickness d of the insulating pad has a value of 0.01 mm ≤ d ≤ 0.2 mm. The method of claim 2, And a driving device of the display panel of which the voltage at the first level is 210V or more. The method of claim 2, The switching device is mounted on the PCB substrate, the heat dissipation means is a driving device of the display panel is electrically connected to the ground terminal on the PCB substrate. The method of claim 2, And a switching device is an Insulated Gate Bipolar Transistor (IGBT) or a Metal-Oxide Semiconductor Field Effect Transistor (MOSFET). The method of claim 2, A discharge cell is formed in a region where the X electrode line, the Y electrode line and the address electrode line intersect, and the electrode lines are at least one of the X electrode line, the Y electrode line, and the address electrode line. The method of claim 6, A logic controller for generating a drive control signal including an X drive control signal, a Y drive control signal, and an A drive control signal in accordance with an image signal to be displayed; An X driving unit processing the X driving control signal and applying the same to the X electrode lines; A Y driver for processing the Y driving control signal and applying the same to the Y electrode lines; And an address driver for processing the A drive control signal and applying the A drive control signal to the address electrode lines. delete A discharge cell is formed in an area where the X electrode line, the Y electrode line and the address electrode line intersect, and the display panel is driven by applying power to each of the plurality of Y electrode lines from at least one level of power. First control switches for controlling a connection of a power supply of a level and each of the Y electrode lines, and second control switches for controlling a connection of the respective Y electrode lines and a power of a second level, A switching element included in at least one of the first control switch and the second control switch; Heat dissipation means attached to the switching element to absorb heat of the switching element; And An insulation pad interposed between the switching element and the heat dissipation means, the insulation pad comprising an insulator; And a thickness d of the insulating pad has a value of 0.01 mm ≤ d ≤ 0.2 mm. The method of claim 9, And a driving device of the display panel of which the voltage at the first level is 210V or more. The method of claim 9, The switching device is mounted on the PCB substrate, the heat dissipation means is a driving device of the display panel is electrically connected to the ground terminal on the PCB substrate. The method of claim 9, And a switching device is an Insulated Gate Bipolar Transistor (IGBT) or a Metal-Oxide Semiconductor Field Effect Transistor (MOSFET). The method of claim 9, A logic controller for generating a drive control signal including an X drive control signal, a Y drive control signal, and an A drive control signal in accordance with an image signal to be displayed; An X driving unit processing the X driving control signal and applying the same to the X electrode lines; A Y driver for processing the Y driving control signal and applying the same to the Y electrode lines; And an address driver for processing the A drive control signal and applying the A drive control signal to the address electrode lines.

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