KR100744656B1 - Method for forming capacitor - Google Patents

Abstract

The present invention provides a capacitor suitable for reducing leakage current characteristics and increasing capacitance, wherein the capacitor of the present invention comprises a lower electrode; A (Hf-Ti) ON dielectric film on the lower electrode; And an upper electrode on the dielectric film, and according to the present invention, when the (Hf-Ti) ON dielectric film is manufactured to form a capacitor device, not only the grain formation formed in a single dielectric film deposition process can be suppressed, but the Hf- Each of the three-component oxide film structures in which the O-Ti, Hf-ON, and Ti-ON bonds are shared can more effectively enhance leakage current suppression and breakdown voltage strength.

Dielectric Film, (Hf-Ti) ON, MIM Capacitor

Description

Capacitor Manufacturing Method {METHOD FOR FORMING CAPACITOR}

1 is a cross-sectional view showing the structure of a capacitor according to the prior art,

2 is a view showing a capacitor manufacturing process according to a first embodiment of the present invention,

3 is a view showing a capacitor manufacturing process according to a second embodiment of the present invention;

4 is a schematic diagram of atomic layer deposition illustrating a process of forming a dielectric film of a capacitor according to a first and second embodiment of the present invention;

5A to 5C are views illustrating a capacitor manufacturing process according to a third embodiment of the present invention;

6 is a schematic diagram of atomic layer deposition illustrating a process of forming a dielectric film of a capacitor according to a third embodiment of the present invention;

7A and 7B are sectional views showing a capacitor structure to which an embodiment of the present invention is applied.

* Explanation of symbols for the main parts of the drawings

21: lower electrode 22: dielectric film

23: upper electrode

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to semiconductor manufacturing techniques, and more particularly, to a method of manufacturing capacitors in semiconductor devices.

Recently, as the integration of memory products is accelerated by the rapid development of miniaturized semiconductor process technology, the unit cell area is greatly reduced, and the operating voltage is reduced.

On the other hand, the charging capacity required for the operation of the memory element, despite the reduction in the cell area, sufficient capacity of 25 fF / cell or more is continuously required to prevent the occurrence of soft errors and shortening of the refresh time. have.

Under these circumstances, TiN electrodes and HfO ₂ are limited because polysilicon-insulator-polysilicon (SIS) -type capacitors employing aluminum oxide (Al ₂ O ₃ ) dielectric films are limited in securing charge capacity for next-generation DRAM products of 512M or more. The development of capacitors in the form of MIS (Metal-Insulator-Polysilicon) employing a / Al ₂ O ₃ dielectric layer or MIM type employing an HfO ₂ / Al ₂ O ₃ / HfO ₂ dielectric layer is the mainstream.

However, these capacitors can be expected that the equivalent oxide (T _ox: Equivalent Oxide Thickness) The thickness of the current limit level is 12Å 70㎚ grade metal wiring process is 25fF / cell or more cells in the charge capacity semiconductor DRAM Product is applied because of the following ( Securing cell capacity is virtually difficult unless it changes the structure of the charge storage electrode to increase the area of the charge storage electrode.

1 is a cross-sectional view showing the structure of a capacitor according to the prior art.

As shown in FIG. 1, a dielectric film 12 is formed on the lower electrode 11. The dielectric film 12 uses Ta ₂ O ₅ (tantalum oxide film), HfO ₂ (hafnium oxide film) or ZrO ₂ (zirconium oxide film), and a single film or a mixed film thereof is used. Subsequently, the upper electrode 13 is formed on the dielectric film 12.

However, when the TiN film is used as the lower electrode, when the equivalent oxide film is lowered to 10 kΩ or less, the leakage current of the MIM capacitor is generated at about 1 fA / cell. It is a difficult situation.

The present invention has been proposed to solve the above problems of the prior art, and an object thereof is to provide a method for manufacturing a capacitor suitable for reducing leakage current characteristics and increasing capacitance.

A capacitor of the present invention for achieving the above object provides a lower electrode, a (Hf-Ti) ON dielectric film on the lower electrode, and an upper electrode on the dielectric film.

In addition, the capacitor manufacturing method of the present invention includes forming a lower electrode, forming a (Hf-Ti) ON dielectric film on the lower electrode, and forming an upper electrode on the dielectric film.

In addition, the capacitor manufacturing method of the present invention comprises the steps of forming a lower electrode, performing a first plasma annealing in a nitrogen gas containing atmosphere, forming a (Hf-Ti) O dielectric film on the lower electrode, nitrogen gas containing Performing a second plasma annealing in an atmosphere, forming an upper electrode on the (Hf-Ti) O dielectric film, and performing a post-treatment annealing to form a (Hf-Ti) ON dielectric film.

Hereinafter, the most preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art can easily implement the technical idea of the present invention. .

2 is a view showing a capacitor manufacturing process according to a first embodiment of the present invention.

As shown in FIG. 2, the (Hf-Ti) ON dielectric layer 22 is formed on the lower electrode 21, and the upper electrode 23 is formed on the (Hf-Ti) ON dielectric layer 22.

First, the lower electrode 21 uses a metal material such as doped polysilicon or TiN. Subsequently, a (Hf-Ti) ON dielectric film 22 is formed on the lower electrode 21.

At this time, the (Hf-Ti) ON dielectric film 22 contains nitrogen gas after depositing a hafnium oxide film (HfO ₂ , 22a) by atomic layer deposition (ALD) on the lower electrode 21. proceeds to a plasma annealing (plasma NH ₃ annealing).

Subsequently, the titanium oxide films TiO ₂ and 22b are deposited on the hafnium oxide film 22a by atomic layer deposition (ALD), followed by plasma annealing containing nitrogen gas. The hafnium oxide film 22a and the titanium oxide film 22b are alternately deposited at 10 kPa or less, and the plasma annealing process is repeatedly performed in an NH ₃ atmosphere before and after each thin film deposition, thereby performing 50 to 150 kPa. A (Hf-Ti) ON dielectric film 22 of thickness is formed. This is a process of inducing Hf-ON and Ti-ON bonds by incorporating nitrogen gas into the Hf-Ti-O film.

Subsequently, not only the hafnium oxide film 22a or the titanium oxide film 22b, but also the plasma annealing for incorporating nitrogen into the lower electrode 21 surface or adsorbing the surface to the surface of the lower electrode 21 has a pressure of 0.1 to 10 torr and a substrate to 200 to 500 ° C. Into the chamber maintaining the temperature, NH ₃ flows a flow rate of 25 to 250 sccm.

Alternatively, plasma annealing is performed for 1 second to 1 minute in a chamber in which glow charge is generated by applying RF power of 100 to 500 mW in an N ₂ or (N ₂ / H ₂ ) atmosphere.

Next, the upper electrode 23 is formed on the (Hf-Ti) ON dielectric film 22. The upper electrode 23 uses one metal material selected from the group of TiN, Ru, TaN, W, WN, and Pt.

3 is a view showing a capacitor manufacturing process according to a second embodiment of the present invention.

As shown in FIG. 3, the (Hf-Ti) ON dielectric layer 22 is formed on the lower electrode 21, and the upper electrode 23 is formed on the (Hf-Ti) ON dielectric layer 22.

First, the lower electrode 21 uses a metal material such as doped polysilicon or TiN. Subsequently, a (Hf-Ti) ON dielectric film 22 is formed on the lower electrode 21.

At this time, the (Hf-Ti) ON dielectric film 22 contains nitrogen gas after depositing a titanium oxide film (TiO ₂ , 22a) on the lower electrode 21 by atomic layer deposition (ALD). proceeds to a plasma annealing (plasma NH ₃ annealing).

Subsequently, the hafnium oxide films HFO ₂ and 22b are deposited on the titanium oxide film 22a by atomic layer deposition (ALD), followed by plasma annealing containing nitrogen gas. In this order, the titanium oxide film 22a and the hafnium oxide film 22b are alternately deposited at 10 kPa or less.

At this time, before and after each thin film deposition, the plasma annealing treatment is repeatedly performed in an atmosphere containing nitrogen gas to form a (Hf-Ti) ON dielectric film 22 having a thickness of 50 to 150 kPa. This is a process of inducing Hf-O-N and Ti-O-N bonds by incorporating nitrogen gas into the Hf-Ti-O film.

Subsequently, not only the titanium oxide film 22a or the hafnium oxide film 22b, but also the plasma annealing for incorporating nitrogen into the lower electrode 21 surface or adsorbing the surface to the substrate, has a pressure of 0.1 to 10 torr and a substrate to 200 to 500 ° C. Into the chamber maintaining the temperature, NH ₃ flows a flow rate of 25 to 250 sccm.

Alternatively, plasma annealing is performed for 1 second to 1 minute in a chamber in which glow charge is generated by applying RF power of 100 to 500 mW in an N ₂ or (N ₂ / H ₂ ) atmosphere.

Next, the upper electrode 23 is formed on the (Hf-Ti) ON dielectric film 22. The upper electrode 23 uses any metal material selected from the group of TiN, Ru, TaN, W, WN, and Pt.

4 is a schematic diagram of atomic layer deposition illustrating a process of forming a (Hf-Ti) ON dielectric layer of a capacitor according to first and second embodiments of the present invention.

Prior to this, atomic layer deposition (ALD), as is known, first supplies a source gas to chemically adsorb a layer of source onto the substrate surface, and the extra physically adsorbed sources are used to purge the purge gas. After flowing and purging, supply a reaction gas to one layer of the source to chemically react one source and the reaction gas to deposit the desired atomic layer thin film, and the excess reaction gas flows through the purge gas to purge The thin film is deposited on a periodic basis. In the atomic layer deposition method (ALD) described above, a stable thin film can be obtained as well as a uniform thin film by using a surface reaction mechanism.

In addition, since the source gas and the reaction gas are separated from each other and sequentially injected and purged, it is known to suppress particle generation by gas phase reaction compared to chemical vapor deposition (CVD).

As shown in FIG. 4, A structure in which a hafnium oxide film and a titanium oxide film are stacked on the lower electrode is repeated a predetermined number of times to form a (Hf-Ti) ON dielectric film having a thickness of 50 to 150 Å.

First, the hafnium oxide film has a unit cycle (Halfnium source gas injection (first step), purge gas injection (second step), reactive gas injection (third step) and purge gas injection (fourth step)). The atomic layer deposition process is repeated to form an atomic layer of a desired thickness.

First, in the first step of injecting a hafnium source gas, the hafnium source uses C ₁₆ H ₃₆ HfO ₄ or other organometallic compound (TDEAHf, TEMAHf) containing Hf as a precursor and flows at a flow rate of 50 to 5000 sccm. Step 2 is a purge gas injection step in which a purge gas is injected into the deposition chamber to remove unreacted zirconium source gas from the chamber.

The purge gas is used alone or in combination with Ar, He or N ₂ gas as the inert gas.

The third step is a reaction gas injection step, in which a reaction gas (0.1 to 1 slm) is injected into the deposition chamber. The reaction gas may be any one selected from the group consisting of O ₃ (concentration: 200 ± 20 g / cm ³ ), O ₂ , plasma O ₂ , N ₂ O, plasma N ₂ O, or water vapor (H ₂ O). .

The reaction gas is injected to induce a reaction between the pre-formed source gas layer and the reaction gas to form a hafnium oxide film (HfO ₂ ).

Subsequently, the fourth step is a purge gas injection step, in which a purge gas is injected into the deposition chamber to remove the unreacted oxygen source and the reaction byproduct.

The purge gas is used alone or in combination with Ar, He or N ₂ gas as the inert gas.

On the other hand, although not shown in the figure, after forming a hafnium oxide film, plasma annealing containing nitrogen gas is performed.

Subsequently, a titanium oxide film is formed on the hafnium oxide film.

Titanium oxide film is an atomic layer comprising titanium source gas injection (first step), purge gas injection (second step), reactive gas injection (third step), and purge gas injection (fourth step) in one cycle. The deposition process is repeated to form an atomic layer of desired thickness.

First, in the first step of injecting the titanium source gas, the titanium source uses Ti [OCH (CH ₃ ) ₂ ] ₄ or other organometallic compound containing titanium as a precursor and flows at a flow rate of 50 to 5000 sccm. The second step is a purge gas injection step, in which a purge gas is injected into the deposition chamber to remove unreacted zirconium source gas from the chamber.

The purge gas is used alone or in combination with Ar, He or N ₂ gas as the inert gas.

The third step is a reaction gas injection step, in which a reaction gas (0.1 to 1 slm) is injected into the deposition chamber. The reaction gas uses any material selected from the group consisting of O ₃ (concentration: 200 ± 20 g / m ³ ), O ₂ , plasma O ₂ , N ₂ O, plasma N ₂ O, or water vapor (H ₂ O). .

The reaction gas is injected to induce a reaction between the previously formed source gas layer and the reaction gas to form a titanium oxide layer (La ₂ O ₃ ).

Subsequently, the fourth step is a purge gas injection step, in which a purge gas is injected into the deposition chamber to remove the unreacted oxygen source and the reaction byproduct.

The purge gas is used alone or in combination with Ar, He or N ₂ gas as the inert gas.

On the other hand, although not shown in the figure, after the titanium oxide film is formed, plasma annealing containing nitrogen gas is performed.

The (Hf-Ti) ON dielectric film alternately deposits the hafnium oxide film and the titanium oxide film formed through the above-described ALD process, and the thickness of each thin film is deposited to 10 Å or less, and the plasma containing nitrogen gas after the formation of each thin film is formed. It forms by carrying out an annealing process.

In addition, in the first embodiment of the present invention, after forming a hafnium oxide film, a titanium oxide film was formed, and in the second embodiment, a titanium oxide film was formed, and then a hafnium oxide film was formed. The deposition order of each thin film may be changed.

5A to 5C are views illustrating a capacitor manufacturing process according to a third embodiment of the present invention.

As shown in FIG. 5A, the (Hf-Ti) O dielectric layer 32 is formed on the lower electrode 31, and the upper electrode 33 is formed on the (Hf-Ti) O dielectric layer 32.

The lower electrode 31 uses a metal material such as doped polysilicon or TiN. Subsequently, a (Hf-Ti) O dielectric film 32 is formed on the lower electrode 31.

The (Hf-Ti) O dielectric film 32 is formed by ALD, MOCVD, or Modified Pulsed CVD, and has a thickness of 50 to 150 Å.

Subsequently, after the (Hf-Ti) O dielectric layer 32 is formed, a process of forming a (Hf-Ti) ON dielectric layer will be described.

First, a plasma annealing containing nitrogen gas is performed on the lower electrode 31, and then a (Hf-Ti) O dielectric film 32 is deposited on the lower electrode 31. Subsequently, plasma annealing containing nitrogen gas is performed.

Subsequently, the upper electrode 33 is deposited on the (Hf-Ti) O dielectric film 32. The upper electrode 33 uses one metal material selected from the group of TiN, Ru, TaN, W, WN, and Pt.

After the upper electrode 33 is formed, nitrogen, which is pile-up at the interface between the lower electrode 31 and the upper electrode 33, is thermally diffused into the (Hf-Ti) O dielectric layer 32. For the purpose, annealing is performed in a temperature range of 500 to 800 ° C. using a furnace or rapid heat treatment (RTP) at atmospheric pressure or reduced pressure. At this time, the content of diffused nitrogen is 10 to 40% level. The heat treatment process as described above is performed to finally form the (Hf-Ti) ON dielectric layer 32a.

Referring to the graph of FIG. 5B, after deposition of the upper electrode and before the post-treatment annealing, nitrogen ions are concentrated at the interface between the lower electrode and the (Hf-Ti) O dielectric layer and at the interface between the (Hf-Ti) O dielectric layer and the upper electrode. It can be seen that the concentration of nitrogen ions located at each interface is high.

Referring to the graph of FIG. 5C, when the upper electrode is deposited, and after annealing, the graph is concentrated on the interface between the lower electrode and the (Hf-Ti) O dielectric layer and the interface between the (Hf-Ti) O dielectric layer and the upper electrode. Existing nitrogen ions are mixed into the (Hf-Ti) O dielectric layer, and the concentration of nitrogen ions accumulated at each interface is lowered. Thus, a (Hf-Ti) ON mixed film is formed after the post-treatment annealing process.

In detail, after forming the upper electrode, the process of thermal diffusion of nitrogen piled up at the interface between the upper electrode and the (Hf-Ti) O dielectric layer, the (Hf-Ti) O dielectric layer and the lower electrode under an inert gas atmosphere, and Nitrogen ions cannot be out-gassed out of the electrode during annealing the upper electrode, and diffuse only into the (Hf-Ti) O thin film to form a (Hf-Ti) ON mixed film.

6 is a schematic diagram of atomic layer deposition illustrating a process of forming a (Hf-Ti) ON dielectric film of a capacitor according to a twenty-third embodiment of the present invention.

first, A method of forming a (Hf-Ti) O dielectric film will be described.

As shown in FIG. 6, a process in which hafnium source gas injection, purge gas injection, titanium source gas injection, purge gas injection, reactive gas injection, and purge gas injection is repeated as a unit cycle (1 Cycle) is repeatedly performed. Form an atomic layer of.

More specifically, in the hafnium source gas injection step, the hafnium source is a precursor of C ₁₆ H ₃₆ HfO ₄ or other organometallic compounds containing TfHf (TDEAHf, TEMAHf), flowed at a flow rate of 50 to 5000 sccm, and the second step. Is a purge gas injection step, which injects a purge gas into the deposition chamber to remove the unreacted hafnium source gas from the chamber.

The purge gas is used alone or in combination with Ar, He or N ₂ gas as the inert gas.

Subsequently, in the step of injecting the titanium source gas, the titanium source uses Ti [OCH (CH ₃ ) ₂ ] ₄ or other organometallic compound containing titanium as a precursor and flows at a flow rate of 50 to 5000 sccm. The second step is a purge gas injection step, which injects a purge gas into the deposition chamber to remove unreacted titanium source gas from the chamber.

The purge gas is used alone or in combination with Ar, He or N ₂ gas as the inert gas.

Next, as a reaction gas injection step, a reaction gas (0.1 to 1 slm) is injected into the deposition chamber. The reaction gas may be any one selected from the group consisting of O ₃ (concentration: 200 ± 20 g / cm ³ ), O ₂ , plasma O ₂ , N ₂ O, plasma N ₂ O, or water vapor (H ₂ O). .

The reaction gas is injected to induce a reaction between the pre-formed source gas layer and the reaction gas to form hafnium titanium oxide (Hf-Ti) O.

Next, as a purge gas injection step, a purge gas is injected into the deposition chamber to remove the unreacted oxygen source and the reaction byproduct.

The purge gas is used alone or in combination with Ar, He or N ₂ gas as the inert gas.

In this manner, the hafnium source gas injection-purge cycle m and the titanium source gas injection-purge cycle n are repeatedly deposited at a predetermined ratio to form a hafnium titanium oxide film.

On the other hand, in the third embodiment, under the hafnium oxide film and titanium oxide film adsorption conditions, 0.25 to 5 seconds while maintaining a constant flow rate of 0.1 to 10 slm into a chamber maintaining a pressure of 0.1 to 10 torr and a substrate temperature of 200 to 500 ° C. Flow, the reaction gas is injected for 0.25-5 seconds, and the purge proceeds for 0.5-10 seconds.

Subsequently, a capacitor structure in which the thin film proposed in the present invention is applied as a capacitor dielectric layer will be described.

7A and 7B are cross- sectional views illustrating a capacitor structure to which an embodiment of the present invention is applied. FIG. 7A shows a cylindrical capacitor, and FIG. 7B shows a concave capacitor.

As shown in FIG. 7A, an interlayer insulating layer 62 is formed on the semiconductor substrate 61, and a storage node contact plug 63 is formed through the interlayer insulating layer 62 and connected to the semiconductor substrate 61. .

Subsequently, a lower electrode 66 is formed on the storage node contact plug 63, and an etch stop layer 64 is formed in contact with both sidewalls of the interlayer insulating layer 62 and the lower electrode 66.

Subsequently, the dielectric film 67 and the upper electrode 68 are sequentially formed on the lower electrode 66.

At this time, the lower electrode 66 uses TiN or Ru, the dielectric film 67 uses (Hf-Ti) ON, and the upper electrode 68 uses doped polysilicon or TiN.

As shown in FIG. 7B, an interlayer insulating layer 62 is formed on the semiconductor substrate 61, and a storage node contact plug 63 is formed through the interlayer insulating layer 62 and connected to the semiconductor substrate 61. .

Subsequently, a storage node oxide layer 65 is formed on the interlayer insulating layer 62 and the storage node contact plug 63 to provide a concave storage node hole. The lower electrode 66 is formed along the inner surface of the storage node hole. Is formed. An etch stop layer 64 is present under the storage node oxide layer 65.

Subsequently, the dielectric film 67 and the upper electrode 68 are sequentially formed on the lower electrode 66.

At this time, the lower electrode 66 uses TiN or Ru, the dielectric film 67 uses (Hf-Ti) ON, and the upper electrode 68 uses doped polysilicon or TiN.

After the upper electrode 68 is formed in FIGS. 7A and 7B, the thermal process and the curing process in a back-end process are performed. H ₂ , N _2, or N _2. / H ₂ atmosphere, wet process and other packaging processes and CVD as a kind of protective or buffer layer to improve structural stability from humidity, temperature or electrical shock during environmental tests involving reliability. Oxide films such as Al ₂ O ₃ , HfO ₂ , Ta ₂ O ₅ , ZrO ₂ , TiO, La ₂ O ₃ , or metal layers such as TiN deposited with silicon nitride films or polysilicon films of about 200 to 1000 으로 by ALD method or deposited by ALD method In addition, 50 to 200 microns thick is formed to form a capping film to protect the MIM capacitor.

As described above, in the multi-component dielectric film such as (Hf-Ti) ON, different heterogeneous HfO and TiO are repeatedly deposited with each other during the ALD deposition process to suppress the formation of grains by the lattice mismatch effect. The surface roughness of the thin film can also be lowered, and the generation of leakage current can be effectively suppressed.

In addition, by incorporating nitrogen ions (Nitrogen) into the thin film for the purpose of enhancing durability against high temperature thermal process, a multi-component oxide film such as (Hf-Ti) ON, which is structurally stable and thermally stable, was prepared. By adopting the (Hf-Ti) ON thin film as the dielectric film of the capacitor, it solves the problems of the HfO ₂ capacitor or the TiO ₂ capacitor employing the conventional single dielectric film, so that the low leakage current characteristics, the high breakdown voltage characteristics and the charge capacity of the capacitor The same effect as the increase can be obtained.

Although the technical idea of the present invention has been described in detail according to the above preferred embodiment, it should be noted that the above-described embodiment is for the purpose of description and not of limitation. In addition, those skilled in the art will understand that various embodiments are possible within the scope of the technical idea of the present invention.

In the present invention described above, when the (Hf-Ti) ON dielectric film is manufactured to form a capacitor device, not only the grain formation formed during the single dielectric film deposition process can be suppressed, but also Hf-O-Ti, Hf-ON and Ti- Each three-component oxide structure with shared ON coupling can more effectively enhance leakage current suppression and breakdown voltage strength.

In particular, since nitrogen in the (Hf-Ti) O dielectric film raises the crystallization temperature, leakage of the (Hf-Ti) ON dielectric film is superior to that of a single HfO ₂ dielectric film or a single TiO ₂ dielectric film even at high temperature thermal processing after the formation of the (Hf-Ti) ON dielectric film. The current does not increase significantly, and the breakdown field strength can also increase.

In addition, when (Hf-Ti) ON dielectric film is applied to a capacitor semiconductor memory device, a large-capacity (30fF / cell) cell capacitance is leaked in a 512M DRAM or higher ultra-high density memory family to which a metal wiring process of 70 nm or less is applied. Can be controlled to 1 fA / cell or less, and the durability and reliability of the capacitor element can be further improved.

Claims (37)

Lower electrode; A (Hf-Ti) ON dielectric film on the lower electrode; And An upper electrode on the dielectric layer To provide a capacitor. The method of claim 1, The (Hf-Ti) ON dielectric film is a capacitor formed to a thickness of 50 ~ 150Å. The method of claim 2, The (Hf-Ti) ON dielectric film is a capacitor formed by atomic layer deposition. The method of claim 1, The lower electrode, A capacitor using any one metallic material selected from the group of doped polysilicon film, TiN and Ru. The method of claim 1, The upper electrode, A capacitor using any one metal based material selected from the group of TiN, Ru, TaN, W, WN and Pt. Forming a lower electrode; Forming a (Hf-Ti) ON dielectric layer on the lower electrode; And Forming an upper electrode on the dielectric layer Capacitor manufacturing method comprising a. The method of claim 6, Forming the (Hf-Ti) ON dielectric film, Forming a (Hf-Ti) O film having a mixed structure of a hafnium oxide film and a titanium oxide film on the lower electrode; And After depositing each film, plasma annealing in a nitrogen atmosphere is performed. Capacitor manufacturing method comprising a. The method of claim 7, wherein The (Hf-Ti) O film is a capacitor manufacturing method of laminating in the order of the hafnium oxide film and the titanium oxide film. The method of claim 7, wherein The (Hf-Ti) O film is a capacitor manufacturing method of forming a laminate in the order of the titanium oxide film and the hafnium oxide film. The method according to claim 8 or 9, The hafnium oxide film, Adsorbing a hafnium source; A purge step for removing an unreacted hafnium source from the hafnium source; Supplying a reaction gas to induce a reaction with the adsorbed hafnium source to form an hafnium oxide film in atomic layer units; And A method of manufacturing a capacitor, wherein a purge step for removing unreacted reaction gas and reaction by-products is performed as a unit cycle and repeated a predetermined number of times. The method of claim 10, Adsorbing the hafnium source, A process for producing a capacitor, using C ₁₆ H ₃₆ HfO ₄ or other organometallic compounds (TDEAHf, TEMAHf) containing Hf as a precursor and flowing at a flow rate of 50 to 5000 sccm. The method according to claim 8 or 9, The titanium oxide film, Adsorbing a titanium source; A purge step for removing unreacted titanium source from the titanium source; Supplying a reaction gas to induce a reaction with the adsorbed titanium source to form a titanium oxide film in atomic layer units; And A method of manufacturing a capacitor, wherein a purge step for removing unreacted reaction gas and reaction by-products is performed as a unit cycle and repeated a predetermined number of times. The method of claim 12, Adsorbing the titanium source, A method for producing a capacitor, using Ti [OCH (CH ₃ ) ₂ ] ₄ or other organometallic compound containing titanium as a precursor and flowing at a flow rate of 50 to 5000 sccm. The method of claim 7, wherein The (Hf-Ti) O film may be formed in a stacked structure in the order of the hafnium oxide film and the titanium oxide film, or may be formed in a stacked structure in the order of the titanium oxide film and the hafnium oxide film. The hafnium oxide film includes a step of adsorbing a hafnium source, a purge step for removing an unreacted hafnium source from the hafnium source, and supplying a reaction gas to induce a reaction with the adsorbed hafnium source to form a hafnium oxide film in atomic layer units. Forming a step and a purge step for removing the unreacted reaction gas and the reaction by-product as a unit cycle and repeatedly formed a predetermined number of times; The titanium oxide film is a titanium oxide film in atomic layer units by adsorbing a titanium source, a purge step for removing an unreacted titanium source from the titanium source, and supplying a reaction gas to induce a reaction with the adsorbed titanium source. Forming a step and a purge step for removing the unreacted reaction gas and the reaction by-product as a unit cycle and repeatedly formed a predetermined number of times, The reaction gas, 0.1 to 1 slm using any material selected from the group consisting of O ₃ (concentration: 200 ± 20 g / cm ³ ), O ₂ , plasma O ₂ , N ₂ O, plasma N ₂ O, or water vapor (H ₂ O) Capacitor manufacturing method to flow at a flow rate. The method of claim 7, wherein The (Hf-Ti) O film may be formed in a stacked structure in the order of the hafnium oxide film and the titanium oxide film, or may be formed in a stacked structure in the order of the titanium oxide film and the hafnium oxide film. The hafnium oxide film includes a step of adsorbing a hafnium source, a purge step for removing an unreacted hafnium source from the hafnium source, and supplying a reaction gas to induce a reaction with the adsorbed hafnium source to form a hafnium oxide film in atomic layer units. Forming a step and a purge step for removing the unreacted reaction gas and the reaction by-product as a unit cycle and repeatedly formed a predetermined number of times; The titanium oxide film is a titanium oxide film in atomic layer units by adsorbing a titanium source, a purge step for removing an unreacted titanium source from the titanium source, and supplying a reaction gas to induce a reaction with the adsorbed titanium source. Forming a step and a purge step for removing the unreacted reaction gas and the reaction by-product as a unit cycle and repeatedly formed a predetermined number of times, The purge step, A method for producing a capacitor, which proceeds for 0.5 to 10 seconds using nitrogen or an inert gas. The method of claim 7, wherein The hafnium oxide film and the titanium oxide film is a capacitor manufacturing method to form a thickness of less than 10Å. The method of claim 7, wherein The plasma annealing in the nitrogen atmosphere, A method for producing a capacitor in which NH ₃ flows 25 to 250 sccm in a chamber that maintains a pressure of 0.1 to 10 torr and a substrate temperature of 200 to 500 ° C. The method of claim 7, wherein The plasma annealing in the nitrogen atmosphere, A capacitor manufacturing method for 1 second to 1 minute in a chamber in which glow charge is generated by applying RF power of 100 to 500 mW in an N ₂ or N ₂ / H ₂ atmosphere. The method of claim 6, And the (Hf-Ti) ON dielectric film is formed to a thickness of 50 to 150 GPa. The method of claim 6, The lower electrode, A capacitor manufacturing method using any one metal-based material selected from the group of doped polysilicon film, TiN and Ru. The method of claim 6, The upper electrode, A method for producing a capacitor using any metal-based material selected from the group of TiN, Ru, TaN, W, WN and Pt. Forming a lower electrode; Performing a first plasma annealing in a nitrogen gas containing atmosphere; Forming a (Hf-Ti) O dielectric film on the lower electrode; Performing a second plasma annealing in a nitrogen gas containing atmosphere; Forming an upper electrode on the (Hf-Ti) O dielectric layer; And Post-treatment annealing to form a (Hf-Ti) ON dielectric film Capacitor manufacturing method comprising a. The method of claim 22, The (Hf-Ti) ON dielectric film, Forming a (Hf-Ti) O film in unit cycles of hafnium source supply, purge, titanium source supply, purge, reactant gas supply, and purge; And Repeating the unit cycle a predetermined number of times, and performing the first plasma annealing and the second plasma annealing. The method of claim 23, wherein The hafnium source is, A process for producing a capacitor, using C ₁₆ H ₃₆ HfO ₄ or other organometallic compounds (TDEAHf, TEMAHf) containing Hf as a precursor and flowing at a flow rate of 50 to 5000 sccm. The method of claim 23, wherein The titanium source is, A method for producing a capacitor, using Ti [OCH (CH ₃ ) ₂ ] ₄ or other organometallic compound containing titanium as a precursor and flowing at a flow rate of 50 to 5000 sccm. The method of claim 23, wherein The reaction gas, 0.1 to 1 slm using any material selected from the group consisting of O ₃ (concentration: 200 ± 20 g / cm ³ ), O ₂ , plasma O ₂ , N ₂ O, plasma N ₂ O, or water vapor (H ₂ O) Capacitor manufacturing method to flow at a flow rate. The method of claim 23, wherein The purge step, A method for producing a capacitor, which proceeds for 0.5 to 10 seconds using nitrogen or an inert gas. The method of claim 23, wherein The first plasma annealing, By plasma annealing in nitrogen atmosphere, A method for producing a capacitor in which NH ₃ flows 25 to 250 sccm in a chamber that maintains a pressure of 0.1 to 10 torr and a substrate temperature of 200 to 500 ° C. The method of claim 23, wherein The first plasma annealing, By plasma annealing in nitrogen atmosphere, A method for producing a capacitor, which is performed for 1 second to 1 minute in a chamber in which a glow charge is generated by applying RF power of 100 to 500 mW in an N ₂ or N ₂ / H ₂ atmosphere. The method of claim 23, wherein The second plasma annealing, By plasma annealing in nitrogen atmosphere, A method for producing a capacitor in which NH ₃ flows 25 to 250 sccm in a chamber that maintains a pressure of 0.1 to 10 torr and a substrate temperature of 200 to 500 ° C. The method of claim 30, The second plasma annealing, By plasma annealing in nitrogen atmosphere, A capacitor manufacturing method for 1 second to 1 minute in a chamber in which glow charge is generated by applying RF power of 100 to 500 mW in an N ₂ or N ₂ / H ₂ atmosphere. The method of claim 30, The step of performing the second plasma annealing, Process for producing a capacitor using furnace or rapid heat treatment at atmospheric pressure or reduced pressure. 33. The method of claim 32, The said annealing is a capacitor manufacturing method which advances in 500-800 degreeC temperature atmosphere. The method of claim 22, The (Hf-Ti) O film, Capacitor manufacturing method formed by ALD, MOCVD or Modified Pulsed CVD method. The method of claim 22, The method of manufacturing a capacitor, wherein the (Hf-Ti) ON dielectric film is formed to a thickness of 50 to 150 GPa. The method of claim 22, The lower electrode, A capacitor using any one metallic material selected from the group of doped polysilicon film, TiN and Ru. The method of claim 22, The upper electrode, A capacitor using any one metal based material selected from the group of TiN, Ru, TaN, W, WN and Pt.

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