KR100743714B1 - Plasma display panel - Google Patents

Abstract

The present invention relates to a plasma display panel, wherein an electrode, a dielectric formed on the electrode, and a barrier rib having a multilayer structure of two or more layers are formed on the dielectric, and the barrier rib is made of a material having high etching force toward the lower layer portion. The volume of the discharge space can be increased by increasing the etching rate of the bottom portion of the discharge space.

Plasma Display Panel, Bulkhead, Etching Force, Discharge Space

Description

 Plasma display panel {Plasma display panel}

1 is a view showing a structure of a plasma display panel according to the prior art;

2 is a cross-sectional view of a plasma display panel according to the prior art;

3 is a cross-sectional view of a plasma display panel according to the present invention;

4 is a cross-sectional view of an embodiment of a plasma display panel according to the present invention;

5 is a flowchart illustrating a method of manufacturing a plasma display panel according to the present invention.

<Explanation of symbols on main parts of the drawings>

10: front substrate 20: back substrate

22: bulkhead

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a plasma display panel, and in particular, by varying the etching power of the upper and lower layers of the plasma display panel partition wall, when the partition wall is formed by etching, the etching force of the lower partition wall part is increased to increase the etching force of the bottom portion and the side surface of the discharge space. Is sufficiently etched, the present invention relates to a plasma display panel and a method for manufacturing the same, which can secure a discharge space and increase a phosphor coating area.

As shown in FIG. 1, a general plasma display panel includes a front substrate A and a rear substrate B, wherein the front substrate is arranged with a plurality of bus electrodes 1 arranged in a stripe shape opposite to the rear substrate. And a dielectric layer (3) stacked to cover the ITO electrode (2), the bus electrode to limit discharge current during discharge and to facilitate generation of wall charges, and a dielectric protective layer (4) to protect the dielectric layer. .

In addition, the rear substrate B is arranged in a stripe shape so as to be orthogonal to the bus electrode 1 of the front substrate, and the plurality of address electrodes 6 for dividing the entire screen into a plurality of cells together with the bus electrode, and the rear substrate. A dielectric layer 8 applied to the entire surface of the dielectric layer to protect the address electrode and to perform electrical insulation; a partition wall 7 formed in a stripe shape on the dielectric layer to form a discharge space; and a discharge formed by the partition wall. It consists of a phosphor 9 which is printed and applied inside the space and is excited by ultraviolet rays during the discharge of each cell to emit visible light.

The partition wall 7 is usually patterned into a desired shape by sand blasting, pressing, or etching using a photosensitive material, and then fired at a high temperature of 450 ° C. or higher. Is formed.

Generally, to form the partition wall 7, a partition paste composed of a mixture of PbO, ZnO, and MgO is applied onto the back substrate B on which the dielectric 8 is formed, and the back substrate is sprayed with an etching solution to etch the partition paste. As the partition wall is formed, the etching force of the partition wall is determined by the content of the PbO.

At this time, as shown in Figure 2, the lower layer portion of the partition wall 7 is not sufficiently etched by the etching solution so that the lower end portion of the side wall and the bottom portion of the discharge space is not formed flat and is formed in a concave arc shape.

Accordingly, since the side surface of the partition 7 and the lower end of the discharge space are not sufficiently etched, the volume of the discharge space is reduced, so that the coating area of the phosphor 9 applied to the discharge space is also reduced, so that visible light is not sufficiently formed during discharge. As a result, there is a problem that the discharge efficiency is reduced and the brightness is lowered.

The present invention has been made to solve the above-described problems of the prior art, by forming a multi-layered partition so that the etching force of the plasma display panel partition wall toward the lower layer, by increasing the etching force of the lower portion of the partition wall to sufficiently discharge space The present invention provides a plasma display panel which secures a discharge area by increasing a phosphor coating area.

Plasma display panel according to the present invention for solving the above problems is characterized in that the electrode, a dielectric formed on the electrode, the partition wall having a multi-layered structure of two or more layers is formed on the dielectric.

Hereinafter, a plasma display panel of the present invention will be described with reference to the accompanying drawings. 3 to 4 are cross-sectional views of the plasma display panel according to the present invention.

A bus electrode pair 11 and an ITO electrode 12 are formed on the front substrate 10 of the plasma display panel according to the present invention, and a dielectric 13 and a dielectric are formed on the bus electrode pair and the ITO electrode. The protective layer 14 is formed in turn.

On the back substrate 20, an address electrode 21 for selecting a discharge cell according to image data, a dielectric 23 formed on the address electrode, and a partition 22 and a discharge space partitioning the discharge space on the dielectric are formed. The phosphors 24 which are applied to and excite / luminesce visible light upon discharge are formed in sequence.

As shown in FIG. 3, the partition wall 22 of the plasma display panel may have a multi-layered structure having different upper and lower etching forces.

For example, when the barrier rib 22 has a two-layer structure having two layers, the barrier rib 22 is formed of a material having a different etching force from the upper layer portion 22a and the lower layer portion 22b. When the partition is configured to increase the force, the side surface of the partition and the lower end of the discharge space may be sufficiently etched by the etching solution to increase the volume of the discharge space.

In general, the partition wall 22 is coated with a partition paste composed of a mixture of PbO, ZnO, MgO on the back substrate 20 on which the dielectric 23 is formed, and is etched with a nickname liquid after exposure / development according to the partition pattern.

At this time, since the etching rate of the partition wall 22 is determined by PbO among the partition paste components, a partition paste component is formed such that the lower partition 22b has a higher PbO content than the upper layer 22a, so that the upper partition and the lower partition of the partition 22 are formed. Etching power can be changed.

In general, when the PbO content of the barrier rib paste is 50% or more, it is etched by a nicking liquid, so that the barrier paste for forming the barrier rib upper layer portion 22a has a PbO content of 50% or higher, and forms the barrier rib lower layer portion 22b. The partition paste to be made should have a larger PbO content than the partition paste for forming the upper layer portion.

As described above, when the etching rate of the lower barrier layer 22b is higher than the upper layer 22a, the lower barrier layer is sufficiently etched during the etching process so that the side surface of the barrier 22 and the bottom surface of the discharge space are not concave as in the prior art. It is formed flat without the increase of the volume of the discharge space.

When the volume of the discharge space is increased, the coating area of the phosphor 24 applied to the discharge space is increased, thereby increasing the amount of visible light generated by vacuum ultraviolet (VUV) generated in the plasma during discharge, thereby increasing the light emission efficiency. This gets better.

In addition, as described above, when the coating area of the phosphor 24 is increased and the generation of visible light is increased, the luminance can be increased, thereby improving the luminance.

In addition, the partition wall 22 ′ of the plasma display panel of the present invention may be formed to have a multi-layered structure. As shown in FIG. 4, the partition wall has 6 layers, and the partition wall 22 ′ is formed. ), When the etching force is increased toward the lower layer, the etching force may be further increased during the etching process.

That is, as shown in FIG. 3, when the partition 22 ′ having the six-layer structure is illustrated as illustrated in FIG. 4, the etching force of the partition side surface portion is increased during the etching process. do.

Accordingly, the side surface portion of the barrier rib 22 'is flat and the depth of etching is deep and wide, thereby further increasing the volume of the discharge space formed during the etching process, thereby further increasing the discharge efficiency during discharge after applying the phosphor 24. Will be.

As described above, the partitions 22 and 22 'provided in the plasma display panel are formed of two or more multilayers, and as the number of layers constituting the partition increases, the flatness of the partition side surface portion and the volume of the discharge space after the etching process are increased. Since this increases, the amount of visible light generated during discharge increases, thereby improving discharge efficiency and luminance.

In particular, when the volume of the discharge space is increased, the coating area of the phosphor 24 is increased, so that the amount of visible light is increased, and the plasma can be made larger during discharge, thereby maximizing the discharge efficiency.

5 is a flowchart illustrating a method of manufacturing a plasma display panel according to the present invention. Referring to Figure 5, look at the manufacturing method of the plasma display panel of the present invention.

First, an electrode is formed in a first step (S1). The electrode may be mainly formed using a pattern printing method of printing an electrode pattern on glass and drying / firing the electrode to form an electrode, or a photosensitive paste method of coating and drying the photosensitive paste on glass and baking the glass after exposure / development. Can be.

In the second step, a dielectric is formed on the electrode formed in the first step (S2). The dielectric may be formed by applying a paste forming the dielectric to dry / fire the laminate or laminating the dielectric sheet.

In the third step, partition walls of a multi-layer structure are formed.

To this end, barrier rib pastes are applied (S3 and S4) to suit the number of layers of the barrier rib, and the barrier rib is formed by etching (S7) after exposure (S5) and development (S6).

For example, in the case where the two-layered partition wall is formed, a partition paste for forming the lower end of the partition wall is coated on the substrate on which the dielectric is formed, and then the partition paste for forming the upper end of the partition wall is laminated. Since the application height of the partition wall paste must be lower than the application height of the partition wall paste applied to form a single layer partition wall.

If the number of layers of the partition wall is increased, the number of application of the partition paste is increased to match the number of partition walls, and the partition is formed, and the coating height after applying the partition paste by the desired number of partition walls is not higher than 20 µm higher than the partition height to be formed. The height of the finally formed partition wall is to be formed in the range of 100㎛ to 180㎛.

In this case, since the partition wall has to have an etch force toward the lower layer portion, the paste applied to form the partition wall should have a higher etching force toward the lower layer. The etching force may be controlled by the content of PbO contained in the barrier paste, and the etching force increases as the PbO content increases. When the PbO is contained in at least 50%, the etching force is etched when the barrier paste is exposed to the etching solution. .

After forming the barrier rib of the multi-layer structure as described above, the fluorescent material is applied to the interior of the discharge space (S8) to manufacture a substrate of the plasma display panel.

As described above, when the barrier rib is formed in a multilayer structure, not only the sidewall portion of the barrier rib is formed flat after the etching process, but also the depth of the discharge space to be formed and the width of the bottom surface portion are increased, resulting in an increase in the volume of the discharge space.

Therefore, the area of the phosphor applied in the discharge space increases, so that the amount of visible light generated during discharge increases, thereby improving discharge efficiency and improving luminance.

As described above, the plasma display panel according to the present invention has been described with reference to the illustrated drawings, but the present invention is not limited by the embodiments and drawings disclosed herein, and those skilled in the art within the scope of the technical idea of the present invention are protected. Application is possible.

Plasma display panel according to the present invention is configured as described above forms a barrier rib of a multi-layer structure having different etching force of the upper layer and the lower layer, the partition wall is made of a material having a high etching force toward the lower layer portion to etch the discharge space side portion and the bottom portion By increasing the force to form a curved partition without increasing the volume of the discharge space to increase the phosphor coating area has the effect of improving the discharge efficiency by improving the discharge efficiency.

Claims (3)

An electrode; A dielectric formed on the electrode; A partition having a multilayer structure of two or more layers formed on the dielectric, The partition wall has a higher etching power toward the lower layer. delete The method of claim 1, The partition has a higher PbO composition ratio toward the lower layer, The PbO composition ratio is at least 50% or more.

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