KR100731110B1 - Mask having ghost patterns - Google Patents

Abstract

A mask is provided to obtain an exact pattern by overcoming asymmetric characteristics in the profile of optical intensity between metal line patterns using a ghost pattern with a width smaller than that of a large space pattern. A mask(100) includes a plurality of metal line patterns(120), a plurality of large space patterns, a plurality of small space patterns, and a ghost pattern. The plurality of large space patterns(160) are arranged within a large space between the metal line patterns. The plurality of small space patterns(140) are arranged within a small space between the metal line patterns. The ghost pattern(150) is formed at a center portion of the large space pattern. The width of the ghost pattern is smaller than that of the large space pattern.

Description

Mask Having Ghost Patterns

BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a plan view of a conventional mask in which a space pattern having a narrow spacing between wiring patterns and a space pattern having a large spacing exist.

FIG. 2 is a graph showing an asymmetry phenomenon in a slope of a light intensity profile appearing in the mask of FIG. 1. FIG.

3 is a plan view of a mask on which a virtual image pattern is formed according to the present invention;

4 is a cross-sectional view showing a PR profile when the photosensitive film is exposed using a mask on which a virtual image pattern is formed according to the present invention.

5 is a graph showing a simulation result according to the transmittance for the virtual image pattern according to the present invention.

FIG. 6A and FIG. 6B are patterns observed by varying the width of the virtual pattern according to the present invention from 24 nm to 80 nm in 12 masks in which the CD (Critical Dimension) of the wiring pattern and the spatial pattern is 127 nm / 107 nm and 137 nm / 97 nm, respectively. Photograph showing the change in profile.

7 is a graph showing a change in light intensity according to a horizontal position of a mask pattern.

FIG. 8 is a graph of a simulation result showing an amount of change in tilt of an aerial image and an light intensity profile according to a width change of a virtual image pattern under the same conditions as the experiment of FIG. 7.

The present invention relates to a semiconductor process technology, and more particularly, to a mask having a ghost pattern for implementing a symmetric pattern in a photolithography process.

In order to form a film having a desired pattern (for example, an insulating film, a conductive film, a dielectric film, a metal wiring film, etc.) on a semiconductor wafer or a substrate, photolithography techniques are mainly used. In photolithography, a photoresist is used to transfer a pattern of a mask or a reticle onto a semiconductor substrate, and usually (1) a film is applied to the semiconductor substrate, and then the adhesion between the photoresist and the semiconductor substrate is improved. Cleaning the substrate surface to increase, (2) applying a photoresist film to the substrate using a method such as spin on glass (SOG) and softbake to remove solvent in the photoresist film, and (3) applying a mask on the substrate. Aligning and exposing, (4) developing the substrate by placing it in a developing solution to form a photoresist pattern and curing the photoresist pattern at a high temperature; and (5) applying a lower film exposed through the photoresist pattern (step (1) above). And selectively etching one layer to form a lower layer pattern, and then removing the photoresist layer pattern.

As described above, the photolithography process requires transferring a pattern of a mask to form a pattern on a semiconductor substrate. Therefore, how accurately the pattern of the mask is transferred is very important.

In the photolithography process using a shadow printing method and an ultraviolet (UV) light exposure apparatus, a mask having a structure in which a thin film layer pattern is covered on a glass substrate is used. The mask may be classified into an emulsion mask and a hard surface mask according to the type of the thin film layer. The emulsion mask is coated with gelatin (gelatin) on the glass substrate with a thickness of about 2.5μm, and when light is irradiated, it turns into a search color and uses a different color and shape than the unilluminated portion. A hard surface mask is a mask that forms a pattern corresponding to a pattern to be formed on a semiconductor substrate through an exposure technique and an etching process by forming a hard metal thin film layer of about 1,500 유리 on a glass substrate. As the metal material, chromium (Cr) is generally used, or silicon, iron oxide, or the like having low reflection is used. Silicon and iron oxides block UV rays but allow visible light to pass through, which is good for mask alignment.

However, in order to transfer the pattern of the mask to the photosensitive film, the photosensitive film should be exposed with light having a predetermined intensity or more (this is called a threshold dose). If the exposure is performed below the threshold light amount, the pattern may not be properly transferred to the photosensitive film. In particular, at the edge of the photoresist pattern, the profile of the light intensity crosses the threshold light quantity (i.e., at the boundary between the area where light enters and is blocked through the mask pattern), so that the edge of the photoresist pattern Contrast is determined by the slope of the light intensity profile. That is, if the inclination of the profile is sharp, the edge pattern can be clearly transferred, but if the inclination of the profile is gentle, the edge pattern is blurred, and thus the change in the light intensity causes a large change in the shape of the edge. If the size of the pattern to be formed is larger than the wavelength of light to be exposed, the light intensity profile shows a steep inclination, but as the degree of integration of the semiconductor device increases, the pattern becomes fine, and thus the light intensity profile is formed at the edge region of the pattern. It shows an increasingly gentle slope.

In particular, unlike logic devices, wiring is densely arranged in a flash memory device or a DRAM (Dynamic Random Access Memory) device. When the distance between the wiring and the wiring is not constant, the slope of the light intensity profile is It appears asymmetrical.

For example, in the mask 10 in which the wiring 12 is densely arranged as shown in FIG. 1, when the space pattern 14 having a narrow space between the wires 12 and the space pattern 16 having a large space are present, As shown in FIG. 2, an asymmetric phenomenon appears in the light intensity profile 20. That is, as shown in the graph at the bottom of FIG. 2, different light intensity profiles A and B appear around the edge of the wiring 12a with the wide spatial pattern on the left and the narrow spatial pattern on the right. As shown by the dashed circles D1 and D2, the edges of the wiring 12a appear asymmetrically with different inclinations of both light intensity profiles.

This asymmetry of the light intensity profile inclination may cause an imbalance in ion implantation, deteriorate the characteristics of the semiconductor device, and may cause the threshold voltage to become unstable and, in severe cases, the operation of the semiconductor device may be impossible. In addition, the asymmetry of the light intensity profile slope causes the pattern of the oxide-nitride-oxide (ONO) structure to be deformed in the gate reactive ion etching (RIE) process.

An object of the present invention is to make a more accurate pattern transfer by making the inclination of the light intensity profile symmetric in the photolithography process.

Another object of the present invention is to provide a mask capable of forming a fine pattern by solving the problem of asymmetric inclination of the light intensity profile.

The mask according to the present invention comprises (1) a plurality of wiring patterns made of a light blocking material, (2) a wide space pattern made of a phase shift material and disposed in a large space between the plurality of wiring patterns, and (3) a plurality of wiring patterns. The space between the wiring patterns of the narrow space pattern is arranged in a narrow space of the phase shift material, and (4) the wide space pattern is located in the center and composed of a light blocking material, the width of the wide space pattern is narrower than the width Contains virtual image patterns. The virtual pattern is arranged in the same direction as the direction in which the plurality of wiring patterns are arranged, and the width of the virtual pattern is determined by the size of the wide spatial pattern, the size of the narrow spatial pattern, and the distance between the virtual pattern and the wiring pattern. It is preferably a size that is not resolved by a light source to be exposed (eg, an ArF excimer laser light source).

Embodiment

Hereinafter, specific embodiments of the present invention will be described with reference to the accompanying drawings.

3 is a plan view of a mask on which a virtual image pattern is formed according to the present invention.

Referring to FIG. 3, in the mask 100 according to the present invention, a plurality of wiring patterns 120 are formed, and a space between the space pattern 140 and the wiring patterns having a narrow gap therebetween is formed. It includes a wide spatial pattern 160. In the wide spatial pattern 160, a ghost pattern 150 having a constant width W1 is formed in the center.

According to one embodiment of the present invention, the plurality of wiring patterns 120 are made of a light blocking material such as chromium (Cr), and phase shift materials are coated on the space patterns 140 and 160. The virtual pattern 150 is made of a light blocking material made of chromium, silicon, or iron oxide. That is, the virtual image pattern 150 is a binary type capable of only two choices of completely passing or completely blocking light. Therefore, the mask 100 of the present invention shown in FIG. 3 has a structure in which a binary virtual image pattern 150 is added to a phase shift mask.

The phase shift mask applies a transparent and uniform thickness of the phase shift material to the spatial pattern so that light passing through the spatial patterns 140 and 160 between the opaque portions 120 of the mask has a 180 degree phase difference. The electric fields corresponding to the diffracted light reaching the wafer (not shown) may have a phase difference of 180 degrees, causing mutual interference and increasing resolution.

In the present invention, the virtual pattern 150 having a width smaller than the width of the pattern 140 (that is, W1 < W2) is formed at the center of the wide spatial pattern 160 and the direction in which the plurality of wiring patterns 120 are arranged. Arrange in the same direction. The width W1 of the virtual image pattern 150 should have a width such that it is not resolved by the light source. That is, the virtual image pattern 150 is made of a light blocking material, but the width of the virtual pattern 150 is small so that the pattern is not transferred to the photosensitive film even when light is actually irradiated. In this sense, the pattern 150 is called a virtual image pattern.

In the highly integrated semiconductor device, a mercury lamp having a wavelength in the ultraviolet region is frequently used as a light source. The mercury lamp has a wavelength of 254 nm, 313 nm, 365 nm (I-line), and 405 nm (H-line) 436 nm (G-line). It emits strong light. However, mercury lamps are not suitable for realizing a small line width because the intensity of light is reduced at short wavelengths. In the present invention, for example, deep UV light using an excimer laser is used as a light source. In addition, a cadmium (Cd) lamp, microwave Hg, Cd-Hg may be used as a light source, and ArF excimer laser having a wavelength of 193 nm or 157 nm may be used as a light source. In this case, the width of the virtual image pattern 150 is preferably 100 nm or less, and preferably about 50 nm, as described later.

As shown in the graph of FIG. 2, in the conventional mask 10, the light intensity is different by about four times or more in the wide spatial pattern 16 and the narrow spatial pattern 14 centering on the wiring pattern, thereby asymmetrical to the inclination of the light intensity profile. Appears (dashed circles D1, D2 in FIG. 2). However, in the present invention, by inserting the virtual image pattern 150 into the wide spatial pattern 160, as shown in FIG. 3, the light intensity appearing in the wide spatial pattern 160 is lowered to a level similar to that of the narrow spatial pattern 140. Therefore, the inclination of the light intensity profile may be symmetric about the wiring pattern 120.

When the photosensitive film is exposed using the mask 100, a pattern having a symmetrical PR profile is transferred to the photosensitive film as shown in FIG. 4. 4 is a cross-sectional view of the photosensitive film in a state in which a photosensitive film is coated on the layer 200 to be formed with a pattern, and then exposed with the mask 100 of the present invention and the photosensitive film is developed. It can be seen that the PR profile of the photosensitive film pattern 260 to which the wide spatial pattern 160 is transferred and the photosensitive film pattern 240 to which the narrow spatial pattern 140 is transferred are symmetrically around the wiring photosensitive film pattern 220a. As described above, since the virtual image pattern 150 is not resolved to the light source, the virtual image pattern is not transferred to the photosensitive film pattern 260 of FIG.

5 is a graph showing a simulation result according to the transmittance for the virtual image pattern according to the present invention.

In the graph of FIG. 5, the X axis represents the horizontal distance of the patterns when the mask 100 is viewed in a plane, and the Y axis represents the light intensity. The graph of FIG. 5 illustrates a case in which one wiring pattern 120 is placed at a horizontal distance of 0, and a wide spatial pattern 160 is formed on the left side and a narrow spatial pattern 140 is formed on the right side. From the case where the virtual image pattern having a width of W1 is made of a material having a transmittance of 1 (that is, a phase shift material) in the center of the wide spatial pattern 160, the material having a transmittance of 0 (ie, a binary opaque material) is gradually reduced. In this case, the light intensity profile for each is shown. As shown in FIG. 5, when the virtual image pattern is formed of a material having a transmittance of 1, the slope of the light intensity profile is severely asymmetrical to the left and right of the wiring pattern, and as the transmittance is lowered, the asymmetry is alleviated, but the transmittance is 0. When the virtual pattern 150 is made of a phosphorus material (ie, a binary virtual pattern), the slope of the light intensity profile indicates symmetry. Therefore, the PR profile as shown in FIG. 4 can be obtained.

The inventor manufactured the mask by adding the above-mentioned virtual image pattern to the mask for forming the gate wiring layer of the 130 nm and 90 nm sFlash (Security Flash) memory devices. 6A and 6B show 12 masks manufactured by varying the width of the virtual image pattern from 24 nm to 80 nm in a mask having a CD (critical dimension) of a wiring pattern and a space pattern of 127 nm / 107 nm and 137 nm / 97 nm, respectively. The change in profile was observed.

FIG. 6A shows a pattern profile for each of the widths W1 of the virtual image pattern 150 having 24 nm, 30 nm, 34 nm, 40 nm, 44 nm, 50 nm, 54 nm, 60 nm, 64 nm, and 70 nm. If the CD of the wiring pattern is 127 nm and the virtual pattern 150 is inserted into the wide spatial pattern 160 based on the mask having a space between the wiring patterns 107 nm, the pattern becomes denser as the width of the virtual pattern 150 becomes larger. Since there is an effect, the CD of the wiring pattern gradually increases. However, the CD of this wiring pattern increases in the direction in which the virtual image pattern is located. This is one of the factors to consider when initially setting up the photolithography process.

As shown in FIG. 6A, when the width of the virtual pattern 150 is 54 nm or more, the virtual pattern no longer functions as a virtual pattern but is resolved to deform a wide spatial pattern (middle left in FIG. 6A). See the third photo). Therefore, it is preferable that the width W1 of the virtual image pattern is about 50 nm or less as observed through the photographic view of FIG. 6A.

This result can also be obtained in FIG. 6B. When the width of the virtual pattern reaches 54 nm, it can be observed that the virtual pattern is resolved and deformation occurs in the spatial pattern (see the third picture from the left in the middle of FIG. 6B). ). As shown in the first photograph of Fig. 6B, when the width of the wiring pattern is 137 nm and the space on the left and right sides is 97 nm, the inclination of the PR profile is severe because the space is smaller than the width of the wiring pattern.

On the other hand, the width of the virtual image pattern 150 is not necessarily limited to 50nm or 54nm. That is, since the width of the virtual pattern 150 may vary depending on the width of the narrow spatial pattern, the width of the wide spatial pattern, and the distance between the virtual pattern and the wiring pattern, the width of the virtual pattern is a process of transferring the pattern of the mask to the photosensitive film. Is determined as the threshold at which resolution due to the virtual image pattern does not occur.

7 is a graph showing a result of simulating a change in light intensity according to a horizontal position of a mask pattern. The mask pattern in FIG. 7 is the mask pattern shown in FIG. 3.

Referring to FIG. 7, the light intensity profile was obtained by increasing the width W1 of the virtual pattern to 5 nm, 15 nm, 25 nm, 35 nm, 45 nm, 55 nm, and 65 nm. As the width of the virtual pattern increases, the light intensity of the wide spatial pattern decreases. You can see the phenomenon. This is the same as the experimental result shown in FIG. 6A and 6B. On the other hand, as shown by the dotted ellipses R1 and R2 in Fig. 7, it can be observed that the resolution due to the virtual image pattern occurs when the threshold light amount is 0.25 and the width of the virtual image pattern is 55 nm or more.

FIG. 8 is a graph of simulation results showing the amount of change in the aerial image (aerial image = light intensity profile) and the light intensity profile inclination according to the width change of the virtual image pattern under the same conditions as the previous experiment.

In the absence of the virtual image pattern (that is, the width of the virtual pattern = 0 nm), as shown in FIG. 8, a severe asymmetry appears in the aerial image 300a, that is, the light intensity profile, and the amount of tilt variation for the narrow spatial pattern and the wide spatial pattern is shown. 320a is very large. This asymmetry decreases as the virtual pattern is inserted into a wide spatial pattern and the width of the virtual pattern is increased (300b / 320b), but when the width of the virtual pattern is about 50 nm, the spatial image becomes symmetrical (300c / 320c, 300d / 320d). ). When the width of the virtual pattern increases to 60 nm and 80 nm, the symmetry of the spatial image is broken again due to the resolution of the virtual pattern (300e / 320e, 300f / 320f), where the asymmetry is the asymmetry in the absence of the virtual pattern (300a). / 320a), because this is because the resolution of the virtual image pattern has changed from the original wide spatial pattern to a narrow spatial pattern.

Although specific embodiments of the present invention have been described with reference to the drawings, this is intended to be easily understood by those skilled in the art and is not intended to limit the technical scope of the present invention. Therefore, the technical scope of the present invention is determined by the matters described in the claims, and the embodiments described with reference to the drawings may be modified or modified as much as possible within the technical spirit and scope of the present invention.

According to the present invention, it is possible to overcome the asymmetry of the light intensity profile that appeared in the wide and narrow spaces between the wiring patterns, thereby making the pattern more accurate.

In addition, fine patterns can be transferred from the mask to the semiconductor device, balanced ion implantation process management can be prevented, pattern breakage of the ONO structure can be prevented, and productivity and yield of the semiconductor device can be improved.

Claims (9)

A mask having a pattern transferred to a semiconductor substrate in a photolithography process of a semiconductor device, A plurality of wiring patterns, A plurality of wide space patterns arranged in a space having a large space between the plurality of wiring patterns; A plurality of narrow space patterns arranged in a narrow space between the plurality of wiring patterns; In the center of the wide space pattern, a virtual pattern having a width narrower than the width of the wide space pattern, And the width of the virtual image pattern is a size not resolved by a light source exposing the mask. In claim 1, And the wiring pattern and the virtual image pattern are made of a light blocking material, and the wide space pattern and the narrow space pattern are made of a phase shift material. In claim 2, The light blocking material constituting the virtual image pattern comprises chromium, silicon, iron oxide. In claim 1, And the virtual image pattern is arranged in the same direction as the direction in which the plurality of wiring patterns are arranged. In claim 1, The light source is a mask, characterized in that the deep UV light source (deep UV) using an excimer laser. In claim 1, The light source is an ArF excimer laser, the mask is characterized in that the width of the virtual pattern is 100nm or less. In claim 1, The light source is an ArF excimer laser, the mask is characterized in that the width of the virtual pattern is 50nm or less. In claim 1, The width of the virtual image pattern is determined according to the size of the wide spatial pattern, the size of the narrow spatial pattern and the distance between the virtual image pattern and the wiring pattern. A mask having a pattern transferred to a semiconductor substrate in a photolithography process of a semiconductor device, A plurality of wiring patterns made of a light blocking material, A wide space pattern formed of a phase shift material and disposed in a wide space between the plurality of wiring patterns; A narrow space pattern formed of the phase shift material and disposed in a narrow space between the plurality of wiring patterns; A virtual pattern having a width narrower than the width of the wide spatial pattern at the center of the wide spatial pattern, the virtual pattern comprising a light blocking material; The virtual pattern is arranged in the same direction as the direction in which the plurality of wiring patterns are arranged, The width of the virtual pattern is determined by the size of the wide spatial pattern, the size of the narrow spatial pattern and the distance between the virtual pattern and the wiring pattern, and the size is not resolved by the light source exposing the mask. Characteristic mask.

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