KR100724202B1 - Method for formating imd in semiconductor device - Google Patents
Method for formating imd in semiconductor device Download PDFInfo
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- KR100724202B1 KR100724202B1 KR1020050128703A KR20050128703A KR100724202B1 KR 100724202 B1 KR100724202 B1 KR 100724202B1 KR 1020050128703 A KR1020050128703 A KR 1020050128703A KR 20050128703 A KR20050128703 A KR 20050128703A KR 100724202 B1 KR100724202 B1 KR 100724202B1
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- 238000000034 method Methods 0.000 title claims abstract description 38
- 239000004065 semiconductor Substances 0.000 title claims abstract description 27
- 229910052751 metal Inorganic materials 0.000 claims abstract description 37
- 239000002184 metal Substances 0.000 claims abstract description 37
- 230000008569 process Effects 0.000 claims abstract description 23
- 239000007788 liquid Substances 0.000 claims abstract description 13
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims abstract description 12
- 229910052796 boron Inorganic materials 0.000 claims abstract description 12
- 238000000151 deposition Methods 0.000 claims abstract description 11
- 238000001020 plasma etching Methods 0.000 claims description 12
- 239000000758 substrate Substances 0.000 claims description 7
- AJSTXXYNEIHPMD-UHFFFAOYSA-N triethyl borate Chemical compound CCOB(OCC)OCC AJSTXXYNEIHPMD-UHFFFAOYSA-N 0.000 claims description 5
- 125000000954 2-hydroxyethyl group Chemical group [H]C([*])([H])C([H])([H])O[H] 0.000 claims description 4
- 230000015572 biosynthetic process Effects 0.000 claims 2
- KPSZQYZCNSCYGG-UHFFFAOYSA-N [B].[B] Chemical compound [B].[B] KPSZQYZCNSCYGG-UHFFFAOYSA-N 0.000 abstract description 4
- 229920002120 photoresistant polymer Polymers 0.000 description 13
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 229910052782 aluminium Inorganic materials 0.000 description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 3
- 239000011521 glass Substances 0.000 description 3
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- 230000004888 barrier function Effects 0.000 description 2
- 238000001312 dry etching Methods 0.000 description 2
- -1 that is Inorganic materials 0.000 description 2
- YCKRFDGAMUMZLT-UHFFFAOYSA-N Fluorine atom Chemical compound [F] YCKRFDGAMUMZLT-UHFFFAOYSA-N 0.000 description 1
- 230000009471 action Effects 0.000 description 1
- 230000006978 adaptation Effects 0.000 description 1
- 229910052731 fluorine Inorganic materials 0.000 description 1
- 239000011737 fluorine Substances 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
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- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
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- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
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- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
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- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
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Abstract
본 발명은 메탈 라인 상부에 HDP USG를 증착할 때 리플로우 특성이 강한 붕소(Boron)가 포함된 가스 또는 액체를 함께 도핑시켜 IMD 갭필 특성을 향상시키기 위한 것으로, 이를 위한 본 발명은 반도체 기판 상의 메탈 상부에 PR 패턴을 형성하는 과정과, PR 패턴을 마스크로 RIE 공정을 수행하여 메탈 라인을 형성하는 과정과, 메탈 라인 상부에 HDP 산화막을 증착할 때, 붕소(Boron)가 포함된 가스 혹은 액체를 도핑(doping)시켜 IMD 갭필하는 과정과, IMD 갭필 상부에 캡 산화막을 형성하고 이를 CMP하여 평탄화하는 과정을 포함한다. 따라서, 본 발명은 IMD 갭필 특성을 향상시킬 수 있으며, 이로 인하여 고성능의 반도체 소자를 제조할 수 있는 효과가 있다. The present invention is to improve the IMD gapfill characteristics by doping together a gas or liquid containing a high reflow characteristics of boron (Boron) when depositing the HDP USG on the metal line, the present invention for Forming a PR pattern on top, forming a metal line by performing RIE process using a PR pattern as a mask, and depositing a gas or liquid containing boron when depositing an HDP oxide layer on the metal line A process of doping and IMP gapfilling, and a process of forming a cap oxide layer on the IMD gapfill and CMP to planarize it. Therefore, the present invention can improve the IMD gapfill characteristics, thereby producing a high-performance semiconductor device.
IMD, 붕소, 메탈, 도핑 IMD, Boron, Metal, Doped
Description
도 1a 내지 도 1c는 기존 반도체 소자의 아이엠디(IMD) 형성 과정을 도시한 단면도,1A to 1C are cross-sectional views illustrating a process for forming an IMD of an existing semiconductor device;
도 2a 내지 도 2d는 반도체 소자의 IMD 형성방법에 대한 공정 과정을 도시한 단면도.2A to 2D are cross-sectional views illustrating a process for forming an IMD of a semiconductor device.
본 발명은 반도체 소자의 IMD(Inter Metal dielectric, IMD) 형성방법에 관한 것으로, 보다 상세하게는 메탈 라인 상부에 고밀도 플라즈마(High Density Plasma, HDP) USG(Undoped Silicon Glass)를 증착할 때, 리플로우(Reflow) 특성이 강한 붕소(Boron)가 포함된 가스(gas) 또는 액체(liquid)를 함께 도핑시켜 IMD 갭필 특성을 향상시키면서 형성할 수 있는 방법에 관한 것이다. The present invention relates to a method for forming an intermetal dielectric (IMD) of a semiconductor device, and more particularly, to reflowing a high density plasma (HDP) undoped silicon glass (USG) on a metal line. The present invention relates to a method in which a gas or a liquid containing boron having strong reflow characteristics may be doped together to improve the IMD gapfill characteristics.
주지된 바와 같이, 반도체 소자의 형성 과정에 있어서, 메탈(예컨대, 알루미늄(Al)과 메탈간에는 절연 목적으로 IMD 형성 과정을 실시한다. 이러한 IMD는 도 1a에 도시된 바와 같이, 메탈(101)이 증착(deposition)된 반도체 기판 상에 감광막 (Photo Resist, PR)을 도포하고, 감광하여 RIE(Reactive Ion Etch, RIE)를 위한 PR 패턴(103)을 형성한다.As is well known, in the process of forming a semiconductor device, an IMD forming process is performed between a metal (eg, aluminum (Al) and a metal) for the purpose of insulation. As shown in FIG. 1A, the IMD is formed of a
이후, 도 1b에 도시된 바와 같이, PR 패턴(103)에 대하여 RIE 공정을 통해 메탈 라인(105)을 형성한 후, SiH4 혹은 TEOS(Tetra Ethyl Ortho Silicate)를 이용한 HDP USG를 증착하여 IMD 갭 필(gap fill)(107)을 실시한 다음에 도시되지 않은 PECVD를 이용하여 캡 산화막(cap oxide)을 형성하고 이를 CMP하여 평탄화한다. Thereafter, as shown in FIG. 1B, the
그러나, 반도체 소자에서 IMD를 형성함에 있어서 갭 필(gap fill) 과정을 가장 중요하게 다루는 부분인데, 메탈, 즉 알루미늄(Al)의 소자 크기를 줄이면서 메탈 라인(105) 사이에 IMD를 채워야 하는 어스펙트 비율(Aspect Ratio, AR)이 점점 커지게 되어 결국 이 커진 AR 때문에 IMD 갭 필을 수행할 수 없으며 금속의 면저항(Rs)을 낮출 수 없어 고성능의 반도체 소자를 제작할 수 없다는 문제점을 갖는다.However, the gap fill process is the most important part in forming an IMD in a semiconductor device, which requires filling the IMD between the
이에, 본 발명은 상술한 문제점을 해결하기 위해 안출한 것으로, 그 목적은 메탈 라인 상부에 HDP USG를 증착할 때 리플로우 특성이 강한 붕소(Boron)가 포함된 가스 또는 액체를 함께 도핑시켜 IMD 갭필 특성을 향상시킬 수 있는 반도체 소자의 IMD 형성방법을 제공함에 있다.Accordingly, the present invention has been made to solve the above-described problems, the purpose of the IMD gapfill by doping together a gas or liquid containing a high reflow characteristics boron (Boron) when depositing HDP USG on the metal line The present invention provides a method for forming an IMD of a semiconductor device capable of improving characteristics.
이러한 목적을 달성하기 위한 본 발명에서 반도체 소자의 IMD 형성방법은 반도체 기판 상의 메탈 상부에 PR 패턴을 형성하는 과정과, PR 패턴을 마스크로 RIE 공정을 수행하여 메탈 라인을 형성하는 과정과, 메탈 라인 상부에 HDP 산화막을 증착할 때, 붕소(Boron)가 포함된 가스 혹은 액체를 도핑(doping)시켜 IMD 갭필하는 과정과, IMD 갭필 상부에 캡 산화막을 형성하고 이를 CMP하여 평탄화하는 과정을 포함하는 것을 특징으로 한다.In the present invention for achieving the above object, the method for forming an IMD of a semiconductor device includes a process of forming a PR pattern on a metal on a semiconductor substrate, a process of forming a metal line by performing a RIE process using the PR pattern as a mask, and a metal line When depositing the HDP oxide film on the upper surface, doping the gas or liquid containing boron (Boron) including the process of IMD gapfill, and forming a cap oxide film on the IMD gapfill and CMP planarization It features.
이하, 본 발명의 실시 예는 다수개가 존재할 수 있으며, 이하에서 첨부한 도면을 참조하여 바람직한 실시 예에 대하여 상세히 설명하기로 한다. 이 기술 분야의 숙련자라면 이 실시 예를 통해 본 발명의 목적, 특징 및 이점들을 잘 이해하게 될 것이다.Hereinafter, a plurality of embodiments of the present invention may exist, and a preferred embodiment will be described in detail with reference to the accompanying drawings. Those skilled in the art will appreciate the objects, features and advantages of the present invention through this embodiment.
본 발명의 핵심 기술요지를 살펴보면, 메탈(201)이 증착(deposition)된 반도체 기판 상에 PR을 도포하고, 감광하여 PR 패턴(203) 마스크를 형성한 후, PR 패턴(203)을 마스크로 RIE 공정을 수행하여 메탈 라인(205)을 형성한다.Looking at the core technology of the present invention, after applying the PR on the semiconductor substrate on which the
이후, SiH4 혹은 TEOS를 이용한 HDP 산화막을 증착할 때, 리플로우 특성이 강한 붕소(Boron)가 포함된 가스(예컨대, BF3, B2F6) 또는 액체(TriEthylBorate, TEB: (C2H5O)3B)를 함께 도핑(doping)시켜 IMD 갭 필(207)을 수행하며, IMD 갭 필(207)된 라이너 산화막에 대하여 건식 식각을 수행하여 메탈 라인(205) 상부의 HDP 산화막을 제거하고, PECVD를 이용하여 캡 산화막(cap oxide)(209)을 형성하고 이를 CMP하여 평탄화할 수 있는 것으로, 이러한 기술적 작용을 통해 본 발명에서 목적으로 하는 바를 쉽게 달성할 수 있다.Subsequently, when depositing an HDP oxide film using SiH 4 or TEOS, a gas containing boron (eg, BF 3, B 2 F 6) or a liquid (TriEthylBorate, TEB: (C 2 H 5 O) 3B) having strong reflow characteristics may be doped together ( doping) to perform the IMD gap fill 207, dry etching the IMD gap fill 207 liner oxide layer to remove the HDP oxide layer on the
도 2a 내지 도 2d는 본 발명에 따른 반도체 소자의 IMD 형성방법에 대한 공정 과정을 도시한 단면도이다.2A to 2D are cross-sectional views illustrating a process for forming an IMD of a semiconductor device according to the present invention.
도 2a를 참조하면, 메탈(201)이 증착(deposition)된 반도체 기판 상에 PR을 도포하고, 감광하여 PR 패턴(203) 마스크를 형성한다. 이때, 메탈(201)은 베리어 메탈(barrier metal)/알루미늄(Al)/베리어 메탈의 시퀀스(sequence)로 수행한다.Referring to FIG. 2A, a PR is coated on a semiconductor substrate on which a
이후, 도 2b에 도시된 바와 같이, PR 패턴(203)을 마스크로 RIE 공정을 수행하여 메탈 라인(205)을 형성한다.Thereafter, as illustrated in FIG. 2B, the
다음으로, 도 2c를 참조하면, 메탈 라인(205) 상부에 SiH4 혹은 TEOS를 이용한 HDP 산화막(예컨대, USG(Undoped Silicon Glass)나 FSG(Fluorine doped Silicon Glass)을 증착할 때, 리플로우 특성이 강한 붕소(Boron)가 포함된 가스(예컨대, BF3, B2F6) 또는 액체(TriEthylBorate, TEB: (C2H5O)3B)를 함께 도핑(doping)시켜 IMD 갭 필(207)을 수행한다. 여기서, BF3와 B2F6의 가스 도핑량은 1∼1000sccm이며, TEB 도핑량은 1∼1000mgm이다.Next, referring to FIG. 2C, when a HDP oxide film using SiH 4 or TEOS (eg, USG (Undoped Silicon Glass) or FSG (Fluorine doped Silicon Glass) is deposited on the
마지막으로, 도 2d와 같이, IMD 갭 필(207)된 라이너 산화막에 대하여 건식 식각을 수행하여 메탈 라인(205) 상부의 HDP 산화막을 제거하고, PECVD를 이용하여 캡 산화막(cap oxide)(209)을 형성하고 이를 CMP하여 평탄화한다.Lastly, as shown in FIG. 2D, dry etching is performed on the IMD gap fill 207 liner oxide layer to remove the HDP oxide layer on the
따라서, 메탈 라인 상부에 HDP USG를 증착할 때 리플로우 특성이 강한 붕소(Boron)가 포함된 가스(예컨대, BF3, B2F6) 또는 액체(TriEthylBorate, TEB: (C2H5O)3B)를 함께 도핑(doping)시킴으로써, IMD 갭필 특성을 향상시킬 수 있으며, 이로 인하여 고성능의 반도체 소자를 제조할 수 있다.Therefore, when depositing HDP USG on the metal line, doping with a gas containing boron (eg, BF3, B2F6) or liquid (TriEthylBorate, TEB: (C2H5O) 3B) with strong reflow characteristics is performed. By doing so, the IMD gap fill characteristic can be improved, and thus a high performance semiconductor device can be manufactured.
또한, 본 발명의 사상 및 특허청구범위 내에서 권리로서 개시하고 있으므로, 본원 발명은 일반적인 원리들을 이용한 임의의 변형, 이용 및/또는 개작을 포함할 수도 있으며, 본 명세서의 설명으로부터 벗어나는 사항으로서 본 발명이 속하는 업 계에서 공지 또는 관습적 실시의 범위에 해당하고 또한 첨부된 특허청구범위의 제한 범위 내에 포함되는 모든 사항을 포함한다.In addition, since the present invention is disclosed as a right within the spirit and claims of the present invention, the present invention may include any modification, use and / or adaptation using general principles, and the present invention as a matter deviating from the description of the present specification. It includes all matters falling within the scope of the known or customary practice in the industry and falling within the scope of the appended claims.
상기에서 설명한 바와 같이, 본 발명은 메탈 라인 상부에 HDP USG를 증착할 때 리플로우 특성이 강한 붕소(Boron)가 포함된 가스(예컨대, BF3, B2F6) 또는 액체(TriEthylBorate, TEB: (C2H5O)3B)를 함께 도핑(doping)시킴으로써, IMD 갭필 특성을 향상시킬 수 있으며, 이로 인하여 고성능의 반도체 소자를 제조할 수 있는 효과가 있다.As described above, the present invention is a gas containing a high reflow characteristics of boron (Boron) (e.g., BF3, B2F6) or liquid (TriEthylBorate, TEB: (C2H5O) 3B when depositing HDP USG on the metal line By doping together), the IMD gapfill property can be improved, thereby producing a high-performance semiconductor device.
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR19990040443A (en) * | 1997-11-18 | 1999-06-05 | 윤종용 | How to fill an insulating film in a region with fine line width and high aspect ratio |
| KR20000027935A (en) * | 1998-10-29 | 2000-05-15 | 김영환 | Method for forming interlayer dielectric of semiconductor devices |
| KR20040059467A (en) * | 2002-12-30 | 2004-07-05 | 동부전자 주식회사 | Method for forming pre metal dielectric in a semiconductor |
| US20050095872A1 (en) | 2003-10-31 | 2005-05-05 | International Business Machines Corporation | Hdp process for high aspect ratio gap filling |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR19990040443A (en) * | 1997-11-18 | 1999-06-05 | 윤종용 | How to fill an insulating film in a region with fine line width and high aspect ratio |
| KR20000027935A (en) * | 1998-10-29 | 2000-05-15 | 김영환 | Method for forming interlayer dielectric of semiconductor devices |
| KR20040059467A (en) * | 2002-12-30 | 2004-07-05 | 동부전자 주식회사 | Method for forming pre metal dielectric in a semiconductor |
| US20050095872A1 (en) | 2003-10-31 | 2005-05-05 | International Business Machines Corporation | Hdp process for high aspect ratio gap filling |
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