KR100708881B1 - A manufacturing apparatus and method for silicon nano dot array and a multi level silicon non-volitile memory manufacturing method using it - Google Patents

Abstract

The present invention enables to form a high concentration uniform silicon nano dot array based on the pulsed silicon raw material gas injection, and to form a plurality of alternating layers of high concentration uniform silicon nano dot array and silicon oxide insulator layer formed in this way. An apparatus for fabricating a silicon nano dot array using a non-conductor film as a gate insulating film, and a method for manufacturing the same and a method for manufacturing a multilevel silicon nonvolatile memory using the same are provided.

According to an aspect of the present invention, there is provided a method of fabricating a silicon nano dot array, comprising: a first step of mounting an silicon substrate on a substrate holder in a reaction chamber and injecting oxygen gas into the reaction chamber to form an oxide film on the silicon substrate; Injecting a source gas into the reaction chamber to form a silicon nano dot array on the oxide film; And a third step of repeatedly injecting and evacuating the source gas into the reaction chamber to form the silicon nano dot array formed in the second step into a uniform silicon nano dot array having a high concentration.

In the present invention, in the manufacture of the silicon nano dot array by controlling the intake valves and the exhaust valve of the reaction gas, it is possible to manufacture a high density uniform high-density silicon nano dot array by the pulsed raw material gas injection There is.

 Nonvolatile Memory, Silicon Nanodot Array, Low Pressure Chemical Vapor Deposition, Pulsed Source Gas Injection

Description

Silicon nano dot array manufacturing apparatus and method for manufacturing same and multi-level silicon non-volatile memory manufacturing method using the same

1 is a view showing a silicon nano dot array manufacturing apparatus according to the present invention.

2A to 2F illustrate a process of forming a silicon nano dot array and a process of forming a multilayer insulator thin film for fabricating a multilevel silicon nonvolatile memory according to the present invention.

FIG. 3 illustrates the operating characteristics of a multilevel silicon nonvolatile memory fabricated in accordance with FIG.

Figure 4 (a) and (b) is a view showing the pressure change of the reaction chamber and the opening and closing operation of each valve for performing the process of the present invention.

Figure 4 (c) is a view showing the temperature change of the silicon substrate during the formation of silicon oxide and high density silicon nano dot array in the present invention.

<Explanation of symbols for the main parts of the drawings>

1: silicon substrate 2: oxide film

3: low density silicon nano dot 3a: high density silicon nano point

4: silicon oxide thin film 5: gate electrode

100: gas inlet 110: main intake valve

102: oxygen gas intake valve 104: reaction raw material gas 1 intake valve

106: reaction raw material gas 2 intake valve 200: reaction part

      210: substrate holder 220: reaction chamber

      230: heating wire 300: gas exhaust

      310: exhaust valve 320: vacuum pump

      400: controller

The present invention relates to an apparatus for manufacturing a silicon nano dot array and a method for manufacturing the same, and in particular, to form a high concentration uniform silicon nano dot array based on a pulsed raw material gas injection, and thus to form a high concentration uniform silicon. The present invention relates to a silicon nano dot array manufacturing apparatus using a non-conductor film formed by alternately forming a nano dot array and a silicon oxide insulator layer as a gate insulating film, and a method of manufacturing the same and a method of manufacturing a multilevel silicon nonvolatile memory using the same.

In general, a polysilicon thin film layer used for an electronic charge storage node of a silicon flash memory is formed by low pressure chemical vapor deposition (LPCVD) and is etched to a certain area. The size of the silicon thin film layer determines the write and erase time of the flash memory.

Typical write and erase times are expressed as the product of the tunneling resistance between the channel and the polysilicon storage node and the charge capacitance of the polysilicon storage node, using conventional silicon etching techniques to achieve fast flash memory write and erase times. The size of the polysilicon storage node needs to be reduced.

However, with current technology, it is very difficult to reduce the size of polysilicon storage nodes below a certain size.

Accordingly, there is a need for development of a process technology capable of growing a nanometer-sized silicon nanodot array that can replace a polysilicon storage node directly on a substrate.

As a first example of the prior art for producing a silicon nano dot array, a technique for producing a silicon oxide thin film containing a silicon nano dot array through plasma vapor chemical vapor deposition and heat treatment has been proposed (F. Iacona, C. Bongiorno, C. Spinella, S. Boninelli, and F. Priolo, J. Appl. Phys. 95 , 3723 (2004)).

In this method, a silicon oxide thin film having a large amount of silicon atoms supersaturated is manufactured by plasma vapor deposition, followed by long-term heat treatment at a high temperature of 1000 ° C. or higher to deposit silicon nano dots into the oxide. It is used to realize optical communication devices with 1.54 μm wavelength.

As a second example of the prior art, a method using an oxidation process of a silicon substrate and a silicon ion implantation technique has been proposed (KS Min, KV Shcheglov, CM Yang, HA Atwater, ML Brongersma, and A. Polman, Appl. Phys. Lett 69 , 2033 (1996)). This is necessary to perform a high temperature heat treatment process so that the silicon atoms implanted in the silicon oxide film are agglomerated into nano dots.

As a third example of the prior art, a method of sputtering silicon and silicon oxide targets at the same time has been proposed (S. Takeoka, M. Fujii, and S. Hayashi, Phys. Rev. B 62 , 16820 (2000)). This could control the size of the silicon nano dot according to the post-heating temperature and time. This process has difficulty in realizing the electrical insulating properties of the silicon oxide thin film as it is later used in silicon nano dot nonvolatile memory fabrication technology.

As a fourth example of the prior art, a technique for manufacturing silicon nanodots by pulsed laser vaporization has been proposed (T. Orii, M. Hirasawa, and T. Seto, Appl. Phys. Lett. 83 , 3395 (2003) ). The high purity silicon target was irradiated with a laser beam of high energy to generate silicon nano dots, and a very uniform silicon nano dots were deposited by mass screening. This process is applied to the realization of silicon-based optical devices, and the silicon oxide thin film growth process including the nano point growth is required for the application of silicon nano point nonvolatile memory manufacturing technology, and high electrical insulation properties are required in the thin film. Do.

As a fifth example of the prior art, there is an attempt to grow a nanodot array of metal using sputtering techniques and use this structure as a storage node (M. Takata et al, IEDM 2003). However, nano-dot arrays of metals grown by sputtering techniques have serious problems in the uniformity of their sizes, and such characteristics are difficult to secure uniform characteristics of memory devices when a large amount of highly integrated memory devices are manufactured.

Recently, there has been an attempt to fabricate a high concentration of silicon nanodot arrays by using a low pressure chemical vapor deposition method, to select a surface treatment of a substrate, and to select an appropriate reaction pressure and reaction temperature and to apply the same to a silicon nonvolatile memory device (B. De Salvo et al., IEDM 2003).

This conventional method continuously performs nanopoint array growth under the appropriate substrate reaction temperature and constant pressure, so that the size of the nanopoints grown because the initial nucleation of the nanopoints and the continuous growth after nucleation occur simultaneously throughout the reaction time. Has the disadvantage of being uneven.

The present invention has been made in view of this point, and an object of the present invention is to inject a raw material gas for a short time, react with a substrate, and then block the injection of the raw material gas and at the same time, discharge the reactive gas and simultaneously discharge the source gas. The present invention provides a device for manufacturing a silicon nano dot array and a method for manufacturing the same, wherein a high concentration uniform silicon nano dot array is formed on a substrate.

Another object of the present invention is to provide a method for fabricating a multilevel silicon nonvolatile memory using a nonconductive film formed by alternately forming a high concentration of a uniform silicon nanodot array and a silicon oxide insulator layer as a gate insulating film.

Silicon nano dot array manufacturing apparatus according to the present invention for achieving the above object, the gas suction unit is provided with a valve for various gas injection; A reaction unit configured to cause the gas injected through the gas suction unit to react with the silicon substrate mounted to the substrate holder in the reaction chamber; And a gas exhaust unit for controlling the pressure in the reaction unit while exhausting the gas in the reaction unit through an exhaust valve, wherein the silicon nano dot array manufacturing apparatus includes forming a silicon nano dot array by a low pressure chemical vapor deposition method. By controlling the opening and closing of the various valves of the gas inlet and the gas exhaust part, the raw material gas is injected into the reaction chamber for a predetermined time to react with the silicon substrate, and then the injection of the raw material gas is blocked and at the same time through the exhaust valve. It is characterized in that it further comprises a controller for controlling the density and size of the silicon nano dot array formed on the silicon substrate by repeatedly performing a pulsed gas injection to remove the reaction gas in the.

Different source gas is used every time the pulsed gas is repeatedly performed, and the source gas is SiH₄or SiF₄or SiCl₄or Si₂H₆or Si₃H₈or SiH₂Cl₂to be.

In addition, the controller controls the density and size of the silicon nano dot array based on the pressure in the reaction chamber, the injection time of the source gas, the temperature in the reaction chamber, the flow rate of the reaction gas.

Silicon nano dot array manufacturing method according to the present invention for achieving the above object, in the method for manufacturing a silicon nano dot array by a low pressure chemical vapor deposition method, after mounting a silicon substrate in a substrate holder in the reaction chamber, the reaction chamber A first step of forming an oxide film on the silicon substrate by injecting oxygen gas into the silicon substrate; Injecting a source gas into the reaction chamber to form a silicon nano dot array on the oxide film; And a third step of repeatedly injecting and evacuating the source gas into the reaction chamber to form the silicon nano dot array formed in the second step into a uniform silicon nano dot array having a high concentration.

The source gas is SiH ₄ or SiF ₄ or SiCl ₄ or SiCl ₄ or Si ₂ H ₆ or Si ₃ H ₈ or SiH ₂ Cl ₂ , and the source gas used in the third step is a continuous growth of the nano dot array grown in the second step using a source gas and a mixed gas different from the source gas used in the second step. And induce new silicon nanopoint nucleation.

In the method for manufacturing a multilevel silicon nonvolatile memory according to the present invention for achieving the above object, after mounting a silicon substrate in the substrate holder in the reaction chamber, injecting oxygen gas into the reaction chamber to form an oxide film on the silicon substrate The first step to do; Injecting a source gas into the reaction chamber to form a silicon nano dot array on the oxide film; A third step of forming a silicon nano dot array formed in the second step into a uniform silicon nano dot array having a high concentration by repeatedly injecting and evacuating a source gas into the reaction chamber; A fourth step of forming a silicon oxide thin film on the high concentration uniform silicon nano dot array; A fifth step of repeatedly performing the second to fourth steps to form a multilayer silicon oxide insulating layer; And a sixth step of forming a gate electrode on the multilayer silicon oxide insulating layer.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. However, the following examples are merely to illustrate the present invention is not limited to the contents of the present invention.

Figure 1 shows a silicon nano dot array manufacturing apparatus according to the present invention.

Silicon nano dot array manufacturing apparatus of the present invention is composed of largely four parts, the gas suction unit 100, the reaction unit 200, the gas exhaust unit 300, the reaction unit through the gas suction unit 100 ( The main intake valve 110 for the gas inlet or shut off to 200, and the controller 400 for automatically adjusting the opening and closing of the exhaust valve 310 for the gas exhaust of the reaction unit 200.

The gas suction unit 100 is introduced from the oxygen gas suction valve 102 and the reaction raw material gas 1 suction tube 103 for injecting or blocking the oxygen gas flowing from the oxygen gas suction tube 101 into the reaction unit 200. Reaction raw material gas 2 flowing from the reaction raw material gas 1 intake valve 104, the reaction raw material gas 2 suction pipe 105 for injecting or blocking the reaction raw material gas containing silicon atoms to the reaction unit 200, the reaction Reaction raw material gas 2 inlet valve 106 for injecting or blocking into the unit 200, oxygen gas introduced through the valves 102, 104, 106 under the control of the controller 400, It consists of a main inlet valve 110 for the inlet or blocking of the reaction unit 200, such as the reaction raw material gas 1,2.

The reaction unit 200 includes a substrate holder 210 on which the silicon substrate 1 is mounted, and reacts with the gas flowing through the valves 102, 104, 106, and 110. The reaction chamber 220 is installed outside the reaction chamber 220 and consists of a heating line 230 for applying heat in the reaction chamber 220. The heating line 230 is wound around the reaction chamber 220, in this case the reaction chamber 220 uses a quartz tube.

The gas exhaust unit 300 includes an exhaust valve 310 for exhausting gas in the reaction unit 200 and a vacuum pump 320 for pressure control in the reaction chamber 220.

In addition, the controller 400 is composed of a PC, the opening and closing control of the main intake valve 110 and exhaust valve 310 for the flow and blocking of the process reaction gas, the operation control of the vacuum pump 320 and the oxygen By controlling the opening and closing of the gas intake valve 102, the reaction raw material gas 1 intake valve 104, and the reaction raw material gas 2 intake valve 106, the silicon raw material gas is flowed for a few seconds (for example, 1 second) and the gas is flowed. By inducing only the initial generation of silicon nanopoints by removing the pulsed gas injection process, the nanometer-sized array of nanometer-sized silicon nanodots can be solved by solving the non-uniformity of the size of continuous growth of silicon nanopoints under the proper temperature and constant pressure. By repeating this pulsed gas injection process, high density silicon nanodot arrays can be formed.

That is, in the present invention, the pulsed gas injection is performed by injecting the reaction raw material gas for a short time to react with the silicon substrate 1 and then controlling the main intake valve 110 to block the injection of the raw material gas and at the same time the exhaust valve 310 to control the reaction gas in the reaction unit 200 is referred to.

That is, a process of injecting the reaction raw material gas into the reaction unit 200 through the main inlet valve 110 for a short time and reacting, and exhausting the raw material gas through the exhaust valve 310 is expressed as a pulse.

In addition, the present invention is used to form a variety of silicon nano-dot array by changing the gas used for each pulse. In other words, inducing the generation of nano dots, a high concentration of silicon nano dot arrays are formed by using gas pulses using Si ₂ H ₆ and Si ₃ H ₈ , which are known to have high silicon growth. Different types of source gas and mixed gas are used to control the size according to the growth.

In addition, the combination of gases with different characteristics in each pulse forms a specific array of silicon nanodots, as well as in combination with other gases. Etc., to form silicon nanodot arrays with specific sizes and densities.

A process of forming a silicon oxide film, a nano dot array, and a silicon oxide using the silicon nano dot array manufacturing apparatus of the present invention configured as described above will be described with reference to FIGS. 2A through 2F.

First, the silicon substrate 1 is cleaned using a chemical cleaning method, and then mounted on the substrate holder 210 in the reaction chamber 220, the exhaust valve 310 is opened, and the vacuum pump 320 is operated to operate the reaction chamber. The vacuum in (22) is kept below several mTorr.

Thereafter, the controller 400 maintains the temperature of the silicon substrate 1 by 900 to 1,000 ° C. by flowing a current through the heating line 230. Subsequently, the oxygen gas intake valve 102 and the main intake valve 110 are opened and the exhaust valve 310 is adjusted to maintain the internal pressure of the reaction chamber 220 by several torr, so as shown in FIG. 2A. A thin oxide film 2 having a thickness of several nm is formed on the substrate 1.

After forming the oxide film 2 having a predetermined thickness, the oxygen gas intake valve 102 and the main intake valve 110 are closed and the exhaust valve 310 is opened, thereby reducing the pressure of the oxygen gas in the reaction chamber 220. The oxide film forming reaction is stopped by keeping the vacuum in the reaction chamber 220 below mTorr.

Subsequently, the temperature of the heating substrate 230 is controlled to maintain the temperature of the silicon substrate 1 at 450 to 550 ° C., and the reaction raw material gas 1 suction valve 104 and the main suction for injection of the raw material gas containing silicon atoms. By opening the valve 110 and adjusting the exhaust valve 310, the internal pressure of the reaction chamber 220 is maintained at about several Torr so that several nanometers of silicon nanoparticles are formed on the silicon oxide film 2 shown in FIG. 2A. The dot array 3 is formed.

After forming the nanometer sized silicon nanodot array 3 for a short time, the reaction raw material gas 1 intake valve 104 and the main intake valve 110 are closed to block the injection of source gas containing silicon atoms. By opening the exhaust valve 310, the pressure of the source gas containing silicon atoms in the reaction chamber 220 is removed, and the silicon nano dot array 3 is maintained by maintaining the vacuum in the reaction chamber 220 at several mTorr or less. The formation reaction is stopped.

The pulsed gas injection technique in which the raw material reaction gas is injected for a short time to form the silicon nano dot array 3 on the surface of the silicon substrate 1 induces nucleation of the silicon nano dots, and then the nano dots grow large. It does not have enough time for crystal growth to form a uniform array of silicon nanodots 3 of several nanometers in size as shown in FIG. 2B.

In order to form a high concentration uniform silicon nano dot array, the pulsed gas injection technique described in FIG. 2B is repeatedly used to form a high density uniform high density silicon nano dot array 3a as shown in FIG. 2C. do.

In addition, in the continuously repeated pulsed gas injection technique, the temperature of the silicon substrate 1 is lowered to 400 to 500 ° C., and the continuous growth of the silicon nano dot array that has been grown by using different kinds of source gas and mixed gas is continued. And at the same time induce new silicon nanopoint nucleation to form a high concentration of silicon nanopoint arrays. SiH _4, SiF _4, SiCl _4, Si ₂ H _6, Si ₃ H _{8, and} SiH ₂ Cl ₂ are used for the raw material gas containing the silicon atom used in the present invention.

Subsequently, the silicon oxide thin film 4 is formed as shown in FIG. 2D in order to apply the high concentration uniform silicon nano dot array of the present invention to the gate insulating film of the silicon nonvolatile memory device.

At this time, the temperature of the silicon substrate (1) is maintained at about 900 ℃, simultaneously flowing a source gas and oxygen gas containing silicon atoms to the reaction chamber 220 at a predetermined ratio and by adjusting the exhaust valve 310 to control the reaction chamber ( 220) is maintained at 0.1 ~ 1 Torr.

In the above, the ratio of source gas and oxygen gas depends on which source gas is used. In case of using SiH _4, SiF _4, SiCl _4, SiH ₂ Cl ₂ gas or a combination thereof, the ratio of these gases and oxygen gas is about 1: 1, and the Si ₂ H _6, Si ₃ H ₈ gas or combination thereof is used. When using the ratio of these gases and oxygen gas is about 1: 2. The reason for this difference is that SiO ₂ is grown in the silicon oxide thin film growth process.

Meanwhile, after forming the nanometer-thick silicon oxide thin film 4, the reaction raw material gas 1 intake valve 104 and the oxygen gas intake valve 102 to block the inflow of source gas and oxygen gas containing silicon atoms. The silicon oxide thin film 4 is stopped by removing the pressure in the reaction chamber 220 and maintaining the vacuum in the reaction chamber 220 at several mTorr or less by closing the and opening the exhaust valve 310.

In this process, as shown in FIG. 2D, a high-density silicon nano dot array 3a is formed on the silicon substrate 1 between the silicon oxide film 2 and the silicon oxide thin film 4.

In addition, the steps of FIGS. 2B, 2C, and 2D are sequentially repeated to produce a multilayer silicon oxide insulating layer in which the high density silicon nano dot array 3a is present between the silicon oxide thin films 4.

2E illustrates a multilayer insulating layer structure of silicon oxide, which is used as a gate insulating layer in a silicon MOS transistor structure, as shown in FIG. 2F, and may be used to fabricate a silicon nonvolatile memory device. Reference numeral 5 denotes a gate electrode.

The silicon nano dot array shown in FIG. 2F acts as a storage node of electronic charging in accordance with the gate voltage in the operation of the memory device.

The memory level is determined according to the extent to which electrons are charged in the storage node, which is equal to the number of silicon nano dot array 3a layers illustrated in FIG. 2E, and thus operates as a multilevel nonvolatile memory.

FIG. 3 is a view illustrating operating characteristics of the nonvolatile memory according to FIG. 2F. When electrons penetrate through each of the high density silicon nano dot arrays 3a of the insulator according to the gate voltage and are sequentially charged in the thickness direction, the memory device is activated. The operating voltage is changed and retains several constant active operating voltage characteristics as the staged charging of the dense silicon nanodot array 3a. This feature allows the memory device of the present invention to operate as a multilevel nonvolatile memory.

Figure 4 (a) shows the change in the pressure in the reaction chamber of the gases according to the silicon oxide film forming process and the pulse type gas injection process for forming a high density of uniform high density silicon nano dot array and the silicon oxide thin film forming process according to the present invention As shown in time, the silicon nano-dot array (3), (3a) is formed, the raw material injection is characterized by the instant pulse injection.

In addition, Figure 4 (b) shows the opening and blocking operation of the source gas and oxygen gas intake valve and exhaust valve for adjusting the pressure change in the reaction chamber of Figure 4 (a), the main intake after the instant gas injection The closing of the valve 110 and the opening of the exhaust valve 310 are shown to occur almost simultaneously.

Figure 4 (c) shows the temperature change of the silicon substrate during the silicon oxide formation process and forming the high density silicon nano dot array. In FIG. 4C, the tunneling oxide thin film refers to the oxide film 2 of FIG. 2A.

As described above, although described with reference to a preferred embodiment of the present invention, those skilled in the art various modifications of the present invention without departing from the spirit and scope of the invention described in the claims below Or it may be modified.

As described above, in the present invention, in manufacturing the silicon nano-dot array using low pressure chemical vapor deposition, by controlling the intake valves and the exhaust valves of the reaction gas with a computer, pulsed source gas injection is possible, and thus high concentration uniformity is achieved. There is an effect to produce a high density silicon nano dot array.

In addition, the gate insulating layer including the multilayer silicon nano dot array may be fabricated by sequentially repeating the high concentration uniform silicon nano dot array forming process and the silicon oxide forming process, which may prevent the operation of the multilevel silicon nonvolatile memory. There is an effect to increase.

Claims (16)

A gas inlet having a valve for injecting various gases; A reaction unit configured to cause the gas injected through the gas suction unit to react with the silicon substrate mounted to the substrate holder in the reaction chamber; And a gas exhaust unit for controlling the pressure in the reaction unit while exhausting the gas in the reaction unit through an exhaust valve, wherein the silicon nano dot array manufacturing apparatus includes forming a silicon nano dot array by a low pressure chemical vapor deposition method. By controlling the opening and closing of the various valves of the gas inlet and the gas exhaust part, the raw material gas is injected into the reaction chamber for a predetermined time to react with the silicon substrate, and then the injection of the raw material gas is blocked and at the same time through the exhaust valve. And a controller for controlling the density and size of the silicon nano dot array formed on the silicon substrate by repeatedly performing pulsed gas injection to remove reaction gas therein. The silicon nano dot array manufacturing apparatus according to claim 1, wherein a different source gas is used for each pulse type gas injection repeatedly performed. The method of claim 1 or 2, wherein the source gas is SiH ₄ or SiF ₄ or SiCl ₄ or Si ₂ H ₆ or Si ₃ H ₈ or SiH ₂ Cl ₂ silicon nano dot array manufacturing apparatus characterized in that. The apparatus of claim 1, wherein the injection time of the source gas is several seconds. The method of claim 1, wherein the controller And controlling the density and size of the silicon nano dot array on the basis of the pressure in the reaction chamber, the injection time of the source gas, the temperature in the reaction chamber, and the flow rate of the reaction gas. In the method of manufacturing a silicon nano dot array by a low pressure chemical vapor deposition method, Mounting a silicon substrate on a substrate holder in the reaction chamber, and injecting oxygen gas into the reaction chamber to form an oxide film on the silicon substrate; Injecting a raw material gas into the reaction chamber to form a silicon nano dot array on the oxide film; And A third step of forming a silicon nano dot array formed in the second step into a uniform silicon nano dot array having a high concentration by repeatedly injecting and evacuating a source gas into the reaction chamber; Silicon nano dot array manufacturing method comprising a. The method of claim 6, wherein the source gas SiH ₄ or SiF ₄ or SiCl ₄ or Si ₂ H ₆ or Si ₃ H ₈ or SiH ₂ Cl ₂ silicon nano dot array manufacturing method characterized in that. The method of claim 6, wherein the source gas is injected for several seconds. The method of claim 6, wherein the source gas used in the third step is a continuous growth of the nano-dot array grown in the second step using a source gas and a mixed gas different from the source gas used in the second step Method for producing a silicon nano-dot array, characterized in that to inhibit the induction of new silicon nano-point nucleation. The method of claim 6, wherein the silicon nano-dot array in the second step to form a silicon nano-dot array, characterized in that for maintaining the temperature of the silicon substrate at 450 ~ 550 ℃, the pressure in the reaction chamber to several Torr Way. The method of claim 6, wherein the temperature of the silicon substrate is maintained at 400 ° C. to 500 ° C. to form a uniform silicon nano dot array having a high concentration in the third step. 7. The method of claim 6, wherein the source gas repeatedly injected into the reaction chamber in the third step is different for each injection. Mounting a silicon substrate on a substrate holder in the reaction chamber, and injecting oxygen gas into the reaction chamber to form an oxide film on the silicon substrate; Injecting a source gas into the reaction chamber to form a silicon nano dot array on the oxide film; A third step of forming a silicon nano dot array formed in the second step into a uniform silicon nano dot array having a high concentration by repeatedly injecting and evacuating a source gas into the reaction chamber; A fourth step of forming a silicon oxide thin film on the high concentration uniform silicon nano dot array; A fifth step of repeatedly performing the second to fourth steps to form a multilayer silicon oxide insulating layer; And Forming a gate electrode on the multilayer silicon oxide insulating layer; Method for manufacturing a multi-level silicon nonvolatile memory, comprising a. The method of claim 13, wherein the source gas is SiH ₄ or SiF ₄ or SiCl ₄ or Si ₂ H ₆ or Si ₃ H ₈ or A method for manufacturing a multilevel silicon nonvolatile memory, characterized in that SiH ₂ Cl ₂ . 15. The method of claim 13, wherein the source gas used in the third step is a continuous growth of the nano-dot array grown in the second step using a source gas and a mixed gas different from the source gas used in the second step A method for manufacturing a multilevel silicon non-volatile memory, characterized in that it inhibits and induces new silicon nanopoint nucleation. The method of claim 13, wherein the source gas repeatedly injected into the reaction chamber in the third step is different from each other.

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