KR100685913B1 - Alignment Key of Semiconductor Device - Google Patents

Alignment Key of Semiconductor Device Download PDF

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Publication number
KR100685913B1
KR100685913B1 KR1020000043980A KR20000043980A KR100685913B1 KR 100685913 B1 KR100685913 B1 KR 100685913B1 KR 1020000043980 A KR1020000043980 A KR 1020000043980A KR 20000043980 A KR20000043980 A KR 20000043980A KR 100685913 B1 KR100685913 B1 KR 100685913B1
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South Korea
Prior art keywords
alignment key
mask
semiconductor device
alignment
key
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KR1020000043980A
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Korean (ko)
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KR20020010323A (en
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박철우
이형석
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엘지.필립스 엘시디 주식회사
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Priority to KR1020000043980A priority Critical patent/KR100685913B1/en
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    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F9/00—Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically
    • G03F9/70—Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically for microlithography
    • G03F9/7073—Alignment marks and their environment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/544—Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544—Marks applied to semiconductor devices or parts
    • H01L2223/54426—Marks applied to semiconductor devices or parts for alignment

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Preparing Plates And Mask In Photomechanical Process (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)

Abstract

본 발명은 설계 효율을 향상시키는데 적당한 반도체 장치의 정렬키에 관한 것으로 계측기구의 현미경 배율에 따라서 다양한 크기를 갖는 정렬키에 있어서, 마스크상에 소정위치에 양각으로 형성되는 제 1 정렬키와, 상기 제 1 정렬키에 중첩되고 음각으로 형성되는 제 2 정렬키를 포함하여 구성된다.The present invention relates to an alignment key of a semiconductor device suitable for improving design efficiency, comprising: a first alignment key embossed at a predetermined position on a mask in an alignment key having various sizes according to a microscope magnification of a measuring instrument; And a second alignment key superimposed on the first alignment key and formed intaglio.

정렬키(Alignment Key)Alignment Key

Description

반도체 장치의 정렬키{Alignment Key of Semiconductor Device}Alignment Key of Semiconductor Device

도 1은 종래의 패턴 검사기의 정렬키를 나타낸 평면도1 is a plan view showing an alignment key of a conventional pattern checker

도 2는 종래의 CD 메타용 정렬키를 나타낸 평면도Figure 2 is a plan view showing a conventional alignment key for CD meta

도 3은 종래의 반도체 장치의 정렬키의 마스크내 배치도3 is a layout view within a mask of an alignment key of a conventional semiconductor device;

도 4는 본 발명의 실시예에 따른 정렬키를 나타낸 평면도4 is a plan view showing an alignment key according to an embodiment of the present invention.

도 5는 본 발명의 실시예에 따른 반도체 장치의 정렬키의 마스크내 배치도5 is a layout view within a mask of an alignment key of a semiconductor device according to an embodiment of the present invention.

도면의 주요부분에 대한 부호설명Explanation of Signs of Major Parts of Drawings

3 : 제 1 정렬키 4 : 제 2 정렬키3: first alignment key 4: second alignment key

5: 음/양각 동시 적용 정렬키 6 : 마스크5: Negative / Embossed Simultaneous Alignment Key 6: Mask

본 발명은 반도체 제조 공정 기술에 관한 것으로 특히, 설계의 효율성을 향상시키는데 적당한 반도체 장치의 정렬키에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to semiconductor manufacturing process technology, and more particularly, to an alignment key of a semiconductor device suitable for improving design efficiency.

일반적으로 반도체 집적 회로 공정에 있어서, 동일한 반도체 기판의 각종 패턴을 검사하거나 두께를 측정하거나 최종 완성 전수 검사를 하거나 CD(Critical Dimension)를 정하는데 사용되는 여러 장비들을 정렬시키기 위하여 정렬키(Alignment Key)를 사용하게 된다. In general, in an integrated semiconductor process, an alignment key is used to align various devices used to inspect various patterns of the same semiconductor substrate, measure thickness, perform a final inspection, or determine a critical dimension (CD). Will be used.

그런데, 각 장비들에 따른 정렬키의 모양과 그 크기를 인식하는 현미경의 배율이 상이하므로 상기 정렬키는 각 계측 장비에서 인식될 수 있는 모양 및 크기로 제작되어야 한다.However, since the magnification of the microscope for recognizing the shape and the size of the alignment key according to each device is different, the alignment key should be manufactured in a shape and size that can be recognized by each measurement device.

따라서, 상기 정렬키는 계측 장비에 따라서 다양한 모양과 크기를 갖게된다.Thus, the alignment key may have various shapes and sizes depending on the measurement equipment.

이하, 첨부된 도면을 참조하여 종래의 반도체 장치의 정렬키를 설명하면 다음과 같다.Hereinafter, an alignment key of a conventional semiconductor device will be described with reference to the accompanying drawings.

도 1은 종래의 패턴 검사기의 정렬키의 평면도이고, 도 2는 종래의 CD 메타용 정렬키의 평면도이고, 도 3은 종래의 반도체 장치의 정렬키의 마스크내 배치도이다.1 is a plan view of an alignment key of a conventional pattern inspector, FIG. 2 is a plan view of an alignment key for a conventional CD meta, and FIG. 3 is a layout view in a mask of an alignment key of a conventional semiconductor device.

종래의 정렬키는 반도체 장비의 현미경 배율에 따라 다양한 크기로 마스크(6)에 형성되었으며, 마스크(6)상에 서로 다른 위치에 배열되었다.Conventional alignment keys are formed in the mask 6 in various sizes according to the microscope magnification of the semiconductor equipment, and arranged at different positions on the mask 6.

즉, 도 1 내지 도 2에 나타낸 바와 같이, 패턴 검사기의 현미경 배율이 CD 메터(Meter)의 현미경 배율에 비해 상대적으로 작기 때문에 패턴 검사기에서 사용되는 마스크(6)의 정렬키(1)의 크기는 1.5mm 정도로 상대적으로 크게 형성되고, 상기 CD 메터에서 사용되는 마스크(6)의 정렬키(2)의 크기는 70㎛ 정도로 상대적으로 작게 형성된다.That is, as shown in Figs. 1 to 2, since the microscope magnification of the pattern inspector is relatively small compared to the microscope magnification of the CD meter, the size of the alignment key 1 of the mask 6 used in the pattern inspector is It is formed relatively large at about 1.5 mm, and the size of the alignment key 2 of the mask 6 used in the CD meter is formed relatively small at about 70 µm.

뿐만아니라, 이와같이 반도체 장비의 현미경 배율에 따라 정렬키의 크기가 다르기 때문에 사용되는 마스크(6)가 여러 장비에서 사용될 경우는 도 3에 도시한 바와같이, 각각 별도의 위치에 해당 정렬키를 배열하였다.In addition, since the size of the alignment key is different according to the microscope magnification of the semiconductor equipment, when the mask 6 to be used is used in various equipments, as shown in FIG. 3, the alignment keys are arranged at separate positions. .

그러나, 상기와 같은 종래 반도체 장치의 정렬키는 다음과 같은 문제점이 있다.However, the alignment key of the conventional semiconductor device as described above has the following problems.

첫째, 마스크내에 복수개의 정렬키들을 따로따로 배치하므로써 마스크의 유효 면적이 줄어들고 복잡해진다.First, by arranging a plurality of alignment keys separately in the mask, the effective area of the mask is reduced and complicated.

둘째, 상기 따로따로 배치된 정렬키로 인하여 마스크 패턴 형성시에 공정 마진이 줄어들어 설계상에 심각한 어려움이 발생된다.Second, due to the separately arranged alignment keys, the process margin is reduced when forming the mask pattern, which causes serious difficulties in design.

본 발명은 상기와 같은 문제점을 해결하기 위하여 안출한 것으로, 서로 다른 크기의 정렬키를 중첩하여 배치하고, 이들이 서로 구별될 수 있도록 음각과 양각으로 구분되도록 하여 설계의 효율을 향상시킬 수 있는 반도체 장비의 정렬키를 제공하는데 그 목적이 있다.The present invention has been made in order to solve the above problems, semiconductor devices that can be arranged by overlapping the arrangement keys of different sizes, so that they can be divided into intaglio and embossed so that they can be distinguished from each other to improve the design efficiency Its purpose is to provide a sort key for.

상기와 같은 목적을 달성하기 위한 본 발명의 반도체 장치의 정렬키는 서로 다른 크기를 갖는 제 1, 제 2 정렬키를 마스크상의 동일 위치에 중첩하여 배치하고 상기 제 1 정렬키와 제 2 정렬키를 구분하기 위하여 제 1 정렬키를 음각으로 나타내고 제 2 정렬키를 양각으로 나타냄에 그 특징이 있다.In order to achieve the above object, an alignment key of a semiconductor device of the present invention is arranged by overlapping first and second alignment keys having different sizes at the same position on a mask, and arranging the first alignment key and the second alignment key. In order to distinguish, the first alignment key is engraved and the second alignment key is embossed.

이하, 첨부된 도면을 참조하여 본 발명의 반도체 장치의 정렬키를 상세히 설명하면 다음과 같다.Hereinafter, the alignment key of the semiconductor device of the present invention will be described in detail with reference to the accompanying drawings.

도 4는 본 발명의 실시예에 따른 정렬키의 평면도이고, 도 5는 본 발명의 실시예에 따른 반도체 장치의 정렬키의 마스크내 배치도이다. 4 is a plan view of an alignment key according to an embodiment of the present invention, and FIG. 5 is a layout view in a mask of the alignment key of the semiconductor device according to an embodiment of the present invention.                     

도 4에 도시된 바와 같이, 본 발명의 실시예에 따른 반도체 장치의 정렬키는 상대적으로 작은 사이즈를 갖는 제 1 정렬키(3)를 마스크(6)상에 소정부분에 양각으로 형성하고, 상대적으로 큰 사이즈를 갖는 제 2 정렬키(4)를 상기 제 1 정렬키(3)와 중첩되도록 음각으로 형성한 것이다.As shown in FIG. 4, the alignment key of the semiconductor device according to the embodiment of the present invention forms a first alignment key 3 having a relatively small size on the mask 6 by embossing a predetermined portion, The second alignment key 4 having a large size is formed in an intaglio so as to overlap the first alignment key 3.

물론, 상기와 반대로 큰 사이즈의 제 1 정렬키(3)를 음각으로 형성하고 작은 사이즈의 제 2 정렬키(4)를 양각으로 형성하여도 무방하다.Of course, in contrast to the above, the large first alignment key 3 may be intaglio and the small second alignment key 4 may be embossed.

도 5는 상기 도 4의 음/양각 동시 적용 정렬키(5)를 기입한 마스크(6)를 나타낸 것으로 마스크(6)의 유효 면적이 증가되고 패턴이 단순화됨을 나타낸다.FIG. 5 shows a mask 6 in which the negative / embossed simultaneous application alignment key 5 of FIG. 4 is written, indicating that the effective area of the mask 6 is increased and the pattern is simplified.

상기와 같은 본 발명의 반도체 장치의 정렬키는 다음과 같은 효과가 있다.The alignment key of the semiconductor device of the present invention as described above has the following effects.

첫째, 음각의 정렬키와 양각의 정렬키를 중첩하여 형성하므로써 마스크 패턴의 설계 마진을 향상시킬 수 있다.First, the design margin of the mask pattern can be improved by overlapping the intaglio alignment keys and the intaglio alignment keys.

둘째, 보다 다양한 크기의 정렬키를 적용할 수 있으므로 정렬의 정도를 향상시킬 수 있다.Second, since more various sort keys can be applied, the degree of sorting can be improved.

Claims (3)

마스크상에 소정위치에 양각으로 형성되는 제 1 정렬키와,A first alignment key embossed at a predetermined position on the mask; 상기 제 1 정렬키에 중첩되고 음각으로 형성되는 제 2 정렬키를 구비함을 특징으로 하는 반도체 장치의 정렬키.And a second alignment key superimposed on the first alignment key and formed in an intaglio. 제 1항에 있어서, 상기 제 1 정렬키가 상기 제 2 정렬키보다 상대적으로 큰 사이즈를 갖음을 특징으로 하는 반도체 장치의 정렬키The alignment key of claim 1, wherein the first alignment key has a size larger than that of the second alignment key. 제 1항에 있어서, 상기 제 1 정렬키가 상기 제 2 정렬키보다 상대적으로 작은 사이즈를 갖음을 특징으로 하는 반도체 장치의 정렬키.The alignment key of claim 1, wherein the first alignment key has a smaller size than the second alignment key.
KR1020000043980A 2000-07-29 2000-07-29 Alignment Key of Semiconductor Device KR100685913B1 (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP4012769A4 (en) * 2019-08-06 2023-08-30 LG Electronics Inc. Method for manufacturing display device, and substrate for manufacture of display device

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20000018993A (en) * 1998-09-08 2000-04-06 윤종용 Overlay metrology key device of semiconductor lithography process and method for measuring the same

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20000018993A (en) * 1998-09-08 2000-04-06 윤종용 Overlay metrology key device of semiconductor lithography process and method for measuring the same

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
1020000018993

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP4012769A4 (en) * 2019-08-06 2023-08-30 LG Electronics Inc. Method for manufacturing display device, and substrate for manufacture of display device

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