KR100675729B1 - Stack package using flexible substrate - Google Patents

Abstract

The present invention relates to a stack package using a flexible substrate, and provides a stack package implemented by stacking flip chip bonded semiconductor chips and tab bonded semiconductor chips on a single flexible substrate. That is, a first tab bonding region, a second tab bonding region connected to the first tab bonding region and folded to face each other at a predetermined interval, and a direction in which the first tab bonding region and the second tab bonding region are connected to each other. A flexible substrate having a flip chip bonding region connected to the first tab bonding region in a vertical direction and folded to face the second tab bonding region; A first chip tab bonded to the first tab bonding region between the folded first tab bonding region and the second bonding region; A second chip tab-bonded to the second tab bonding region, the second chip having a rear surface attached to the rear surface of the first chip; A third chip flip-chip bonded to a flip chip region of the flexible substrate, the third chip having a rear surface attached to an opposite surface of the second tab bonding region to which the second chip is flip chip bonded; And a plurality of external connection terminals formed on opposite surfaces of the flip chip bonding region in which the third chip is bonded.

Flexible Board, Tape Wiring Board, Stacked, Multi Chip, Package

Description

Stack package using flexible substrate {Stack package using flexible substrate}

1 is a perspective view showing the laminated package using a flexible substrate according to the present invention,

2 is a cross-sectional view taken along line 2-2 of FIG. 1;

3 is a plan view illustrating a semiconductor chip mounted on a flexible substrate strip.

Description of the main parts of the drawing

10: flexible substrate 12: first tab bonding region

14 second tab bonding region 16 flip chip bonding region

20: first chip 30: second chip

40: third chip 52, 54, 56: molding resin

60: solder bump 72: first adhesive

74: second adhesive 100: laminated package

The present invention relates to a semiconductor package, and more particularly, to a stack package using a flexible substrate implemented by stacking a flip chip bonded semiconductor chip and a tab bonded semiconductor chip on a single flexible substrate.

Since a typical semiconductor wafer is a plane, there is a limit to improving the integration degree of a semiconductor device in one plane. In addition, a lot of facility investment is required to improve the density. Therefore, many companies and academia are investigating stacking method of high density 3D chip and 3D package for high integration of semiconductor package. That is, a method of increasing the degree of integration after cutting a semiconductor wafer into individual semiconductor devices is being studied.

The three-dimensional stacked package manufactured by stacking a plurality of unit packages in three dimensions may achieve high integration, but has a problem in that the thickness thereof is inferior to light and thin shortening of a semiconductor product.

The three-dimensional stacked chip package manufactured by stacking a plurality of semiconductor devices in three dimensions can achieve high integration and excellent response to light and thin reduction of semiconductor products. In general, a chip-on-chip structure in which semiconductor chips are stacked on a semiconductor chip is implemented, and mutual interference between bonding wires used for electrical connection and potential damage of an active surface of a semiconductor chip disposed below exist. Constraints in chip size between stacked chips have become a problem. For example, in the case of stacking semiconductor chips of the same size, a variety of semiconductor chips, such as the difference in the size of the semiconductor chip due to the difficulty of wire bonding and the electrode pad arrangement of each semiconductor chip is different from the center pad and the edge pad There is a problem in applying it.

When the semiconductor device is flip chip bonded to the substrate, the thickness of the semiconductor product may be minimized. However, there is a limit to stacking semiconductor elements in three dimensions by a flip chip bonding method. That is, after flip chip bonding of one (first) semiconductor device to a substrate, the second semiconductor device can be stacked three-dimensionally on the first semiconductor device, but the first and second semiconductor devices are electrically It is not easy to connect.

Accordingly, an object of the present invention is to implement a stacked package regardless of the semiconductor chip size.

Another object of the present invention is to implement a stack package by stacking a flip chip bonded semiconductor chip and a tab bonded semiconductor chip.

In order to achieve the above object, a laminated package using a flexible substrate, a first tab bonding region, a second tab bonding region connected to the first tab bonding region and folded to face each other at a predetermined interval, A flexible substrate having a flip chip bonding region connected to the first tab bonding region in a direction perpendicular to the direction in which the first tab bonding region and the second tab bonding region are connected, and folded to face the second tab bonding region; A first chip tab bonded to the first tab bonding region between the folded first tab bonding region and the second bonding region; A second chip tab-bonded to the second tab bonding region, the second chip having a rear surface attached to the rear surface of the first chip; A third chip flip-chip bonded to a flip chip region of the flexible substrate, the third chip having a rear surface attached to an opposite surface of the second tab bonding region to which the second chip is flip chip bonded; And a plurality of external connection terminals formed on opposite surfaces of the flip chip bonding region in which the third chip is bonded.

In the laminated package according to the present invention, the tab bonded regions of the first and second chips and the flip chip bonded regions of the third chip are each covered with a liquid resin to be protected from the external environment.

In addition, a slot may be formed in the folded portion of the flexible substrate to increase flexibility.

Hereinafter, with reference to the accompanying drawings will be described in detail an embodiment of the present invention.

FIG. 1 is a perspective view showing an unfolded stack package 100 using a flexible substrate 10 according to the present invention. FIG. 2 is a cross-sectional view taken along the line 2-2 of FIG. 1. 3 is a plan view illustrating a state in which semiconductor chips 20, 30, and 40 are mounted on the flexible substrate strip 10a.

1 to 3, the stack package 100 includes a flexible substrate 10, semiconductor chips 20, 30, 40, and solder bumps 60 stacked in three layers on the flexible substrate 10. It is composed of

The flexible substrate 10 may include a first tab bonding region 12, a second tab bonding region 14 connected to the first tab bonding region 12 and folded to face each other at a predetermined interval, and the first tab bonding region 12. A flip chip bonding region connected to the first tab bonding region 12 in a direction perpendicular to the direction in which the tab bonding region 12 and the second tab bonding region 14 are connected and folded to face the second tab bonding region 14. Has 16. That is, in the flexible substrate 10, the second tab bonding region 14 is connected to one side of the first tab bonding region 12, and the first tab is perpendicular to the second tab bonding region 14. Since the flip chip bonding region 16 is connected to the bonding region 12, the flip chip bonding region 16 has a cross-sectional shape as shown in FIG.

The first chip 20 is tab bonded to the tab lead 15a of the first tab bonding region 12 between the folded first tab bonding region 12 and the second tab bonding region 14, and the second chip ( 30 is tab bonded to the tab lead 15b of the second tab bonding region, the back surface of which is attached to the back surface of the first chip 20 via the first adhesive 72. The tab bonded portions of the first and second chips 20, 30 are covered with liquid molding resins 52, 54, respectively, to protect them from the external environment.

The third chip 40 is flip chip bonded to the bump pad 15c of the flip chip bonding region 16, and the back side of the third chip 40 is opposite to the second tab bonding region 14 in which the second chip 30 is tab bonded. It adheres through the 2nd adhesive agent 74. FIG. The flip chip bonded portion of the third chip 40 is covered with a liquid molding resin 56 to be protected from the external environment, and the liquid molding resin is filled by an underfill method.

In addition, the solder bumps 60 for the external connection terminal have a structure formed on the flip chip region 16 to which the third chip 40 is bonded, and the first to second through the wiring pattern 15 of the flexible substrate. The third chip 20, 30, 40 makes an electrical connection.                     

Referring to the laminated package 100 according to an embodiment of the present invention in more detail, the flexible substrate 10 is a polyimide tape 13 and a photolithography on one surface of the polyimide tape 13 and a wiring pattern 15 formed by photolithography. In other words, the copper foil is patterned by photolithography in a state where a copper foil is attached to one surface of the polyimide tape 13, and the tab leads 15a and 15b for tap bonding and flip chip bonding are formed. The wiring pattern 15 including the bump pads 15c for forming is formed. The flexible substrate 10 is formed in a transverse shape, and the window 19 is exposed so that the tab leads 15a and 15b are exposed at the center portions of the first and second tab bonding regions 12 and 14 adjacent to each other. Formed. A connection hole 17 is formed through the polyimide tape 13 to expose a portion of the wiring pattern 15, that is, a disc shaped solder bump pad 15d on which the solder bumps 60 are to be formed. Holes 17 are formed in flip chip bonding region 16. And a wiring pattern 15e (hereinafter, referred to as a shared wiring pattern) between the first and second tab bonding regions 12 and 14 and between the first tab bonding region 12 and the flip chip bonding region 16. May be formed to be shared, and a plurality of slots 18 may be formed to increase flexibility of the bent portion of the flexible substrate 10.

Meanwhile, as illustrated in FIG. 3, the flexible substrate 10 is provided in the form of a strip 10a so as to manufacture a plurality of stacked packages 100 together, and is formed in two rows by n rows (n: natural number). A window 19 including the wiring pattern 15 is formed to mount the first to third chips 20, 30, and 40. In this case, the flexible substrate strip 10a may be tab bonded to the first and second chips 20 and 30 in the first and third rows, and flip chip bonded to the third chips 40 in the second row. It is formed in the form of a strip in units. Then, the flexible substrate strip 10a is cut into an area in which the first to third chips 20, 30, and 40 are bonded to each other and manufactured as a single stacked package, and is formed in three rows and two rows. The first to third chips of the second row are cut to form another stacked package. On the contrary, the first and third chips bonded in one row, two rows, two rows, and three rows and one row may be cut to form a stacked package. Meanwhile, a portion indicated by a dotted line in FIG. 3 indicates the unit flexible substrate 10 made of one stacked package.

The manufacturing steps of the laminated package 100 having such a structure will be described with reference to FIGS. 1 to 3 as follows.

First, starting from preparing a flexible substrate strip 10a as shown in FIG. That is, in the two-row × n-column flexible substrate strip 10a, the third chip 40 is flip-chip bonded to the (3m−1) -column (m: natural number), and the first and second are to the remaining columns. The chips 20 and 30 prepare a tab bonded flexible substrate strip 10a. Meanwhile, since the tab bonding method and the flip chip bonding method are well known in the art to which the present invention pertains, a detailed description thereof will be omitted.

Next, a step of separating the flexible substrate strip 10a into the unit flexible substrate 10 may be performed to manufacture the laminated package 100. That is, the two unit flexible substrates 10 are separated in units of two rows by three rows. In FIG. 3, a portion indicated by a dotted line indicates one unit flexible substrate 10.

Next, the second chip 30 is folded and attached to the rear surface of the first chip 20 in the state where the first adhesive 72 is interposed between the upper surface of the first chip 20, that is, the rear surface. Subsequently, the second tab bonding region 14 of the second chip 30 that is folded while the second adhesive 74 is interposed between the upper surface of the third chip 40, that is, the back surface of the third chip 40 may be formed. Attach to the back. Here, it is preferable to use a nonconductive adhesive as the first and second adhesives 72 and 74.

Finally, by forming a metal bump such as solder bump 60 in the connection hole 17 of the flip chip bonding region under the third chip 40, the manufacturing process of the laminated package 100 is completed. That is, after applying flux to the solder bump pad 15d exposed through the connection hole 17, the solder bump 60 connected to the solder bump pad 15d is raised by raising and reflowing a spherical solder ball. Form. Instead of the solder bumps 60, metal bumps such as nickel (Ni) or gold (Au) plating bumps may be formed.

On the other hand, the embodiments of the present invention disclosed in the specification and drawings are merely presented specific examples to aid understanding, and are not intended to limit the scope of the present invention. In addition to the embodiments disclosed herein, it is apparent to those skilled in the art that other modifications based on the technical idea of the present invention may be implemented.

Accordingly, according to the structure of the present invention, semiconductor chips connected by different connection methods such as tap bonding and flip chip bonding may be stacked to implement a stacked package. In particular, since the stack package is implemented by folding the tab bonded and flip chip bonded semiconductor chip portions onto the flexible substrate, the stack package may be implemented regardless of the size of the semiconductor chip.

In addition, since the flexible substrate for manufacturing the laminated package is provided in the form of a strip, the manufacturing of the laminated package can be performed in a continuous operation, thereby reducing the manufacturing process time and allowing the automation of the laminated package manufacturing process.

Claims (3)

A laminated package using a flexible substrate, A first tab bonding region, a second tab bonding region connected to the first tab bonding region and folded to face each other at a predetermined interval, and perpendicular to a direction in which the first tab bonding region and the second tab bonding region are connected to each other; A flexible substrate having a flip chip bonding region connected to the first tab bonding region in a direction and folded to face the second tab bonding region; A first chip tab bonded to the first tab bonding region between the folded first tab bonding region and the second bonding region; A second chip tab-bonded to the second tab bonding region and having a rear surface attached to the rear surface of the first chip; A third chip flip-chip bonded to a flip chip region of the flexible substrate and having a rear surface attached to an opposite surface of the second tab bonding region to which the second chip is flip chip bonded; And And a plurality of external connection terminals formed on opposite surfaces of the flip chip bonding region in which the third chip is bonded. The stack package of claim 1, wherein the tab bonded regions of the first and second chips and the flip chip bonded regions of the third chip are each covered with a liquid resin. The stack package of claim 1, wherein a slot for increasing flexibility is formed in a folded portion of the flexible substrate.

Images