KR100647597B1 - Plasma display panel - Google Patents

Abstract

The present invention discloses a plasma display panel. According to the invention, the transparent first substrate; A second substrate disposed to face the first substrate; An upper partition wall disposed between the first substrate and the second substrate to partition the light emitting cells and formed of a dielectric; A light absorbing layer disposed in the non-light emitting area between the first substrate and the upper partition wall to absorb external light; An upper discharge electrode and a lower discharge electrode surrounding the light emitting cell and spaced apart from each other vertically in the upper partition wall; A lower partition wall disposed between the upper partition wall and the second substrate; A phosphor layer disposed in a space defined by the lower partition wall; And a discharge gas filled in the light emitting cell.

Description

Plasma display panel {Plasma display panel}

1 is a partially separated perspective view of a plasma display panel according to a conventional example.

2 is a partially separated perspective view of a plasma display panel according to an embodiment of the present invention;

3 is a cross-sectional view taken along line III-III of FIG. 2;

4 is a cross-sectional view taken along line IV-IV of FIG. 3.

5 is a cross-sectional view of a plasma display panel according to another embodiment of the present invention.

FIG. 6 is an exploded perspective view illustrating a light absorbing layer disposed on a first substrate in FIG. 5; FIG.

<Brief description of the major symbols in the drawings>

111,211 First substrate 112. Upper partition

113. Top discharge electrode 114. Bottom discharge electrode

115..Light emitting cell 116..MgO membrane

121. Second substrate 122. Address electrode

123. Lower dielectric layer 124 Lower partition

125. Phosphor layer 130, 230. Light absorbing layer

The present invention relates to a plasma display panel that implements an image using gas discharge.

The device employing the plasma display panel has a large screen, high quality, ultra-thin, light weight, and excellent characteristics of wide viewing angle, and is simpler to manufacture than other flat panel display devices and is easy to be enlarged. It has been in the spotlight as a flat panel display device.

The plasma display panel is classified into a direct current (DC) type, an alternating current (AC) type, and a hybrid type according to an applied discharge voltage, and may be classified into a counter discharge type and a surface discharge type according to a discharge structure. In general, an AC plasma display panel having an AC three-electrode surface discharge structure is generally employed.

1 shows a conventional AC three-electrode surface discharge plasma display panel.

The illustrated plasma display panel 10 includes a first substrate 11 and a second substrate 21 facing the first substrate 11.

Common electrodes 12 and scan electrodes 13 forming a discharge gap with the common electrode 12 are formed on a lower surface of the first substrate 11. The common electrodes 12 and the scan electrodes 13 are formed. Are embedded by the first dielectric layer 14. A protective layer 15 is formed on the lower surface of the first dielectric layer 14.

In addition, address electrodes 22 are formed on the upper surface of the second substrate 21 to cross the common electrodes 12 and the scan electrodes 13, and the address electrodes 22 are formed on the second dielectric layer ( It is buried by 23). Discharge spaces 25 are partitioned by partition walls 24 formed on the upper surface of the second dielectric layer 23 at predetermined intervals. Phosphor layers 26 are formed in the discharge spaces 25, respectively, and discharge gases are filled in the discharge spaces 25.

In the plasma display panel 10 configured as described above, ultraviolet rays are emitted from the plasma generated by the discharge in the discharge space 25. Such ultraviolet rays excite the phosphor layer 26, and visible light is emitted from the phosphor layer 26 thus excited, thereby displaying an image.

However, due to the structure in which the electrodes 12 and 13, the first dielectric layer 14, and the protective layer 15 are sequentially formed below the first substrate 11, the light emitted from the phosphor layer 26 is emitted. As visible light is absorbed by approximately 40%, there is a limit to increasing the luminous efficiency. In addition, when the same image is displayed for a long time, there is a problem that the charged particles of the discharge gas are ion sputtered on the phosphor layer 26 by an electric field, causing permanent afterimages and shortening the lifespan.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and can be driven at low voltage, improves the aperture ratio, brightness, bright room contrast and luminous efficiency, and prevents the occurrence of permanent afterimages. The purpose is to provide.

Plasma display panel according to the present invention for achieving the above object,

A transparent first substrate;

A second substrate disposed to face the first substrate;

An upper partition wall disposed between the first substrate and the second substrate to partition the light emitting cells, the upper partition formed from a dielectric;

A light absorption layer disposed in the non-light emitting area between the first substrate and the upper partition wall to absorb external light;

An upper discharge electrode and a lower discharge electrode surrounding the light emitting cell and spaced apart vertically in the upper partition wall;

A lower partition wall disposed between the upper partition wall and the second substrate;

A phosphor layer disposed in a space defined by the lower partition wall;

And a discharge gas filled in the light emitting cell.

The light absorption layer is preferably formed of a black material.

Preferably, the upper discharge electrode and the lower discharge electrode extend in parallel along one direction, and further include address electrodes disposed in the light emitting cells and extended in a direction crossing the upper discharge electrode and the lower discharge electrode. Do.

The address electrodes are preferably covered by a lower dielectric layer further provided between the second substrate and the phosphor layer.

The side surface of the upper partition wall is preferably covered with MgO film.

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

2 to 4 illustrate a plasma display panel according to an embodiment of the present invention.

Referring to FIG. 2, the plasma display panel 100 according to the present exemplary embodiment includes a first substrate 111 and a second substrate 121 disposed to face the first substrate 111.

The first substrate 111 and the second substrate 121 are formed of a material such as glass, and in particular, the first substrate 111 has excellent light transmittance. In addition, an upper partition 112 and a lower partition 124 are formed between the first substrate 111 and the second substrate 121 in a predetermined pattern.

As shown, the upper partition 112 and the lower partition 124 is formed of a closed partition of the matrix form, respectively. In addition, a lower surface of the upper partition wall 112 corresponds to an upper surface of the lower partition wall 124 so that a space defined by the upper partition wall 112 and a space defined by the lower partition wall 124 correspond to each other.

However, the present disclosure is not limited thereto, and the upper and lower partitions may be formed as closed partitions in the form of waffles, deltas, and the like, and may be formed as open partitions such as stripes. In addition, the closed partition wall may be formed in various shapes such as a polygonal cross section, a circle, an ellipse, or the like, such as a quadrangle, a triangle, a pentagon, or the like as in the present embodiment. In addition, the upper partition wall may be formed in a matrix shape, while the lower partition wall may be formed in various combinations, such as a stripe shape.

The upper partition 112 and the lower partition 124 are light emitting cells 115 corresponding to one subpixel among the red light emitting pixel, green light emitting subpixel, and blue light emitting subpixel constituting a unit pixel for color implementation. ), And prevents mis-discharge by cross talk or the like between the partitioned light emitting cells 115. The upper partition 112 and the lower partition 124 may be formed separately or integrally formed.

Discharge gas is filled in the light emitting cells 115 partitioned by the upper partition 112 and the lower partition 124, and a mixed gas including Ne, Xe, or the like may be used as the discharge gas.

Address electrodes 122 are formed on an upper surface of the second substrate 121 disposed below the lower partition wall 124, and the address electrodes 122 are covered by the lower dielectric layer 123. The address electrodes 122 are formed to correspond to the light emitting cells 115 so as to select the light emitting cells 115 to start discharging. The address electrodes 122 are illustrated as being formed in a stripe shape, but are not necessarily limited thereto.

The lower dielectric layer 123 prevents cations or electrons from colliding with the address electrodes 122 to damage the address electrodes 122 during discharge, and induce charge. The lower dielectric layer 123 may be formed of a dielectric such as PbO, B ₂ O ₃ , SiO _2, or the like.

Meanwhile, the upper partition wall 112 is formed of a dielectric material, and the upper discharge wall 113 and the lower discharge electrode 114 causing discharge in the light emitting cells 115 are vertically disposed in the upper partition wall 112. It is formed to be arranged. The upper discharge electrode 113 is disposed above the first substrate 111 side, and the lower discharge electrode 114 is disposed below the upper discharge electrode 113. The upper discharge electrode 113 and the lower discharge electrode 114 may be formed of a conductive metal such as aluminum or copper, respectively. Accordingly, since the resistance is lower than that of the electrode formed of ITO, the discharge response speed may be faster than that of the conventional panel using the ITO electrode.

The upper discharge electrodes 113 extend along the light emitting cells 115 arranged in a direction orthogonal to the direction in which the address electrodes 122 are formed. As shown in FIG. 4, one upper discharge electrode 113 surrounds four side surfaces of each of the light emitting cells 115 arranged in a direction orthogonal to the direction in which the address electrode 122 is formed. 112 is formed in a ladder shape. As described above, the upper discharge electrodes 113 respectively formed in a ladder shape are disposed to be spaced apart at predetermined intervals along the formation direction of the address electrode 122. As shown, the side portions spaced apart from each other in the upper discharge electrodes 113 are disposed in the upper partition 112 formed along the direction orthogonal to the formation direction of the address electrode 122 in a spaced apart state. . However, the present invention is not limited thereto, and the upper partition wall may be formed as a double partition wall, and the side partitions may be disposed so as to be spaced apart from each other.

The lower discharge electrodes 114 spaced at predetermined intervals in a lower direction perpendicular to the upper discharge electrodes 113 may be formed in the same shape so as to be symmetrical with the upper discharge electrode 113 described above. Accordingly, the lower discharge electrodes 114 extend along the light emitting cells 115 arranged in a direction orthogonal to the direction in which the address electrodes 122 are formed, and one lower discharge electrode 114 is formed of an address electrode ( Each of the light emitting cells 115 arranged in a direction orthogonal to the formation direction of 122 is formed in a ladder shape in the upper partition 112 so as to surround four side surfaces. The lower discharge electrodes 114 are disposed to be spaced apart at predetermined intervals along the formation direction of the address electrode 122, and the side parts spaced apart from the lower discharge electrodes 114 are spaced apart from each other. It is arrange | positioned in the upper partition 112 formed along the direction orthogonal to the formation direction of 122.

The upper discharge electrode 113 and the lower discharge electrode 114 are illustrated to be symmetrical up and down, but are not limited thereto and may be formed asymmetrically. In addition, the upper discharge electrode and the lower discharge electrode is formed in a closed shape such as a ladder shape to surround all four sides of each light emitting cell, but is not necessarily limited thereto.

As described above, one of the upper discharge electrode 113 and the lower discharge electrode 114 which are spaced at a predetermined interval in a vertical direction in the upper partition 112 and formed in parallel to each other corresponds to a common electrode, and the other corresponds to a scan electrode. The charged particles move in the vertical direction by the sustain discharge voltage applied alternately between the upper discharge electrode 113 and the lower discharge electrode 114 to generate sustain discharge.

Here, the upper discharge electrode 113 serves as a common electrode, and the lower discharge electrode 114 serves as a scan electrode, or the upper discharge electrode 113 serves as a scan electrode and the lower discharge electrode 114 is common. Can act as an electrode respectively. However, when the lower discharge electrode 114 acts as a scan electrode, an address voltage applied between the lower discharge electrode 114 and the address electrode 122 may be lowered to more smoothly perform address discharge therebetween. It would be more preferable.

The address electrode 122 causing the address discharge as described above accumulates charges on the upper discharge electrode 113 side and the lower discharge electrode 114 side after the address discharge is completed, thereby causing the upper discharge electrode 113 to be discharged. ) And the lower discharge electrode 114 can make the sustain discharge easier. Accordingly, the voltage at which the sustain discharge is started can be lowered. However, the address electrode may be omitted. In this case, the light emitting cells may be selected and discharged only when the upper discharge electrode and the lower discharge electrode are disposed to cross each other.

Meanwhile, since the upper partition 112 filling the upper discharge electrodes 113 and the lower discharge electrodes 114 is formed of a dielectric material, the upper discharge electrode 113 and the lower discharge electrode 114 are directly energized between the upper discharge electrode 113 and the lower discharge electrode 114. It can be prevented, and the charged particles are prevented from directly colliding with the upper discharge electrode 113 and the lower discharge electrode 114 when being discharged to damage them, and the charged particles can be easily induced to accumulate wall charges. PbO, B ₂ O ₃ , SiO _2, or the like may be used as the dielectric for forming the upper partition 112.

In addition, an MgO film 116 is formed on a side surface of the upper partition wall 112. The MgO film 116 prevents charged particles from colliding with the upper partition wall 112 and damaging the upper partition wall 112. In this case, a large amount of secondary electrons can be released during discharge. However, the MgO film is not an essential component and may be omitted.

As described above, an upper discharge electrode 113 and a lower discharge electrode 114 are disposed on the upper side of each of the light emitting cells 115 and spaced apart by a predetermined discharge gap, and the lower side of the light emitting cell 115 is disposed. The address electrode 122 is disposed in the. Accordingly, the discharge area in which the discharge occurs can be expanded in the circumferential direction of the light emitting cell 115, so that the luminous efficiency can be improved.

Meanwhile, the light emitting cell 115 in which the discharge electrodes 113 and 114 and the address electrode 122 are disposed is excited by ultraviolet rays generated during the sustain discharge by the discharge electrodes 113 and 114. The phosphor layer 125 through which light rays are emitted is disposed in a space defined by the lower partition wall 124.

As illustrated in FIGS. 2 and 3, the phosphor layer 125 is formed over the upper surface of the lower dielectric layer 123 and the side surfaces of the lower partition wall 124.

The phosphor layer 125 includes phosphors that are excited by ultraviolet rays generated during discharge and emit red, green, and blue visible rays, respectively. For example, the phosphor layer formed on the light emitting cell corresponding to the red light emitting subpixel includes phosphors such as Y (V, P) O ₄ : Eu, and the phosphor layer formed on the light emitting cell corresponding to the green light emitting subpixel is Zn ₂ SiO. ₄ : Mn, YBO ₃ : Tb, and the like, and the phosphor layer formed in the light emitting cell corresponding to the blue light emitting subpixel includes a phosphor such as BAM: Eu and the like.

Since the phosphor layer 125 is formed in a space defined by the lower partition wall 124, the phosphor layer 125 is significantly spaced apart from the main region on the side of the upper partition wall 112 where a sustain discharge occurs. Accordingly, the phosphor layer 125 may be prevented from being ion-sputtered by the charged particles, thereby improving lifespan characteristics, and even after the same image is implemented for a long time, the phenomenon of permanent afterimage generation may be significantly reduced.

Meanwhile, a light absorption layer 130 is disposed between the first substrate 111 and the upper partition wall 112. The light absorbing layer 130 is formed of a black material, and absorbs external light incident to the panel 100, thereby reducing the luminance of reflection caused by external light, thereby improving the clear room contrast of the panel 100. Let it be To this end, the light absorption layer 130 may be formed of a material having a light absorption of 50% or more.

As shown, the light absorption layer 130 is formed in a matrix and has the same pattern corresponding to the upper partition 112 that partitions the light emitting cells 115 into a matrix. The light absorption layer 130 formed as described above is disposed to correspond to the upper surface of the upper partition wall 112, so that the light absorption layer 130 may be disposed to correspond to the non-light emitting region between the light emitting cells 115.

In addition, the width of the light absorbing layer 130 has the same size as that of the upper partition wall 112, so that the light absorbing layer 130 can be disposed to correspond to the entire non-light emitting area. The width of the light absorption layer 130 is not limited thereto, and may be smaller than the width of the upper partition wall 112 if the width of the light absorption layer 130 can secure a predetermined light absorption rate, and at least the width of the light absorption layer 130 is the discharge electrode 113. It would be desirable to be larger than the width of 114. Meanwhile, although the light absorption layer is illustrated as being formed in a matrix form, the light absorption layer may be formed in a stripe shape or the like, and may be disposed to correspond to the non-light emitting region.

In addition, the light absorbing layer 130 is formed to protrude downwardly from the lower surface of the first substrate 111 to a predetermined height, and forms a separate layer between the upper surface of the upper partition 112, such a light absorbing layer 130 Can be formed by various methods. For example, the light absorption layer may be formed through a photolithography process after the light absorption layer material is printed on the entire surface of the first substrate. In addition, the light absorption layer may be pattern printed on the upper surface of the upper partition, or may be formed integrally with the upper partition.

Referring to the operation of the plasma display panel 100 according to the present embodiment configured as described above is as follows.

First, an address voltage is applied between an address electrode 122 and a lower discharge electrode 114 acting as a scan electrode, so that an address discharge occurs. As a result of the address discharge, a light emitting cell 115 for sustain discharge is selected. Lose. After the address discharge is performed, when the sustain discharge voltage is alternately applied between the upper discharge electrode 113 and the lower discharge electrode 114 disposed in the selected light emitting cell 115, the upper discharge electrode 113 and the lower discharge are applied. A sustain discharge occurs between the electrodes 114 and ultraviolet rays are emitted while the energy level to the discharge gas excited by the sustain discharge is lowered. Such ultraviolet rays excite the phosphor layers 125 formed in the light emitting cells 115, and visible light is emitted from the excited phosphor layers 125 to realize an image. When the image is implemented as described above, the external light incident from the outside of the panel 100 is absorbed by the light absorbing layer 130 so that the reflected luminance is reduced, thereby improving the clear room contrast of the panel 100.

On the other hand, the sustain discharge that occurs between the upper discharge electrode 113 and the lower discharge electrode 114 is concentrated on the upper side of the light emitting cell 115, in a vertical direction from all sides defining the light emitting cell 115 Get up. As described above, the sustain discharge generated from all sides of the light emitting cell 115 gradually diffuses to the center side of the light emitting cell 115.

Therefore, the discharge area becomes relatively wider than that of the conventional panel shown in FIG. 1, and the volume of the area where the sustain discharge occurs is increased, so that the space charge in the light emitting cell, which is not used well in the past, also contributes to light emission. As a result, the amount of plasma formation during discharge can be increased, so that low-voltage driving is possible. In addition, even when the discharge gas containing the high mixing ratio Xe gas is used, the low-voltage driving can be performed, thereby improving the luminous efficiency.

In addition, since the electrodes existing on the first substrate of the panel, the first dielectric layer covering them, and the MgO film do not exist on the first substrate 111, according to the present embodiment, the first substrate 111 of visible light is disposed. The transmittance through can be significantly improved to about 90%, which is higher than 60% of conventional panels. Accordingly, when the image is implemented at the same level of brightness as in the related art, it can be driven at a low voltage, thereby improving luminous efficiency.

5 shows a plasma display panel according to another embodiment of the present invention. Since the same reference numerals as in the previous drawings are the same members having the same function, detailed description thereof will be omitted.

In the illustrated plasma display panel 200, the light absorbing layer 230 is formed by drawing a predetermined depth from a lower surface of the first substrate 211, thereby forming a light absorbing layer between the first substrate 211 and the upper partition 112. 130 is disposed.

More specifically, the light absorbing layer 230 according to the present exemplary embodiment, as shown in FIG. 6, corresponds to the upper partition 112 partitioning the light emitting cells 115 in a matrix form as in the above-described exemplary embodiment. It has a matrix form. In addition, the light absorbing layer 230 is disposed on the lower surface of the first substrate 211 in the groove portion 211a formed in the same matrix as the light absorbing layer 230. Here, the light absorption layer 230 is black, it is preferable that the light absorption rate is formed of a material of 50% or more.

The light absorbing layer 230 may be formed in the first substrate 211 in various ways, which will be described as an example.

First, grooves having the same shape as that of the matrix of the light absorption layer as described above are formed on the lower surface of the first substrate. The groove portion may be formed by etching or sand blasting of the first substrate. Then, when the light absorption layer material is filled into the inner space of the groove portion formed as described above by a squeezer or dispenser, the light absorption layer may be formed and disposed in the first substrate.

On the other hand, as shown, the light absorbing layer 230 is formed so that the lower surface of the light absorbing layer 230 is on the same plane as the lower surface of the first substrate 211. However, the light absorbing layer may be formed such that the lower surface of the light absorbing layer is convexly arranged at a predetermined height from the lower surface of the first substrate or is concavely arranged at a predetermined depth.

As described above, the lower surface of the light absorbing layer 230 formed in the first substrate 211 is disposed to be in contact with the upper surface of the upper partition wall 112, so that the light absorbing layer 230 is formed of the light emitting cell 115. Are arranged to correspond to the non-light-emitting region between them. Here, the width of the light absorbing layer 230 is the same size as the width of the upper partition 112, the light absorbing layer 230 is disposed corresponding to the entire non-light emitting region. The width of the light absorbing layer 230 may be smaller than the width of the upper partition wall 112 if the width of the light absorbing layer 230 is sufficient to secure a predetermined light absorbing rate, and at least the width of the light absorbing layer 230 is the discharge electrode 113. It would be desirable to be larger than the width of 114. In addition, the light absorption layer is not limited to the matrix form.

Meanwhile, according to the present embodiment, since the light absorbing layer 230 is disposed in the first substrate 211, the light absorbing layer 230 may be formed relatively higher than the light absorbing layer 130 according to the above-described embodiment, and the first substrate 211 may be formed. The distance from the top of the can also be relatively close. Accordingly, the light absorption rate may be increased, whereby the bright room contrast may be further improved.

As described above, the plasma display panel according to the present invention has the following effects.

First, since the electrodes and the dielectric layer do not exist in the region where visible light emitted from the light emitting cell is transmitted in the first substrate, the aperture ratio may be increased and thus transmittance may be improved.

Second, since discharge occurs over all sides of the light emitting cell, the discharge area can be greatly enlarged, thereby enabling low voltage driving. In addition, even when a high mixing ratio of Xe gas is used in the discharge gas, low voltage driving is possible and light emission efficiency may be improved.

Third, as the discharge electrode is formed of a conductive metal having a relatively lower resistance than that of ITO, the discharge response speed is faster than that of the conventional electrode employing the ITO electrode, and low-voltage driving can be enabled.

Fourth, the phosphor layer disposed in the lower region of the light emitting cell is significantly spaced apart from the main region where sustain discharge is generated, thereby preventing the phosphor from being ion-sputtered by the charged particles, thereby ensuring sufficient lifespan.

Fifth, as the light absorbing layer absorbing the external light is disposed between the first substrate and the upper partition, the reflected luminance may be reduced to improve the clear room contrast.                     

Although the present invention has been described with reference to one embodiment shown in the accompanying drawings, this is merely exemplary, and it will be understood by those skilled in the art that various modifications and equivalent other embodiments are possible. Could be. Accordingly, the true scope of protection of the invention should be defined only by the appended claims.

Claims (12)

A transparent first substrate; A second substrate disposed to face the first substrate; An upper partition wall disposed between the first substrate and the second substrate to partition the light emitting cells, the upper partition formed from a dielectric; A light absorption layer disposed in the non-light emitting area between the first substrate and the upper partition wall to absorb external light; Upper discharge electrodes and lower discharge electrodes surrounding the light emitting cells and disposed to be spaced apart from each other vertically in the upper partition wall; A lower partition wall disposed between the upper partition wall and the second substrate; A phosphor layer disposed in a space defined by the lower partition wall; And a discharge gas filled in the light emitting cells, And at least one of the upper discharge electrodes and the lower discharge electrodes are discharge electrodes spaced apart from each other. The method of claim 1, And the light absorbing layer is formed to protrude downward from a lower surface of the first substrate at a predetermined height. The method of claim 1, And the light absorbing layer is introduced into the first substrate from the lower surface of the first substrate by a predetermined depth and formed in the first substrate. The method of claim 1, And the light absorption layer is formed in the same pattern as the pattern in which the upper partition wall is formed. The method of claim 1, And the light absorption layer is formed of a black material. The method of claim 1, The width of the light absorption layer is larger than the width of the discharge electrode plasma display panel. The method of claim 1, The upper discharge electrode and the lower discharge electrode respectively extend in parallel in one direction, and are disposed in the light emitting cells and further include address electrodes extending in a direction crossing the upper discharge electrode and the lower discharge electrode. Plasma display panel. The method of claim 7, wherein And the upper discharge electrode serves as a common electrode and the lower discharge electrode serves as a scan electrode. The method of claim 7, wherein And the address electrodes are covered by a lower dielectric layer further provided between the second substrate and the phosphor layer. The method of claim 1, And a side surface of the upper partition wall is covered by an MgO film. The method of claim 1, And the upper discharge electrode and the lower discharge electrode are formed of a conductive metal. The method of claim 1, And the upper partition wall is partitioned into closed light emitting cells such as matrix type, waffle type, delta type, and the like.

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