KR100643696B1 - Voltage distortion modeling method of inverter - Google Patents

Abstract

A voltage distortion modeling method of an inverter is provided to sufficiently compensate voltage distortion by modeling the voltage distortion of the inverter using a PWM(Pulse Width Modulation) method. A voltage distortion modeling method of an inverter includes a voltage distortion modeling process for modeling voltage distortion between a reference terminal voltage and a real terminal voltage of a phase terminal voltage. The voltage distortion modeling process includes a turning on/off delay time due to an electric characteristic of each of switching elements, a dead time as an intended delay time between the reference terminal voltage and the real terminal voltage, and a voltage drop of the switching elements and a diode.

Description

VOLTAGE DISTORTION MODELING METHOD OF INVERTER

1 is a circuit diagram showing the configuration of a three-phase full-bridge inverter used for the control of a three-phase induction motor.

2 is a diagram for explaining a voltage distortion model according to an embodiment of the present invention when the terminal current I _leg is greater than zero.

3 is a view for explaining a voltage distortion model according to an embodiment of the present invention when the terminal current I _leg is less than zero.

* Description of the symbols for the main parts of the drawings *

Q1 ~ Q6: Transistor

D1 ~ D6: Free Wheeling Diode

106: inverter

108: direct current capacitor

110: induction motor

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for compensating for voltage distortion of a pulse width modulation (PWM) inverter, and more particularly to compensate for distortion of an output voltage due to dead time and voltage drop of a power device in a PWM inverter. It is about a method.

Induction motors induce magnetic flux between the stator and the rotor by changing the voltage / current of the stator windings. Therefore, the intensity of the magnetic flux is not constant like a DC motor or an AC synchronous motor, and it is difficult to keep the strength of the magnetic flux constant, which makes the operation characteristic complicated and so difficult to control. On the other hand, the magnitude of the magnetic flux is approximately proportional to the ratio of output voltage and frequency, that is, V / F in the steady state. Therefore, if the frequency is kept constant, the generated magnetic flux is almost constant, so that torque characteristics such as a DC motor or an AC synchronous motor can be obtained. This means that the output frequency is determined in consideration of the number of poles of the motor and the like, and a voltage proportional to the output frequency is applied to the motor. However, since the voltage and frequency of the commercial power supply are maintained almost constant, a PWM inverter is used to change it to a variable voltage variable frequency. Here, the PWM method is a method of modulating and applying the magnitude of the output voltage to an equivalent pulse width, which is an essential component for preventing heat loss of the amplifying transistor in the inverter.

1 is a circuit diagram showing the configuration of a three-phase full-bridge inverter used to control a three-phase induction motor. As shown in FIG. 1, each of the switching elements, that is, the power transistors Q1 to Q6, is switched by the three-phase AC signals P1 to P6 to switch the phase current. The diodes D1 to D6 are free wheeling diodes.

In FIG. 1, for example, when the transistor Q1 is turned on, the transistor Q4 is turned off or vice versa to determine the level of the U phase terminal voltage V _leg (U), wherein the transistor If a section in which both transistors Q1 and Q4 are turned on at the same time while Q1 is turned on and transistor Q4 is turned off at the same time, both ends of the DC-stage capacitor 108 are electrically shorted and the inverter 106 is turned on. It is impossible to generate a normal three-phase AC voltage at), and thus the induction motor 110 may not operate normally. Accordingly, in the configuration of the inverter 106 of FIG. 1, the turn on / off timings of the two transistors Q1 and Q4 are intentionally delayed, which is referred to as a dead time.

However, the inverter 106 has a non-linear characteristic due to this dead time, and this non-linear characteristic causes the control of the load (for example, the motor) to become unstable. You need to compensate your time accurately.

An object of the present invention is to minimize the nonlinear characteristics of an inverter by more accurately modeling the voltage distortion of a PWM (pulse width modulation) inverter and faithfully compensating for the voltage distortion.

In the voltage distortion modeling method of the inverter according to the present invention for this purpose, in a PWM inverter having a plurality of switching elements and diodes in each phase and generating two or more phase terminal voltages and providing them to a load, Model a voltage distortion between the reference terminal voltage and the actual terminal voltage, wherein the voltage distortion model provides a turn on / off delay time due to the electrical characteristics of each of the plurality of switching elements and between the reference terminal voltage of the phase terminal voltage and the actual terminal voltage. Dead time, which is the intentional delay time of the switching element and the voltage drop of the diode.

Referring to Figures 2 and 3 as a preferred embodiment of the present invention as follows. 2 and 3 are diagrams for explaining a voltage distortion model according to an embodiment of the present invention, Figure 2 is when the terminal current (I _leg ) is greater than 0, Figure 3 is a terminal current (I _leg ) than 0 It's small. 2 and 3, the waveform indicated by the dotted line is the waveform of the reference terminal voltage V _desired of any phase not considering dead time, and the waveform indicated by the solid line is the actual terminal voltage V _{leg of} the phase considering the dead time. Waveform.

As shown in FIGS. 2 and 3, when the terminal current I _leg is greater than or less than zero, the rising or falling time point of the actual terminal voltage V _leg is greater than the dead time T than the reference terminal voltage V _desired . _dead ), and a turn on / off delay time due to the electrical characteristics of the switching elements Q1 to Q6 also occurs. In addition, the level of the actual terminal voltage V _leg also changes, and the biggest cause of the change in the voltage level is the voltage drop V _sat at the switching elements Q1 to Q6 and the free wheeling diodes D1 to D6. Is the voltage drop (V _d ) of. Due to the delay time and the voltage drop, a distortion ΔV occurs between the reference terminal voltage V _desired and the actual terminal voltage V _leg .

In FIG. 2, when the terminal current I _{leg of the} corresponding phase is greater than zero, the distortion ΔV between the reference terminal voltage V _desired and the actual terminal voltage V _leg is <ΔV1 + ΔV1 ′> and <ΔV2>. It can be thought of as divided into three parts of <ΔV3>. The terminal voltage V _leg and the voltage distortion ΔV when the terminal current I _leg is greater than zero are mathematically modeled as follows.

(One)

(2)

(2-1)

(2-2)

(2-3)

(2-4)

In Equation (1), V _dc is the voltage across the DC-stage capacitor 118 shown in FIG. 1, T _on is the turn-on time (ie high level interval) of the reference terminal voltage V _desired , and T _s is the inverter It is a period of the switching control signal (P1 to P6 in FIG. 1) input to the transistors Q1 to Q6 of 106.

In the formulas (2-1) to (2-4), T _dead is a dead time, t _on is a device-specific delay time that occurs when each of the transistors Q1 to Q6 that are switching elements is turned on, and t is _off is a device-specific delay time that occurs when each of the transistors Q1 to Q6 is turned off. T _{dead time} is <T _dead + t _on -t _off >.

As shown in Equation (2-4), in the present invention, the dead time T _dead , the voltage drop V _sat and the turn on / off delay time of the transistors Q1 to Q6 in modeling the voltage distortion ΔV. (t _on , t _off ) and the voltage drop (V _d ) of the free wheeling diodes D1 to D6 are all considered, so that the voltage distortion ΔV can be modeled more realistically.

In FIG. 3, when the terminal current I _{leg of the} corresponding phase is smaller than zero, the distortion ΔV between the reference terminal voltage V _desired and the actual terminal voltage V _leg is <ΔV4 + ΔV4 ′> and <ΔV5>. It can be thought of as divided into three parts of <ΔV6>. The terminal voltage V _leg and the voltage distortion ΔV when the terminal current I _leg is less than zero are mathematically modeled as follows.

(3)

(4)

(4-1)

(4-2)

(4-3)

(4-4)

In Equation (3), V _dc is the voltage across the DC-stage capacitor 118 shown in FIG. 1, T _on is the turn-on time (ie high level interval) of the reference terminal voltage V _desired , and T _s is the inverter It is a period of the switching control signal (P1-P6 of FIG. 1) input to 106.

In formulas (4-1) to (4-4), T _dead is a dead time, t _on is a delay time that occurs when turning on each of the transistors Q1 to Q6 which are switching elements, and t _off is a transistor. (Q1 to Q6) Device-specific delay time that occurs during each turn off. T _{dead time} is <T _dead + t _on -t _off >.

As shown in equation (4-4), in the present invention, the dead time (T _dead ), the voltage drop (V _sat ) and the turn on / off delay time of the transistors (Q1 to Q6) in modeling the voltage distortion (ΔV). (t _on , t _off ) and the voltage drop (V _d ) of the free wheeling diodes D1 to D6 are all considered, so that the voltage distortion ΔV can be modeled more realistically.

As such, the present invention models the voltage distortion of a pulse width modulation (PWM) inverter more accurately and faithfully compensates for the voltage distortion, thereby minimizing the nonlinear characteristics of the inverter to precisely control a load such as a motor. Make sure

Claims (4)

A voltage distortion modeling method of a PWM inverter having a plurality of switching elements and diodes in each phase, and generating two or more phase terminal voltages and providing them to a load, Modeling a voltage distortion between the reference terminal voltage and the actual terminal voltage of the phase terminal voltage, wherein the modeling of the voltage distortion is performed; Turn on / off delay times due to electrical characteristics of each of the plurality of switching elements; A dead time which is an intentional delay time between the reference terminal voltage and the actual terminal voltage of the phase terminal voltage; Voltage distortion modeling method of the inverter comprising the voltage drop of the switching element and the diode. The method of claim 1, wherein the actual terminal voltage,

Voltage distortion modeling method of the inverter represented by. In this case, ΔV is voltage distortion, V _dc is the voltage across the DC terminal capacitor of the inverter input side, T _on is the time of the turn-on period of the reference terminal voltage, T _s is the switching element The period of the switching signal input. The method of claim 2, wherein the voltage distortion ΔV, When the terminal current of the phase concerned is greater than zero,

Voltage distortion modeling method of the inverter represented by. In this case, T _dead is the dead time, t _on is a device-specific delay time generated when the switching device is turned on, and t _off is a device-specific delay time generated when the switching device is turned off. . The method of claim 2, wherein the voltage distortion ΔV, When the terminal current of the phase concerned is less than zero,

Voltage distortion modeling method of the inverter represented by. In this case, T _dead is the dead time, t _on is a device-specific delay time generated when the switching device is turned on, and t _off is a device-specific delay time generated when the switching device is turned off. .

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