KR100620659B1 - Method for fabricating capacitor of semiconductor device - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a capacitor of a semiconductor device, wherein the silicon layer is separated from a stacked structure of a doped silicon layer containing a high concentration of impurities and an undoped silicon layer and a charge storage electrode using MPS, and a separation mask is removed. After removing the upper predetermined thickness of the doped silicon layer and the undoped silicon layer, the MPS is grown so that the MPS is not grown on the outside of the contact hole so that MPS growth does not occur on the silicon layer during the MPS process. Short circuits between adjacent cells are prevented, and defects are prevented, thereby improving process yield and reliability of device operation.

Description

METHODS FOR FABRICATING CAPACITOR OF SEMICONDUCTOR DEVICE

1A and 1B illustrate a manufacturing process of a capacitor of a semiconductor device according to the prior art.

Figure 2 is a schematic image of a semiconductor device according to the prior art.

3A and 3B are partially enlarged cross-sectional views before and after the MPS process in the process of FIG. 1B.

4A to 4D are diagrams illustrating a capacitor manufacturing process of a semiconductor device according to an embodiment of the present invention.

5 is a schematic image of a semiconductor device according to the present invention.

<Description of Symbols for Main Parts of Drawings>

10, 30: semiconductor substrate 12, 32: interlayer insulating film

14, 34: contact plug 16, 36: nitride film

18, 38: oxide film 20, 40: contact hole

22, 42 doped silicon layer 24, 44: undoped silicon layer

26, 46: MPS 45: photosensitive film

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a capacitor of a semiconductor device. In particular, a polysilicon layer is used as a charge storage electrode in a cylinder or a cone-type capacitor, and metastable polysilicon (hereinafter referred to as MPS) is used for increasing the surface area. The present invention relates to a method for manufacturing a capacitor of a semiconductor device, which can be stably formed and can prevent occurrence of capacitor failure due to abnormal growth of MPS.

Generally, capacitors in DRAMs store a certain amount of charge to store and read information. Therefore, the capacitor should have sufficient capacitance, have the insulating property of the dielectric film with low leakage current, and have the reliability for repeated use for a long time.

As the device becomes more integrated, the allocation area of the unit device decreases, making it difficult to secure the capacitance of the capacitor. For this purpose, the height of the capacitor is increased and the process margin with adjacent cells is also reduced.

In a DRAM device, the cavern in the cell should have a capacitance of about 25pF. Since the capacitance of the capacitor is proportional to the surface area and inversely proportional to the thickness of the dielectric film, the surface area is increased to increase the surface area. MPS, which increases the area of the electrode by 1.7 to 2 times, is applied to the cylindrical structure.

1A and 1B illustrate a manufacturing process of a capacitor of a semiconductor device according to the prior art.

First, an interlayer insulating film 12 including a charge storage electrode contact plug 14 is formed on a semiconductor substrate 10, and an nitride film 16 as an etch barrier and an oxide film as a sacrificial film are formed on the interlayer insulating film 12. (18) is formed sequentially.

Then, after forming a photoresist pattern (not shown), which is a charge storage electrode etching mask, on the oxide layer 18, the oxide layer 18 and the nitride layer 16 are sequentially etched using the photoresist pattern as a mask to form the contact plug ( A contact hole 20 for a charge storage electrode exposing 14 is formed, and the photoresist pattern is removed.

Then, the doped silicon layer 22 and the undoped silicon layer 24 containing high concentration of P-type impurities are sequentially formed on the entire surface of the structure. (See FIG. 1A).

Thereafter, a photoresist is applied to the entire surface of the structure, and the undoped silicon layer 24 and the doped silicon layer 22 on the oxide film 18 are subjected to chemical mechanical polishing (hereinafter referred to as CMP) or etch back. After removing the adjacent cells to separate them, the exposed undoped silicon 24 is surface treated to grow the rugged MPS 26 to complete the charge storage electrode. (See FIG. 1B).

In the MPS, growth should not occur in the silicon layer doped with n-type impurity at 2.4E21 atom / cm 3 at the time of deposition. In fact, as shown in FIG. Will grow.

This is a phenomenon in which impurities are lost in the upper edge portion of the charge storage electrode by wet chemicals such as HF or BOE used in the process of applying and removing the photoresist film.

3A and 3B are enlarged views of the portion A before and after the formation of the MPS in FIG. 1B, in which impurities are removed to a predetermined thickness, for example, a depth of about 10 to about 20 μs, of the doped silicon layer 22 before the MPS process. When the undoped layer 22-1 is formed (see FIG. 3A), and the MPS is grown in the subsequent process, growth also occurs at this portion, whereby the MPS 26 is grown on the oxide film 18. (See Figure 3b).

In the conventional method of manufacturing a capacitor of a semiconductor device, the silicon layer doped with a high concentration of P-type impurities and an undoped silicon layer for MPS growth are sequentially formed in order to improve the conductivity of the capacitor, and then separated from them. Afterwards, MPS was formed only on the inner wall, but MPS growth should not occur on silicon doped with 2E21 / cm3 or more. As a result, MPS is also grown on the oxide film, causing short-circuiting of adjacent devices, or defects during the oxide film removal process.

The present invention is to solve the above problems, an object of the present invention is to remove the exposed portion of the silicon layer doped before the MPS growth process after the CMP process, the MPS process proceeds to the MPS only on the inner wall of the charge storage electrode The present invention provides a method of manufacturing a capacitor of a semiconductor device that can be grown to prevent short circuits with adjacent cells, and to facilitate a subsequent oxide removal process, thereby improving process yield and reliability of device operation.

The present invention is to achieve the above object, the characteristics of the capacitor manufacturing method of a semiconductor device according to the present invention,

Forming an interlayer insulating film on the semiconductor substrate;

Forming an oxide film on the entire surface of the structure;

Forming a contact hole for the charge storage electrode by selectively etching the oxide layer as a mask for defining a charge storage electrode region;

Sequentially forming a doped silicon layer and an undoped silicon layer on the entire surface of the structure;

Applying a photosensitive film to the entire surface of the structure;

Separating the undoped silicon layer from the doped silicon layer by performing a planarization process until the oxide film is exposed;

Removing an upper predetermined thickness of the separated undoped silicon layer and the doped silicon layer;

The process of forming the MPS layer by growing the undoped silicon layer MPS.

In addition, the upper portion of the undoped silicon layer and the doped silicon layer is removed, characterized in that the thickness of 10 ~ 1000Å.

Hereinafter, a method of manufacturing a capacitor of a semiconductor device according to the present invention will be described in detail with reference to the accompanying drawings.

4A to 4E are diagrams illustrating a manufacturing process of a capacitor of a semiconductor device according to an embodiment of the present invention, which is an example of a metal-insulating film-semiconductor (MIS) or a metal-insulating film-metal (MIM) type capacitor.

First, as a pre-processing step of forming the charge storage electrode, an interlayer insulating film 32 having a contact plug 34 for a charge storage electrode is formed on a semiconductor substrate 30 such as a silicon wafer, and the interlayer insulating film 34 is formed. The nitride layer 36 as an etch barrier and the oxide layer 38 for defining the charge storage electrode region are sequentially formed on the substrate, and the oxide layer 38 and the nitride layer 36 are selected by a photolithography process using a charge storage electrode etching mask. Etching is performed to form contact holes 40 exposing the contact plugs 34. At this time, the oxide film is formed of TEOS, SOG, PSG, BPSG, high-density plasma chemical vapor deposition oxide film, high temperature oxide film, medium temperature oxide film and the like at a height of 15 to 25K, and the thickness of the nitride film 36 and the oxide film 38 is 5000 to 30000 kPa. The nitride film 36 is formed to a thickness of about 100 to 2000 micrometers. In addition, after the process of forming the contact hole 40, a process of increasing the size of the contact hole 38 by about 10% to 80% by using a wet chemical may be added. (See FIG. 4A).

Then, the doped silicon layer 42 and the undoped silicon layer 44 are sequentially formed on the entire surface of the structure to a thickness of about 100 to 1000 Å. (See FIG. 4B).

Thereafter, the photoresist film 45 is coated on the entire surface of the structure, and the undoped silicon layer 44 and the doped silicon layer 42 on the oxide film 38 are etched by CMP or etch back. Each contact hole 40 is separated. At this time, the photoresist layer 45 remains inside the contact hole 40. (See FIG. 4C).

Then, the portions of the exposed undoped silicon layer 44 and the doped silicon layer 42 that have been impurity lost and damaged are removed by a method such as an etchback of a predetermined thickness, for example, about 10 to 1000 microseconds. The remaining portions of the photoresist film 45 are removed, and the undoped silicon layer 44 is grown by MPS to grow the MPS layer 46. At this time, the upper portion of the damaged doped silicon layer 42 in which impurities are lost is removed so that the MPS layer 46 is not formed outside the contact hole. (See FIG. 4D).

Then, a dielectric film and a plate electrode are formed to form a capacitor having a concave type charge storage electrode.

In addition, the SOG series may be used instead of the photosensitive film as the CMP mask.

As described above, the method for manufacturing a capacitor of a semiconductor device according to the present invention comprises separating the silicon layers from a charge structure electrode using MPS and a stacked structure of a doped silicon layer containing a high concentration of impurities and an undoped silicon layer. After removing the predetermined thickness of the doped silicon layer and the undoped silicon layer without removing the isolation mask, the MPS was grown so that the MPS was not grown outside the contact hole. Since growth does not occur, short circuits between adjacent cells due to MPS are prevented, and defects are prevented accordingly, thereby improving process yield and reliability of device operation.

Claims (2)

Forming an interlayer insulating film on the semiconductor substrate; Forming an oxide film on the entire surface of the structure; Forming a contact hole for the charge storage electrode by selectively etching the oxide layer as a mask for defining a charge storage electrode region; Sequentially forming a doped silicon layer and an undoped silicon layer on the entire surface of the structure; Applying a photosensitive film to the entire surface of the structure; Separating the undoped silicon layer from the doped silicon layer by performing a planarization process until the oxide film is exposed; Etching the upper predetermined thickness of the separated undoped silicon layer and the doped silicon layer; Removing the photosensitive film; And growing the undoped silicon layer to form an MPS layer. The method of claim 1, The method of manufacturing a capacitor of a semiconductor device, characterized in that to remove the undoped silicon layer and the upper portion of the doped silicon layer to a thickness of 10 ~ 1000Å.

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