KR100615289B1 - Plasma display panel - Google Patents

Abstract

According to a preferred embodiment of the present invention, a plasma display panel includes a rear substrate, sustain electrode pairs disposed above the rear substrate, a lower dielectric layer covering the sustain electrode pairs, a protective layer covering the lower dielectric layer, and the back surface. A front substrate disposed in parallel with the substrate, address electrodes having a predetermined shape disposed under the front substrate and extending to cross the sustain electrode pair, an upper dielectric layer covering the address electrodes, and a lower side of the upper dielectric layer And a plurality of partition walls for partitioning the discharge cells, and a phosphor layer is applied to the discharge cells surrounded by the partition walls and the lower surface of the upper dielectric layer partitioned by the partition walls, and the lower dielectric layer is etched between the sustain electrode pairs in the discharge cell section. The gap is formed, and the phosphor layer is applied to the gap on the upper surface of the back substrate.

Description

Plasma Display Panel {Plasma display panel}

1 is an exploded perspective view of a plasma display panel having a top plate of a conventional ridge structure.

FIG. 2 is an exploded cross-sectional view of the plasma display panel of FIG. 1.

3 is an exploded perspective view of a plasma display panel having a lower plate of a ridge structure according to a preferred embodiment of the present invention.

4 is an exploded cross-sectional view of the plasma display panel of FIG. 3.

FIG. 5 is a transmission of the lower plate viewed from a cross section taken along the line II ′ of FIG. 4.

FIG. 6 is a transmission of the upper plate viewed from a cross section taken along the line II-II ′ of FIG. 4. .

Explanation of symbols on the main parts of the drawings

110: front substrate 111: address electrode

112: upper dielectric layer 113: partition wall

115, 116: phosphor layer 120: back substrate

121a and 121b sustain electrode 123 lower dielectric layer

124: protective layer 130: gap

132 groove 111a ring part

111b: address line

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a plasma display panel having a ridge structure. More specifically, the ridge structure is formed on a top plate made of a back substrate and a stack thereof, and an address electrode formed on the front substrate has a ring to prevent transmission of visible light. The present invention relates to a plasma display panel in which a shape is improved to improve luminance.

Plasma display panels (PDPs), which form images using electrical discharges, have excellent display performance, such as brightness and viewing angle, and their use is increasing day by day. In the plasma display panel, a discharge occurs in a gas between the electrodes by a direct current or an alternating voltage applied to the electrode, and phosphors are excited by the radiation of ultraviolet rays accompanying the gas discharge process to emit visible light.

1 and 2 illustrate an example of a conventional plasma display panel having a ridge structure. In FIG. 2, only the front substrate is rotated by 90 ° to more clearly show the internal structure of the plasma display panel. As used herein, "front" means the direction in which the image is displayed.

1 and 2 together, the conventional ridge structure plasma display panel includes a rear substrate 10 and a front substrate 20 facing each other.

A plurality of address electrodes 11 are arranged in a stripe shape on the top surface of the back substrate 10, and the address electrodes 11 are filled by a white lower dielectric layer 12. In addition, a plurality of partitions 13 are formed on the upper surface of the lower dielectric layer 12 at predetermined intervals to prevent electrical and optical interference between the discharge cells. On the inner surface of the discharge cells partitioned by the partitions 13, phosphor layers 15 of red (R), green (G), and blue (B) are respectively coated with a predetermined thickness, and Ne, Xe or a discharge gas mixed with these is injected.

The front substrate 20 is a transparent substrate through which visible light can be transmitted and is mainly made of glass, and is coupled to the rear substrate 10 provided with the partition wall 13. On the bottom surface of the front substrate 20, stripe-shaped sustaining electrodes 21a and 21b orthogonal to the address electrodes 11 are formed in pairs. The sustain electrodes 21a and 21b are mainly made of a transparent conductive material such as indium tin oxide (ITO) to transmit visible light. In order to reduce the line resistance of the sustain electrodes 21a and 21b, bus electrodes 22a and 22b made of metal are formed on the bottom of each of the sustain electrodes 21a and 21b. The width is made narrower. The sustain electrodes 21a and 21b and the bus electrodes 22a and 22b are embedded by a transparent upper dielectric layer 23, and a protective layer 24 is formed on the bottom of the upper dielectric layer 23.

In this structure, in order to improve the low voltage and efficiency, a dielectric is formed on the top plate having a laminated structure composed of sustain electrodes, an upper dielectric layer, and a protective layer around the front substrate. That is, a part of the upper dielectric layer in the space between the pair of sustain electrodes 21a and 21b is etched away in the discharge cell, thereby forming a gap 30 between the sustain electrodes in one discharge cell. The lower surface of the substrate is exposed.

However, in the conventional plasma display panel having a ridge structure, since the phosphor layer is formed only inside the discharge cell surrounded by the partition wall, that is, the bottom plate made of the back substrate and its laminate, the area on which the phosphor layer is applied is small, so that the luminance is low and the efficiency is high. In addition to the low problem, the sustain electrode pair is disposed on the front substrate, and the bus electrode is formed on the lower surface of the sustain electrode pair, thereby partially blocking the path of visible light, thereby causing low luminance.

In order to solve the above problems, the present invention provides an area in which a phosphor layer is applied by forming a phosphor layer not only on a discharge space of an upper plate partitioned by a partition wall but also on a gap in which a lower dielectric layer of a rear substrate is etched in a plasma display panel having a ridge structure. It is an object of the present invention to provide a plasma display panel capable of increasing brightness and improving luminance and efficiency by providing an annular ring portion so that an address electrode formed on a front substrate does not block a path of visible light.

In order to achieve the above object, the plasma display panel according to an embodiment of the present invention,

Back substrate;

Sustain electrode pairs disposed above the rear substrate;

A lower dielectric layer covering the sustain electrode pairs;

A protective layer covering the lower dielectric layer;

A front substrate disposed in parallel with the rear substrate;

Address electrodes having a predetermined shape disposed under the front substrate and extending to cross the sustain electrode pair;

An upper dielectric layer covering the address electrodes; And

And a plurality of partition walls formed under the upper dielectric layer to partition discharge cells.

A phosphor layer is applied to the lower surface of the upper dielectric layer partitioned by the partition wall and the discharge cells surrounded by the partition wall, and a gap in which the lower dielectric layer is etched is formed between the sustain electrode pairs in the discharge cell section, so that the gap on the upper surface of the rear substrate is also formed. It is characterized in that the phosphor layer is applied.

Here, the phosphor layer formed in the gap is applied to the exposed surface of the upper surface of the lower substrate by etching the lower dielectric layer.

On the other hand, a groove for applying the phosphor is further formed on the surface of the top surface of the back substrate is exposed.

The groove is located inside a section of the discharge cell.

The phosphor layer is applied inside the groove.

In addition, the address electrodes have an annular ring portion and an address line.

The ring portion is located in a section corresponding to the discharge cell.

The upper dielectric layer and the phosphor layer corresponding to the annular inner side of the ring portion are etched and removed.

Next, a preferred embodiment of the present invention will be described in detail with reference to the accompanying drawings.

3 is an exploded perspective view of a plasma display panel according to a preferred embodiment of the present invention, Figure 4 is an exploded cross-sectional view of the plasma display panel of FIG. In FIG. 4, only the front substrate is rotated by 90 ° to more clearly show the internal structure of the plasma display panel.

3 and 4 together, a plasma display panel according to an exemplary embodiment of the present invention may include a plurality of address electrodes formed in a predetermined shape on a front substrate 110 and a bottom surface of the front substrate 110. 111 and an upper dielectric layer 112 formed to bury the address electrode 111 on the bottom surface of the front substrate 110. In addition, a partition wall 113 is formed below the upper dielectric layer 112 to prevent electrical and optical interference between the discharge cells by dividing the discharge cells as discharge spaces.

In addition, the phosphor layer 116 is coated on the lower surface of the upper dielectric layer 112 partitioned by the partition wall 113 and the discharge space surrounded by the partition wall 113.

The rear substrate 120 is coupled to the front substrate 110 to form a discharge cell below the barrier rib 113, and is formed on an upper surface of the rear substrate 120 so as to intersect the address electrode 111. At an angle, the sustain electrodes 121a and 121b having a stripe shape are formed in pairs. Therefore, two sustain electrodes are disposed in pair to extend through the discharge cells.

The address electrodes 111 are mainly made of a transparent conductive material such as indium tin oxide (ITO) to transmit visible light. On the other hand, the sustain electrode pair is preferably composed of a metal material of low electrical resistance. This is because the sustain electrode pair is formed on the rear substrate rather than the front substrate through which the image is transmitted, and thus it is not necessary to consider the light transmittance. Therefore, if the sustain electrode pair is made of a metallic material, a separate bus electrode as used in the prior art is unnecessary.

On the other hand, a portion of the lower dielectric layer 123 is etched and removed so that the lower plate made of the back substrate 120 and the laminate has a ridge structure. The etched form does not necessarily need to etch the lower dielectric layer vertically, but it is sufficient to form a ridge shape as the unetched surface of the lower dielectric layer protrudes relatively to the etched portion. Specifically, a portion of the lower dielectric layer 123 filled between the pair of sustain electrodes 121a and 121b is etched and removed to expose the upper surface of the back substrate 120 to the portion where the dielectric layer is removed. The gap 130 is formed.

Since the gap 130 is formed, red, blue, and green phosphor layers 115 are applied to portions of the upper surface of the rear substrate 120 from which the lower dielectric layer 123 is removed. In particular, the upper surface of the back substrate 120 exposed to the gap 130 as a separate section in which the phosphor layer 115 is applied is formed of a concave groove 132, but preferably has a square groove shape.

The groove 132 preferably has a length smaller than the horizontal and vertical lengths of the discharge cells so that the grooves are positioned within the sections of the discharge cells without crossing the sections of the discharge cells. In addition, since the phosphor layer 115 is coated inside the groove 132, the groove should be formed to a depth enough to apply the phosphor layer to a predetermined thickness.

In addition, when the phosphor layer is applied to both the bottom surface and the side of the inside of the groove, it is preferable that the size of the groove is set so that the phosphor layer applied to the side of the inside of the groove can also form a predetermined height. Further, it is preferable that the phosphor layer 115 is integrally formed not only on the inner bottom surface of the groove 132 but also on the inner side surface of the groove.

On the other hand, the lower dielectric layer 123 is covered by the protective layer 124, a portion of the lower dielectric layer 123 may be exposed in the gap 130, the lower dielectric layer 123 is removed by etching the lower dielectric layer ( A protective layer 124 is also formed on the surface exposed in the gap, that is, the surface of the lower dielectric layer etched away. The protective layer 124 prevents damage to the lower dielectric layer 123 due to the sputtering of plasma particles and lowers the discharge voltage and the sustain voltage by emitting secondary electrons. In general, magnesium oxide (MgO) Is done.

Surrounded by the partition wall 113 to reach the gap 130 is all the discharge space, the discharge gas made of Xe, Ne or a mixture thereof is injected into the discharge space.

5 is a projection view of a cross section taken along line II ′ of FIG. 4. Therefore, in FIG. 5, only one discharge cell is the projection view seen from the top.

Referring to FIG. 5, a plurality of pairs of sustain electrodes 121a and 121b are formed to extend in parallel in a discharge space surrounded by the partition wall 113. A gap 130 (FIG. 4) is formed between the sustain electrodes 121a and 121b, and the phosphor layer 115 is coated inside the groove 132 formed on the top surface of the back substrate exposed to the gap.

The phosphor layer 115 has a component for generating visible light by receiving ultraviolet rays. The phosphor layer formed on the red light emitting subpixel includes phosphors such as Y (V, P) O4: Eu, and is formed on the green light emitting subpixel. The phosphor layer includes phosphors such as Zn 2 SiO 4: Mn, YBO 3: Tb, and the phosphor layer formed on the blue light emitting subpixel preferably includes phosphors such as BAM: Eu.

FIG. 6 is a perspective view of a cross section taken along the line II-II ′ of FIG. 4.

Referring to FIG. 6, the address electrode 111 includes a stripe-shaped address line 111b and a ring-shaped ring portion 111a connected to the address line. The ring portion 111a corresponds to the edge of the partition wall so that the address line 111b of the address electrode 111 is not overlapped with the discharge cell as much as possible within the discharge cell partitioned by the partition wall 113. It is preferable to form so that performance may not fall.

In FIG. 6, the ring portion 111a of the address electrode 111 has a rectangular ring shape similar to a partition wall, but is not necessarily limited thereto. The ring portion 111a may not block the path of visible light at a position corresponding to the discharge cell. Any shape can be used as long as it is not.

Referring to FIG. 3 again, a plurality of address electrodes 111 are formed on the bottom surface of the front substrate 110. The address electrodes 111 are provided with ring portions 111a for respective sections corresponding to the discharge cells. In the section between the ring portion and the ring portion, a stripe address line 111b is provided.

Here, a part of the upper dielectric layer 112 and a part of the phosphor layer 116 aligned in a position corresponding to the inside of the ring portion 111a of the address electrode 111 formed on the front substrate, that is, the annular inner side 130 may be formed. Since it is an unnecessary part, it is preferable to be removed through an etching method. Therefore, luminous efficiency is improved because the upper dielectric layer corresponding to the inside of the ring portion 111a is removed.

In the plasma display panel according to the preferred embodiment of the present invention, the address voltage is applied between the address electrode 111 and the Y electrode which is one of the sustain electrodes 121a and 121b. A discharge occurs, and as a result of this address discharge, a discharge cell in which sustain discharge is to be selected from among a plurality of discharge cells is selected.

Thereafter, when a sustain discharge voltage, which is an alternating current, is applied between the Y electrode and the other X electrode of the sustain electrode pair of the selected discharge cell, sustain discharge occurs between the X electrode and the Y electrode. Ultraviolet rays are emitted while the energy level of the discharged gas excited by this sustain discharge is lowered. The ultraviolet light excites the phosphor layer 116 applied to the lower surface of the phosphor layer 115 and the upper dielectric layer 112 applied to the inside of the groove 132 formed in the gap 130 of the discharge cell. As the energy levels of the phosphor layers 115 and 116 are lowered, visible light is emitted, and the visible light emitted in this process constitutes an image.

The plasma display panel having the above structure as a preferred embodiment according to the present invention has the following effects.

First, since the sustain electrode pairs are disposed on the rear substrate in the ridge plammed display panel, the sustain electrode pairs can be formed of a material having excellent battery conductivity.

Second, a ring-shaped ring portion is formed at a position corresponding to the discharge cell section in the address electrode formed on the upper plate, thereby improving luminance.

Third, since the surface area to which the phosphor layer is applied is increased, it is possible to further form the phosphor layer.

Fourth, as compared with the plasma display panel in which only one of the upper and lower plates is coated with phosphor, the luminance is increased under the same current and power conditions, and the efficiency is also increased.

Although the present invention has been described with reference to the embodiments shown in the drawings, this is merely exemplary, and it will be understood by those skilled in the art that various modifications and equivalent other embodiments are possible. Therefore, the true technical protection scope of the present invention will be defined by the technical spirit of the appended claims.

Claims (8)

Back substrate; Sustain electrode pairs disposed above the rear substrate; A lower dielectric layer covering the sustain electrode pairs; A protective layer covering the lower dielectric layer; A front substrate disposed in parallel with the rear substrate; Address electrodes having a predetermined shape disposed under the front substrate and extending to cross the sustain electrode pair; An upper dielectric layer covering the address electrodes; And And a plurality of partition walls formed under the upper dielectric layer to partition discharge cells. A phosphor layer is applied to the lower surface of the upper dielectric layer partitioned by the partition wall and the discharge cells surrounded by the partition wall, and a gap in which the lower dielectric layer is etched is formed between the sustain electrode pairs of the discharge cell section, so that the gap on the upper surface of the rear substrate is also formed. Plasma display panel characterized in that the phosphor layer is applied. The method of claim 1, The phosphor layer formed in the gap is a plasma display panel, characterized in that the lower dielectric layer is etched and applied to the exposed surface of the upper surface of the back substrate. The method of claim 2, And a groove for applying a phosphor is further formed on a surface of which the top surface of the rear substrate is exposed. The method of claim 3, wherein And the groove is located inside a section of the discharge cell. The method of claim 4, wherein And the phosphor layer is coated inside the groove. The method of claim 1, And the address electrodes have an annular ring portion and an address line. The method of claim 6, And the ring portion is positioned in a section corresponding to the discharge cell. The method of claim 7, wherein And an upper dielectric layer and a phosphor layer corresponding to the annular inner side of the ring portion are etched.

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