KR100584964B1 - 스택 메모리 구조에서의 캐싱 장치 - Google Patents

스택 메모리 구조에서의 캐싱 장치 Download PDF

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KR100584964B1
KR100584964B1 KR1020057006219A KR20057006219A KR100584964B1 KR 100584964 B1 KR100584964 B1 KR 100584964B1 KR 1020057006219 A KR1020057006219 A KR 1020057006219A KR 20057006219 A KR20057006219 A KR 20057006219A KR 100584964 B1 KR100584964 B1 KR 100584964B1
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stack
memory
cache
pointer
data
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KR1020057006219A
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English (en)
Korean (ko)
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KR20050052529A (ko
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마크 트램블레이
제임스 마이클 오코너
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선 마이크로시스템즈 인코퍼레이티드
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Priority claimed from KR1019980705675A external-priority patent/KR100618718B1/ko
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    • G06F15/7842Architectures of general purpose stored program computers comprising a single central processing unit with memory on one IC chip (single chip microcontrollers)
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    • G06F9/45504Abstract machines for programme code execution, e.g. Java virtual machine [JVM], interpreters, emulators
    • G06F9/45516Runtime code conversion or optimisation
KR1020057006219A 1996-01-24 1997-01-23 스택 메모리 구조에서의 캐싱 장치 KR100584964B1 (ko)

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Application Number Priority Date Filing Date Title
US642,253 1991-01-16
US1052796P 1996-01-24 1996-01-24
US64225396A 1996-05-02 1996-05-02
US64710396A 1996-05-07 1996-05-07
US647,103 1996-05-07
US60/010,527 1996-05-07
KR1019980705675A KR100618718B1 (ko) 1996-01-24 1997-01-23 스택메모리구조에서의캐싱방법및장치

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KR1019980705675A Division KR100618718B1 (ko) 1996-01-24 1997-01-23 스택메모리구조에서의캐싱방법및장치

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KR20050052529A KR20050052529A (ko) 2005-06-02
KR100584964B1 true KR100584964B1 (ko) 2006-05-29

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US (5) US6532531B1 (US06532531-20030311-C00088.png)
EP (1) EP0976034B1 (US06532531-20030311-C00088.png)
JP (1) JP3634379B2 (US06532531-20030311-C00088.png)
KR (1) KR100584964B1 (US06532531-20030311-C00088.png)
DE (1) DE69734399D1 (US06532531-20030311-C00088.png)
WO (1) WO1997027539A1 (US06532531-20030311-C00088.png)

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