KR100560478B1 - Plasma display device and driving method of the same - Google Patents

Abstract

The present invention relates to a method of driving a plasma display panel. According to the present invention, an intermediate electrode is formed between the X electrode and the Y electrode to which the sustain discharge pulse voltage is applied. Then, a reset waveform and a scan pulse voltage are applied to the intermediate electrode. According to the present invention, after the short gap discharge is performed between the X electrode and the intermediate electrode in the initial section of the sustain discharge section, the long gap discharge is performed between the X electrode and the Y electrode in the normal sustain discharge section. Therefore, stable discharge can be performed. In addition, according to the present invention, since the waveforms applied to the X electrode and the Y electrode are almost symmetrical, the X electrode driving unit and the Y electrode driving unit can be realized through almost the same circuit.

Intermediate electrode, short gap discharge, long gap discharge, scan pulse voltage

Description

Plasma display panel driving method {PLASMA DISPLAY DEVICE AND DRIVING METHOD OF THE SAME}

1 is a perspective view of a conventional plasma display panel.

FIG. 2 is a cross-sectional view of the plasma display panel shown in FIG. 1.

3 is an electrode arrangement diagram of a conventional plasma display panel.

4 is a driving waveform diagram of a conventional plasma display panel.

5 is an electrode array diagram of a plasma display panel according to an exemplary embodiment of the present invention.

6 is a driving waveform diagram of a plasma display panel according to a first embodiment of the present invention.

7A to 7E are wall charge distribution diagrams based on driving waveforms according to an embodiment of the present invention.

8 is a driving waveform diagram of a plasma display panel according to a second embodiment of the present invention.

9 and 10 are diagrams illustrating a plasma display panel and an electrode array according to the first embodiment of the present invention, respectively.

The present invention relates to a method of driving a plasma display panel.

Recently, flat display devices such as liquid crystal displays (LCDs), field emission displays (FEDs), and plasma display panels have been actively developed. Among these flat panel display devices, the plasma display panel has advantages of higher luminance and luminous efficiency and wider viewing angle than other flat panel display devices. Therefore, the plasma display panel is in the spotlight as a display device to replace the conventional cathode ray tube (CRT) in a large display device of 40 inches or more.

A plasma display panel is a flat panel display device that displays characters or images using plasma generated by gas discharge, and tens to millions or more pixels are arranged in a matrix form according to the size thereof. The plasma display panel is classified into a direct current type (DC type) and an alternating current type (AC type) according to the shape of the driving voltage waveform applied and the structure of the discharge cell.

In the DC plasma display panel, since the electrode is exposed to the discharge space as it is, current flows in the discharge space while voltage is applied, and there is a disadvantage in that a resistance for current limitation must be made. On the other hand, in the AC plasma display panel, since the electrode covers the dielectric layer, the current is limited by the formation of a natural capacitance component, and the electrode is protected from the impact of ions during discharge.

1 is a partial perspective view of a conventional AC plasma display panel, and FIG. 2 is a cross-sectional view of the plasma display panel shown in FIG. 1.

1 and 2, the X electrode 3 and the Y electrode 4 covered with the dielectric layer 14 and the passivation layer 15 are arranged in parallel on the first glass substrate 11. At this time, the X electrode and the Y electrode is made of a transparent conductive material. Bus electrodes 6 made of metal materials are formed on the surfaces of the X and Y electrodes 3 and 4, respectively.

A plurality of address electrodes 5 are provided on the second glass substrate 12, and the address electrodes 5 are covered by the dielectric layer 14 '. A partition 17 is formed on the dielectric layer 14 ′ between the address electrodes 5 in parallel with the address electrode 5. In addition, phosphors 18 are formed on the surface of the dielectric layer 14 'and on both sides of the partition wall 17. The first glass substrate 11 and the second glass substrate 12 have a discharge space 19 therebetween so that the Y electrode 4 and the address electrode 5 and the X electrode 3 and the address electrode 5 are orthogonal to each other. Are placed opposite to each other. The discharge space at the intersection of the address electrode 5 and the paired Y electrode 4 and the X electrode 3 forms a discharge cell 19.

3 shows an electrode arrangement diagram of a conventional plasma display panel.

As shown in Fig. 3, the conventional plasma display panel electrode has a matrix configuration of m> n. The address electrodes A1 to Am are arranged in the column direction, and the n electrodes Y1 to Yn and the X electrodes X1 to Xn are arranged in a zigzag pattern in the row direction. The discharge cell 20 shown in FIG. 3 corresponds to the discharge cell 19 shown in FIG.

4 is a driving waveform diagram of a conventional plasma display panel.

According to the plasma display panel driving method shown in Fig. 4, each subfield is composed of a reset section, an address section, and a sustain section.

The reset section serves to erase the wall charge state of the previous sustain discharge and to set up wall charge in order to stably perform the next address discharge.

The address period is a period in which a wall charge is accumulated in a cell (addressed cell) that is turned on by selecting a cell that is turned on and a cell that is not turned on in the panel.

The sustain period is a period in which a sustain discharge voltage is alternately applied to the X electrode and the Y electrode to perform discharge for actually displaying an image on the addressed cell.

By the way, according to the conventional plasma display panel, when the first sustain discharge pulse is applied after the address period, since sufficient priming particles are not generated in the discharge cells, there is a problem in that discharge failure occurs.

On the other hand, in the sustain discharge section, the same sustain discharge voltage is alternately applied to the X electrode and the Y electrode to perform sustain discharge for actually displaying an image on the addressed cell. In this case, the waveforms applied to the X electrode and the Y electrode in the sustain discharge period are preferably a symmetrical waveform. However, according to the conventional plasma display panel, since the waveform applied to the Y electrode (the waveform for reset and scan is additionally applied to the Y electrode) and the waveform applied to the X electrode are different from each other in the reset period, The circuit for driving the circuit and the X electrode are different. Accordingly, the driving circuits of the X electrode and the Y electrode do not have impedance matching, so that waveforms alternately applied to the X electrode and the Y electrode in the sustain discharge period are distorted, thereby causing a problem of discharge failure.

SUMMARY OF THE INVENTION The present invention has been made in an effort to solve the problems of the prior art, and to provide a method of driving a plasma display panel for preventing a discharge failure.

According to an aspect of the present invention, there is provided a method of driving a plasma display panel, including a first electrode and a second electrode to which a sustain discharge voltage pulse is applied, and a third electrode formed between the first electrode and the second electrode. A driving method of a plasma display panel including an electrode,

In the sustain discharge period,

(a) applying a sustain discharge pulse and the first voltage to the first electrode and the second electrode during the first period, respectively, from a first voltage level to a second voltage level greater than the first voltage level; Applying a third voltage greater than the first voltage to a third electrode; And (b) alternately applying the sustain discharge pulses to the first electrode and the second electrode during the second period, and biasing the third electrode to the third voltage. And greater than the first voltage level and less than the second voltage level.

And wherein the first period is a period in which the first sustain discharge occurs and the second period is a period after the first sustain discharge.

In addition, in the address section,

Applying a scan pulse voltage to the third electrode, applying a first voltage to the first electrode, and applying a fourth voltage greater than the first voltage to the second electrode,

Preferably, the first voltage is a ground voltage.

In the reset period,

It is preferable to apply a reset waveform to the third electrode.

DETAILED DESCRIPTION Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the present invention. As those skilled in the art would realize, the described embodiments may be modified in various different ways, all without departing from the spirit or scope of the present invention. In the drawings, parts irrelevant to the description are omitted in order to clearly describe the present invention. Like parts are designated by like reference numerals throughout the specification.

First, a plasma display panel according to an exemplary embodiment of the present invention will be described in detail with reference to FIGS. 5 and 6.

5 is a layout view of electrodes of a plasma display panel according to an exemplary embodiment of the present invention.

As shown in Fig. 5, in the plasma display panel according to the embodiment of the present invention, the address electrodes A1 to Am are arranged in parallel in the column direction, and the Y electrodes Y1 to Yn / of n / 2 + 1 rows are arranged. 2 + 1), X electrodes (X1 to Xn / 2 + 1), and an intermediate electrode (hereinafter 'M electrode') of n rows are arranged. That is, according to the embodiment of the present invention, the M electrode is arranged in the middle of the Y electrode and the X electrode, and the Y electrode, the X electrode, the M electrode, and the address electrode have a four-electrode structure in which one discharge cell 30 is formed. .

At this time, according to the embodiment of the present invention, the X electrode and the Y electrode mainly serve as an electrode for applying a sustain discharge voltage waveform, and the M electrode mainly serves for applying a reset waveform and a scan pulse voltage.

6 is a driving waveform diagram of a plasma display panel according to an exemplary embodiment of the present invention, and FIGS. 7A to 7E are diagrams showing wall charge distribution according to the driving waveform shown in FIG.

Hereinafter, a driving method according to an embodiment of the present invention will be described with reference to FIGS. 6 and 7A to 7E.

According to the driving method according to the embodiment of the present invention shown in Fig. 6, each subfield is composed of a reset section, an address section, and a sustain section.

According to an exemplary embodiment of the present invention, the reset section includes an erasing section, an M electrode rising waveform section, and an M electrode falling waveform section.

(1-1) erasure interval (I)

This section serves to erase wall charges formed in the previous sustain discharge section. According to the exemplary embodiment of the present invention, it is assumed that the sustain discharge voltage pulse is applied to the X electrode at the last time point of the sustain discharge period, and that a voltage lower than the voltage applied to the X electrode (eg, the ground voltage) is applied to the Y electrode. Then, as shown in Fig. 7A, positive wall charges are formed on the Y electrode and the address electrode, and negative wall charges are formed on the X electrode and the M electrode.

In the erase period, a waveform (ramp waveform or log waveform) that gently falls from the voltage Vmc to the ground voltage is applied to the M electrode while the Y electrode is biased with the voltage Vyc. Then, the wall charges formed during the sustain discharge period are erased as shown in Fig. 7A.

(1-2) M electrode rising wave section (II)

During this period, a waveform (ramp waveform or log waveform) that rises slowly from the voltage Vmd to Vset is applied to the M electrode while the X electrode and the Y electrode are biased to the ground voltage. While this rising waveform is applied, weak reset discharges occur from the M electrodes to the address electrodes, the X electrodes, and the Y electrodes, respectively, in all the discharge cells. As a result, as shown in Fig. 7B, negative wall charges are accumulated at the M electrode, and positive wall charges are accumulated at the address electrode, the X electrode, and the Y electrode at the same time.

(1-3) M electrode falling waveform section (III)

Subsequently, in the second half of the reset period, while the X electrode and the Y electrode are biased at Vxe and Vye, waveforms (lamp waveforms or log waveforms) are gradually applied to the M electrodes from the voltage Vme to the ground voltage. At this time, it is preferable to set Vxe = Vye and Vmd = Vme in that the circuit configuration can be simplified, but is not necessarily limited thereto.

While this ramp voltage is falling, weak reset discharge occurs again in all the discharge cells. At this time, since the M electrode falling waveform section is to slowly decrease the wall charges accumulated by the M electrode rising waveform section, the amount of wall charge that is decreased as the time of the falling waveform is longer (that is, the slope is gentler) is precisely controlled. This is advantageous for address discharge.

As a result of applying the falling waveform to the M electrode, the wall charges accumulated on each electrode of all the cells are evenly erased, and as shown in Fig. 7C, positive wall charges are accumulated on the address electrode, and at the same time, the X electrode and the Y electrode And negative wall charges are accumulated on the M electrode.

(2) Address section (scan section)

In the address period, scan pulses are sequentially applied to the M electrodes while the plurality of M electrodes are biased to the Vsc voltage, and a scan pulse is applied to the M electrodes. Apply an address voltage to the cell). At this time, the ground electrode is maintained at the X electrode, and the voltage Vye is applied to the Y electrode. (I.e., apply a voltage higher than the voltage of the X electrode to the Y electrode.)

Then, discharge occurs between the M electrode and the address electrode, and the discharge extends to the X electrode and the Y electrode. As a result, as shown in Fig. 7D, positive charges are accumulated on the X electrode and the M electrode, and Y Negative wall charges are stored in the electrodes and the address electrodes.

(3) maintenance discharge section

According to the sustain discharge section according to the embodiment of the present invention, the sustain discharge voltage pulse is alternately applied to the X electrode and the Y electrode while the M electrode is biased to the sustain discharge voltage VM. The sustain discharge occurs in the discharge cells selected in the address section through the application of such a voltage.

At this time, according to the embodiment of the present invention, the discharge is caused by different discharge mechanisms at the initial and the normal time of the sustain discharge. For convenience of explanation, hereinafter, the discharge generated at the beginning of the sustain discharge is referred to as a short-gap discharge section, and the discharge at the normal time point is referred to as a long-gap discharge section.

(3-1) Short gap discharge section

In the start period of sustain discharge, as shown in (a) and (b) of FIG. 7E, a positive voltage pulse is applied to the X electrode and a negative voltage pulse is applied to the Y electrode (where + and − Is a relative concept comparing the magnitude of the voltage applied to the X electrode and the voltage applied to the Y electrode, and the fact that + pulse voltage is applied to the X electrode means that a voltage greater than the Y electrode is applied to the X electrode. At the same time, a positive voltage pulse is applied to the M electrode. Therefore, unlike the conventional case where the discharge occurs only between the X electrode and the Y electrode, the discharge occurs between the X electrode / M electrode and the Y electrode. In particular, according to the embodiment of the present invention, since the distance between the M electrode and the Y electrode is closer than the distance between the X electrode and the Y electrode, the electric field applied between the M electrode and the Y electrode becomes larger. Therefore, the discharge between the M electrode and the Y electrode plays a dominant role than the discharge between the X electrode and the Y electrode. As described above, in the embodiment of the present invention, since the discharge between the M electrode and the Y electrode having a relatively short distance at the beginning of the sustain discharge plays a dominant role, it is called a short gap discharge.

As described above, according to the embodiment of the present invention, since a short gap discharge occurs by applying a relatively high electric field at the initial stage of sustain discharge, sufficient priming particles in the discharge cell are applied when the first sustain discharge pulse is applied after the address period. Even if it is not produced, sufficient discharge can be performed.

(3-2) Long gap discharge section

After application of the first sustain discharge pulse of sustain discharge, since the voltage of the M electrode is biased to a constant voltage (VM), the discharge between the M electrode and the X electrode or the discharge between the M electrode and the Y electrode (ie, a short gap discharge) The degree of contribution to the silver discharge is small so that the main discharge becomes a discharge between the X electrode and the Y electrode, and thus an image inputted by the number of discharge pulses applied alternately to the X electrode and the Y electrode can be displayed.

That is, as shown in Fig. 7E (d), in the sustain discharge section in the steady state, negative wall charges continuously accumulate on the M electrode, and negative wall charges and positive walls alternately on the X electrode and the Y electrode. Charges accumulate.

As described above, according to the embodiment of the present invention, since the discharge is performed by the short gap discharge of the X electrode and the M electrode (or between the Y electrode and the M electrode) at the initial stage of the sustain discharge, sufficient discharge is performed even in a state where there are few priming particles, and In the state, since the discharge is performed by the long gap discharge between the X electrode and the Y electrode, stable discharge can be performed.

In addition, it is preferable that the M electrode is only involved in the short gap discharge at the beginning of the sustain discharge period and not in the subsequent long gap discharge. However, since the spacing between the M electrode and the X electrode is smaller than the spacing between the X electrodes, when the same magnitude of voltage is applied to the M electrode and the X electrode in the long gap discharge section, the M electrode may engage in sustain discharge, thereby causing unstable discharge.

Therefore, in the long gap discharge period, the voltage VM applied to the M electrode is set lower than the sustain discharge voltage Vs applied to the X electrode and the Y electrode, so that a smaller amount of charge is distributed to the M electrode than the X electrode, thereby causing the long gap discharge. This can prevent the discharge from occurring between the M electrode and the X electrode.

In this case, the voltage VM applied to the M electrode in the long gap discharge period is preferably about 70% of the sustain discharge voltage Vs applied to the X electrode and the Y electrode.

Further, according to the embodiment of the present invention, since the voltage waveforms which are substantially symmetrical are applied to the X electrode and the Y electrode, the circuits for driving the X electrode and the Y electrode can be designed almost identically. Therefore, since the difference in circuit impedance between the X electrode and the Y electrode can be almost eliminated, it is possible to reduce the distortion of the pulse waveform applied to the X electrode and the Y electrode in the sustain discharge section, thereby achieving stable discharge.

According to the exemplary embodiment of the present invention illustrated in FIG. 6, the waveforms of the X electrode and the Y electrode may be driven even if they are reversed, and the driving may be performed even if the waveforms of the X electrode and the Y electrode are changed in the address period.

According to the driving method according to the embodiment of the present invention described above, a reset waveform and a scan pulse waveform are mainly applied to the M electrode, and a sustain voltage waveform is mainly applied to the X electrode and the Y electrode. In this case, the reset waveforms applied to the M electrodes may be applied not only to the reset waveforms shown in FIG. 6 but also to various reset waveforms used in the three-electrode structure.

Application of such various types of reset waveforms to the four-electrode structure according to the exemplary embodiment of the present invention is readily apparent to those skilled in the art from the above description, and thus descriptions thereof will be omitted.

However, when applying various types of reset waveforms to the four-electrode structure according to the embodiment of the present invention, it is preferable to satisfy the following conditions.

First, the voltage waveform Rm (v) applied to the M electrode in the rising reset waveform section is larger than the voltage waveform Rx (v) applied to the X electrode or the voltage waveform Ry (v) applied to the Y electrode. Should be set. (Rm (v)〉 (Rx (v) or Ry (v))

Second, in the falling reset waveform section, the voltage waveform Fm (v) applied to the M electrode is greater than the voltage waveform Fx (v) applied to the X electrode or the voltage waveform Fy (v) applied to the Y electrode. It should be set small. (Fm (v) 〈(Fx (v) or Fy (v))

Third, in the address period, the voltage waveform Am (v) applied to the M electrode is set smaller than the voltage waveform Ax (v) applied to the X electrode or the voltage waveform Ay (v) applied to the Y electrode. Should be. (Am (v) 〈(Ax (v) or Ay (v))

Fourth, at the time of the sustain discharge period, the voltage waveform Sm (v) applied to the M electrode is greater than the voltage waveform Sx (v) applied to the X electrode or the voltage waveform Sy (v) applied to the Y electrode. It should be set large. (Am (v) < (Ax (v) or Ay (v)) Furthermore, the voltage waveform Sm (v) applied to the M electrode at the time of the sustain discharge period is applied to the M electrode at the address period Am. (v)) (Sm (v)> Am (v))

9 illustrates a plasma display panel according to an exemplary embodiment of the present invention.

As shown in FIG. 9, the plasma display panel according to an exemplary embodiment of the present invention includes a plasma display panel 100, an address driver 200, a Y electrode driver 300, an X electrode driver 400, and an M electrode driver ( 500 and the control unit 600.

The plasma display panel 100 includes a plurality of address electrodes A1 to Am arranged in the column direction, a plurality of Y electrodes Y1 to Yn, X electrodes X1 to Xn, and Mij electrodes arranged in the row direction. Include. In this case, the Mij electrode means an electrode formed between the Yi electrode and the Xj electrode.

The address driver 200 receives an address driving control signal SA from the controller 600 and applies a display data signal for selecting a discharge cell to be displayed to each address electrode.

The Y electrode driver 300 and the X electrode driver 400 receive the Y electrode driving signal SY and the X electrode driving signal SX from the controller 600 and apply them to the Y electrode and the X electrode, respectively.

The M electrode driver 500 receives the M electrode driving signal SM from the controller 600 and applies the M electrode driving signal SM to the M electrode. In this case, if the M electrode driver 500 and the X electrode driver 400 are installed on the same printed circuit board (hereinafter, referred to as "PCB"), the circuit configuration can be made compact.

The control unit 600 receives an image signal from the outside, generates an address driving control signal SA, a Y electrode driving signal SY, an X electrode driving signal SX, and an M electrode driving signal SM, respectively. 200, the Y electrode driver 300, the X electrode driver 400, and the M electrode driver 500 are transferred.

At this time, according to the embodiment of the present invention, the Y electrode driver 300 and the X electrode driver 400 are disposed on opposite sides with respect to the plasma panel, and the M electrode driver 500 is one side of the plasma panel (Fig. In 8, it is arranged on the X electrode driving part side. That is, according to the exemplary embodiment of the present invention, all M electrodes are connected to the M electrode driver 500 located on one side of the plasma panel.

10 is a view showing an electrode array structure according to an embodiment of the present invention.

As shown in Fig. 10, according to the embodiment of the present invention, M electrodes are arranged between the Y electrodes and the X electrodes, respectively. In FIG. 10, for convenience, reference numerals are described where the driving units for driving the X electrode, the Y electrode, and the M electrode are located.

That is, according to FIG. 10, since the driving part for driving the Y electrode is arranged on the left side, the left side of the Y electrode is denoted by the reference numeral, and the driving part for driving the X electrode and the M electrode is arranged on the right side. Therefore, reference numerals are attached to the right portions of the X electrode and the M electrode.

In this electrode array structure, the scanning order of the M electrodes in the address period is performed in the case of a single scan (assuming that the scanning direction proceeds from the top to the bottom of the panel). Scanned in the order of MM1, MM2, and MM3. In the case of dual scanning, the data is scanned in the order of (M1, MM1), (M2, MM2), and (M3, MM3).

Although the embodiments of the present invention have been described in detail above, the present invention is not limited to the above-described embodiments, and various other modifications and changes are possible. That is, the drawings and the detailed description of the invention are merely exemplary of the invention, which are used only for the purpose of illustrating the invention and are not intended to limit the scope of the invention as defined in the claims or in the claims. . Therefore, those skilled in the art will understand that various modifications and equivalent other embodiments are possible from this. Therefore, the true technical protection scope of the present invention will be defined by the technical spirit of the appended claims.

As described above, discharge failure can be prevented by forming an intermediate electrode between the X electrode and the Y electrode, applying a reset waveform and a scan waveform to the intermediate electrode, and applying a sustain discharge voltage waveform to the X electrode and the Y electrode. have.

Further, in the sustain discharge period, the voltage VM applied to the M electrode after the first sustain discharge is set lower than the sustain discharge voltage Vs applied to the X electrode and the Y electrode, so that the M electrode has a smaller amount of charge than the X electrode. By distributing, it is possible to prevent the discharge from occurring between the M electrode and the X electrode.

Claims (7)

In the driving method of the plasma display panel comprising a first electrode and a second electrode, and a third electrode formed between the first electrode and the second electrode, Applying a scan pulse voltage to the third electrode in an address period; In the sustain discharge period, a second voltage higher than the first voltage is applied to the first electrode and the first voltage is applied to the second electrode during the first period, and the first voltage is higher than the first voltage to the third electrode. Applying a third voltage lower than the second voltage, In the sustain discharge period, applying the first voltage to the first electrode and applying the second voltage to the second electrode while the third voltage is applied to the third electrode during a second period; And In the sustain discharge period, applying the second voltage to the first electrode and applying the first voltage to the second electrode while the third voltage is applied to the third electrode during a third period of time. Include, And the second period and the third period are alternately performed in the sustain discharge period. The method of claim 1, And the first period is a period during which the first sustain discharge occurs. The method of claim 2, And the second period and the third period are periods after a first sustain discharge. delete The method according to any one of claims 1 to 3, And applying the first voltage to the first electrode and applying a fourth voltage higher than the first voltage to the second electrode during the address period. The method of claim 5, And the first voltage is a ground voltage. The method according to any one of claims 1 to 3, And applying a reset waveform to the third electrode in the reset period.

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