KR100545025B1 - Plasma display panel - Google Patents

Abstract

The present invention relates to a plasma display panel in which the address jitter characteristic difference of each discharge cell is improved.

A sustain electrode pair formed on the upper substrate according to the present invention; Defining a red, green, and blue discharge cell, and including a first barrier rib pattern crossing the sustain electrode pair and a second barrier rib pattern crossing the first barrier rib pattern and having a relatively small line width in the green discharge cell. And a closed partition wall, wherein the sustain electrode pair is

A transparent electrode overlapping the second partition pattern; And a bus electrode formed on the transparent electrode and non-overlapping with the second partition pattern in the green discharge cell area.

Description

Plasma Display Panel {PLASMA DISPLAY PANEL}             

1 is a perspective view showing a discharge cell structure of a conventional three-electrode AC surface discharge type plasma display panel.

2 is a cross-sectional view showing a discharge cell structure of a conventional three-electrode AC surface discharge type plasma display panel.

3 is a plan view showing a stripe-shaped partition wall of a conventional plasma display panel.

4 is a plan view illustrating a closed partition of a conventional plasma display panel.

5A and 5B illustrate an electrode structure of a plasma display panel according to another exemplary embodiment.

FIG. 6 is a diagram illustrating an electrode structure of a plasma display panel according to still another embodiment.

7 is a plan view showing a plasma display panel according to the present invention.

8A and 8B are cross-sectional views illustrating the plasma display panel taken along the lines "I-I '" and "II-II'" in FIG.

FIG. 9 is a plan view illustrating the partition wall illustrated in FIG. 7 in detail.

<Description of Symbols for Main Parts of Drawings>

1,51: upper substrate 2,61: lower substrate

3,10,10a, 10b, 70: partition 4,6,58,62: dielectric layer

5,60: phosphor layer 7,56: protective film

9 (Z), 9 (Y): sustain electrode pair 9a, 12a, 13a, 52a, 54a: transparent electrode

9b, 12b, 13b, 52b, 54b: bus electrode X: address electrode

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a plasma display panel, and more particularly, to a plasma display panel in which the address jitter characteristic difference of each discharge cell is improved.

Plasma Display Panels (hereinafter referred to as "PDPs") are characterized by emitting phosphors by 147 nm ultraviolet rays generated during discharge of an inert mixed gas such as He + Xe, Ne + Xe or He + Ne + Xe. An image containing graphics is displayed. Such a PDP is not only thin and easy to enlarge, but also greatly improved in quality due to recent technology development. In particular, the three-electrode AC surface discharge type PDP has advantages of low voltage driving and long life because wall charges are accumulated on the surface during discharge and protect the electrodes from sputtering caused by the discharge.

1 and 2 are views illustrating a structure of a PDP of a three-electrode alternating current (AC) type which is commonly used.

Referring to FIG. 1, a discharge cell of a three-electrode AC surface discharge type PDP includes a scan electrode 9Y and a sustain electrode 9Z formed on the upper substrate 1, and an address electrode formed on the lower substrate 2. X). Each of the scan electrode 9Y and the sustain electrode 9Z includes a transparent electrode 9a and a bus electrode 9b having a line width smaller than that of the transparent electrode 9a and formed at one edge of the transparent electrode.

The transparent electrode 9a is usually formed on the upper substrate 1 by indium tin oxide (ITO). The bus electrode 9b is formed of a metal such as chromium (Cr) on the transparent electrode 9a to reduce the voltage drop caused by the transparent electrode 9a having high resistance. The upper dielectric layer 6 and the protective film 7 are stacked on the upper substrate 1 on which the scan electrode 9Y and the sustain electrode 9Z are formed side by side. In the upper dielectric layer 6, wall charges generated during plasma discharge are accumulated. The protective film 7 prevents damage to the upper dielectric layer 6 due to sputtering generated during plasma discharge and increases emission efficiency of secondary electrons. As the protective film 7, magnesium oxide (MgO) is usually used.

The lower dielectric layer 4 and the partition wall 3 are formed on the lower substrate 2 on which the address electrode X is formed, and the phosphor layer 5 is coated on the lower dielectric layer 4 and the partition wall 3 surface. The address electrode X is formed in the direction crossing the scan electrode 9Y and the sustain electrode 9Z. The partition 3 is formed in a stripe or lattice shape to prevent the ultraviolet rays and the visible light generated by the discharge from leaking to the adjacent discharge cells. The phosphor layer 5 is excited by ultraviolet rays generated during plasma discharge to generate visible light of any one of red, green, and blue. Inert mixed gas is injected into the discharge space provided between the upper and lower substrates 1 and 2 and the partition wall 3.

In such a conventional PDP, the partition wall 3 is provided in a stripe form as shown in FIG. 3 and in a lattice form as shown in FIG. In the case of a PDP employing a stripe-type partition wall, the phosphor is applied only to partition walls formed on the bottom surface of the cell and on both sides of the cell, so that the amount of the phosphor applied is limited. On the other hand, in the case of the PDP employing the closed partition, the phosphor is applied to the bottom surface of the cell and the four sides of the partition surrounding the cell, so that more visible light can be emitted than the PDP employing the star-type partition.

On the other hand, in order to further improve the brightness of the PDP employing the closed barrier ribs, an electrode structure in which the sustain electrodes Z1 and Z2 positioned vertically adjacent to each other as shown in FIGS. 5A and 5B share one bus electrode 13b. Was proposed. In this electrode structure, the bus electrodes 13b formed on the sustain electrodes Z1 and Z2 overlap with the horizontal partition wall 10a. Therefore, only one bus electrode 12b formed in the scan electrode Y1 exists in one cell. That is, since only one bus electrode that blocks visible light emitted in the cell is positioned in the cell solution, improved luminance characteristics can be obtained as compared with a conventional PDP.

However, the PDP having the structure in which the sustain electrodes Z1 and Z2 adjacent to each other in the vertical direction share one bus electrode 13b is formed so that the bus electrode 13b overlaps the partition 10 so that the cell is far away. When observed, there is a problem in that two adjacent cells up and down appear as one cell. In detail, the bus electrodes 12b formed on the scan electrodes Y in two adjacent cells up and down are formed close to the partition 10 so that the bus electrodes 12b look thick in the distance while the bus electrodes 12 are formed on the sustain electrodes Z. The electrodes 13b are formed to overlap the partition 10 so that they look thinner from a distance.

In order to solve such a problem, as shown in FIG. 6, a structure in which the horizontal bulkhead 10a is formed thick in the closed partition wall 10 and the bus electrodes 18b are superimposed thereon is proposed. This structure prevents visible light from being blocked by the bus electrodes 18b because the bus electrodes 18b overlap the horizontal partition walls 10a, thereby obtaining improved luminance and discharge efficiency. However, when the bus electrode 18b is located outside the cell than when the bus electrode 18b is located inside the cell, the thickness of the upper dielectric layer becomes relatively thick, so that address discharge between the address electrode and the scan electrode is relatively easy. There is this. As a result, there is a problem in that jitter of an address discharge of a discharge cell implementing red (R), green (G), and blue (B) occurs. In particular, there is a problem in that the jitter of the address discharge of the discharge cell that implements the green color G becomes long. This will be described in detail with reference to Table 1.

Table 1 shows the result of measuring the jitter of the address discharge of each of the first to fourth PDPs under different driving conditions. In Table 1, T represents the time taken from the time when the data pulse and the scan pulse are applied to the address electrode and the scan electrode, respectively, until the first address discharge occurs. When the probability is 99.9%, it represents the on-period of the scan pulse (its pulse width of the scan pulse), R represents a discharge cell implementing red, G represents a discharge cell implementing green, and B represents blue. The discharge cell is shown.

R G B T P T P T P PDP1 424 yen 1.354 yen 499 yen 1.429 ㎲ 436 yen 1.364㎲ PDP2 399 yen 1.304㎲ 479㎱ 1.339㎲ 427㎱ 1.324㎲ PDP3 707 yen 3.02㎲ 667 yen 3.98㎲ 642㎱ 2.94㎲ PDP4 743 yen 3.32㎲ 873㎱ 3.94㎲ 813㎱ 3.30㎲

As shown in Table 1, the discharge cells implementing green (G) on the same panel have a relatively longer time than the discharge cells implementing red (R) and blue (B). In addition, the discharge cells in which the scan pulse width is green (G) at the time when 99.9% of successful address discharges occur, that is, when the address discharge is successfully generated within the scan pulse period applied to the scan electrode are red. It is relatively longer than the discharge cells implementing (R) and blue (B). As can be seen from Table 1, the discharge cells that implement green (G) are relatively longer than the discharge cells of red (R) and blue (B), and the address discharge takes a relatively long time, and the address discharge occurs successfully. When the scan pulse width is relatively long, the jitter of the address discharge is relatively long.

Accordingly, an object of the present invention relates to a plasma display panel in which the address jitter characteristic difference of each discharge cell is improved.

In order to achieve the above object, the plasma display panel according to the present invention has first and second barrier rib patterns crossing each other, and the width of any one of the first and second barrier rib patterns corresponding to the discharge cells of a specific color is different. A closed barrier rib which is different from its width corresponding to a discharge cell of a different color, and a sustain electrode pair partially exposed by the closed barrier rib in the discharge cell of a specific color.

The closed barrier ribs may distinguish red, green, and blue discharge cells.

The first barrier rib pattern is formed to be parallel to the sustain electrode pair, and the second barrier rib pattern is formed to cross the sustain electrode pair.

The first barrier rib pattern may distinguish discharge cells implementing different colors, and the second barrier rib pattern may distinguish discharge cells implementing the same colors.

The second barrier rib pattern corresponding to the green discharge cell may be formed to be relatively narrower than the width of the second barrier rib pattern corresponding to at least one of the red and blue discharge cells.

Each of the sustain electrode pairs may include a bus electrode partially overlapping the first barrier rib pattern, and a transparent electrode formed under the bus electrode.

At least one bus electrode of the red and blue discharge cells may be formed to overlap the first barrier rib pattern.

The bus electrode of the green discharge cell is formed in the discharge space of the green discharge cell.

The thickness of the upper dielectric layer overlapping the bus electrode of the green discharge cell is relatively thinner than the thickness of the upper dielectric layer overlapping the bus electrode of the red and blue discharge cells.

Other objects and features of the present invention in addition to the above objects will become apparent from the description of the embodiments with reference to the accompanying drawings.

Hereinafter, exemplary embodiments of the present invention will be described with reference to FIGS. 7 to 9.

7 is a plan view showing a plasma display panel according to the present invention.

Referring to FIG. 7, a PDP according to the present invention includes red (R), green (G), and blue (B) discharge cells implementing red (R), green (G), and blue (B), respectively, and each discharge. It is provided with a closed partition wall 70 for dividing the cell.

Each of the red (R), green (G), and blue discharge cells (B) is a pair of sustain electrodes formed on the upper substrate 51 as shown in FIGS. 8A and 8B, that is, a scan electrode (Y) and a sustain electrode. (Z) and the address electrode X formed on the lower substrate 61 is provided.

Each of the scan electrode Y and the sustain electrode Z of the sustain electrode pair includes transparent electrodes 52a and 54a and bus electrodes 52b and 54b formed on the transparent electrodes 52a and 54a.

The transparent electrodes 52a and 54a are usually formed on the upper substrate 51 by a transparent conductive material, for example, indium tin oxide (ITO).

The bus electrodes 52b and 54b are usually formed of a metal such as chromium (Cr) to reduce the voltage drop caused by the transparent electrodes 52a and 54a having high resistance. The bus electrodes 52b and 54b are formed to overlap the first partition walls 70a of the discharge cells implementing red (R) and blue (B), and are positioned inside the discharge cells implementing green (G). do.

An upper dielectric layer 62 and a passivation layer 56 are formed on the upper substrate 51 on which the sustain electrode pairs Y and Z are formed. The upper dielectric layer 62 accumulates wall charges generated during plasma discharge. The passivation layer 56 prevents damage to the upper dielectric layer 62 due to sputtering generated during plasma discharge and increases emission efficiency of secondary electrons. As the protective film 56, magnesium oxide (MgO) is usually used.

The address electrode X is formed in the direction crossing the scan electrode Y and the sustain electrode Z. The lower dielectric layer 58 for wall charge accumulation is formed on the lower substrate 61 on which the address electrode X is formed. The closed barrier rib 70 formed on the lower dielectric layer 58 prevents ultraviolet rays and visible rays generated by the discharge from leaking to the adjacent discharge cells. Phosphor 60 is applied to the surfaces of the lower dielectric layer 58 and the partition wall 70. The partition wall 70 prevents ultraviolet rays and visible rays generated by the discharge from leaking into adjacent discharge cells. The phosphor 60 is excited by ultraviolet rays generated during plasma discharge to generate visible light of any one of red, green, and blue. Inert gas for gas discharge is injected into the discharge space provided between the upper and lower substrates 51 and 61 and the partition wall 70.

In the discharge cell of this structure, the discharge cell is selected by the address discharge between the address electrode X and the scan electrode Y, and then the discharge cell is maintained by the sustain discharge between the sustain electrode pairs Y and Z. In such a discharge cell, the fluorescent substance 56 emits light by ultraviolet rays generated during sustain discharge, so that visible light is emitted to the outside of the cell. As a result, the discharge cells adjust the period during which the discharge is maintained to implement gray scale, and the PDP in which the discharge cells are arranged in a matrix form displays an image.

As shown in FIG. 9, the closed partition wall 70 according to the present invention includes a first partition wall 70a formed to cross the address electrode X and a second partition wall formed parallel to the address electrode X. 70b). That is, the first partition wall 70a distinguishes discharge cells implementing the same color vertically adjacent to each other, and the second partition wall 70b distinguishes discharge cells implementing different colors adjacent to the left and right sides. In particular, the width d1 of the first partition wall 70a that divides the discharge cells implementing green (G) is discharge cells implementing red (R) and blue (B), as shown in FIGS. 8A and 8B. It is formed relatively narrower than the width (d2) of the first partition wall (70a) for distinguishing. Accordingly, the width w1 of the discharge cells implementing green (G) is relatively wider in the direction parallel to the address electrode (X) than the width w2 of the discharge cells implementing red (R) and blue (B). Is formed. Accordingly, the bus electrodes 52b and 54b of the discharge cells implementing red (R) and blue (B) overlap the first partition walls 70a, while the bus electrodes of the discharge cells implementing green (G) ( 52b and 54b are formed in the discharge cell without overlapping the first partition wall 70a. In this case, due to the bus electrodes 52a and 54a of the green (G) discharge cells located in the discharge cells, the thickness of the upper dielectric layer 62 inside the green (G) discharge cells is red (R) and blue (B) discharge cells. It is formed relatively thinner than the thickness of the upper dielectric layer 62 therein. Accordingly, a relatively strong electric field is applied in the region overlapping with the bus electrodes 52a and 54a of the green (G) discharge cell to concentrate the charged particles. Due to the concentrated charged particles, the address discharge occurs relatively easily in the green (G) discharge cells than in the red (R) and blue (B) discharge cells.

In this way, by forming the bus electrodes 52a and 54a inside the discharge cells in the green (G) discharge cells having relatively long jitter of address discharge, the jitter of the address discharge is reduced and the address performance is improved. In addition, the bus electrodes 52a and 54a of the red (R) and blue (B) discharge cells except for the green (G) discharge cells are formed to overlap the first partition wall 70a, thereby improving luminance and efficiency.

As described above, the plasma display panel according to the present invention is formed such that the first barrier rib of the green discharge cells has a relatively narrower width than the first barrier ribs of the red and blue discharge cells. Accordingly, the bus electrodes of the red and blue discharge cells are formed to overlap the first partition wall, and the bus electrodes of the green discharge cells are positioned in the discharge space of the green discharge cells. Accordingly, the address discharge is more likely to occur in the green discharge cells than in the red and blue discharge cells, thereby reducing jitter. In addition, since the bus electrodes of the red and blue discharge cells are formed to overlap the first partition wall, the visible light is blocked by the bus electrodes, thereby improving brightness and efficiency.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

Claims (9)

A sustain electrode pair formed on the upper substrate; Defining a red, green, and blue discharge cell, and including a first barrier rib pattern crossing the sustain electrode pair and a second barrier rib pattern crossing the first barrier rib pattern and having a relatively small line width in the green discharge cell. With a closed partition wall The sustain electrode pair is A transparent electrode overlapping the second partition pattern; And a bus electrode formed on the transparent electrode and non-overlapping with the second partition pattern in the green discharge cell area. delete delete delete delete The method of claim 1, The bus electrode And a second barrier rib in the red and blue discharge cells. The method of claim 1, And the bus electrode intersects the first barrier rib pattern. The method of claim 1, And a bus electrode of the green discharge cell is formed in a discharge space of the green discharge cell. The method of claim 8, An upper dielectric layer formed to cover the sustain electrode pairs; The upper dielectric layer is And a thickness in a region overlapping with the bus electrode in the green discharge cell is relatively thinner than a thickness in a region overlapping with the bus electrode in the red and blue discharge cells.

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