KR100534613B1 - apparatus and method for booting system using flash memory - Google Patents

Abstract

According to the system booting apparatus and method using a flash memory according to the present invention, a system memory; A system memory controller coupled to the system memory via a system bus to control the system device; A NAND flash memory coupled to the system bus and storing boot code, OS program, data and initialization instructions / data for initializing a system device and the system memory; A boot code stored in the NAND flash memory, connected to the NAND flash memory through a system bus, loading initialization instructions and data for initialization of a system device, storing the stored initialization instructions and data in the system memory controller, and mapping the system memory; It includes a bootstrapper that loads an OS program and data, copies it to the system memory through the system memory controller, and boots a system device according to the copied boot code, and uses NAND flash memory as a boot ROM. It is possible to implement the system at a lower price than that of the implementation. Also, since the internal SFR setting value or the system memory setting value is variable, it can support various memories.

Description

Apparatus and method for booting system using flash memory}

The present invention relates to booting a system device, and more particularly, to an apparatus and method for booting a system using a NAND flash memory.

System devices such as computers and portable multimedia devices such as PDAs (Personal Digital) perform booting operations at power-up.

In general, computers are powered by operating system (OS) software, such as MS-DOS or WINDOWS.

Before running an OS, computers are run by programs built into the BIOS (Basic Input / Output Service), which is called boot strapping and is simply abbreviated as booting.

The BIOS includes a Post Power On Self Test (POST) operation and searching for peripherals of the computer, such as a hard drive or floppy diskette. POST initializes the hardware connected to the computer, such as memory, printers, faxes, and other peripherals, and puts them into an operational state.

The conventional BIOS is difficult to use additional peripheral devices because they are fixed by storing information of computer peripheral devices in a ROM. In order to improve this, recently, a technology for enabling connection with various peripheral devices has been developed using a flash memory or the like to meet the needs of a user's job.

Flash memory providing a BIOS is disclosed in US Pat. No. 5,535,357. According to the U.S. Patent No. 5,535,357, a flash memory system includes a controller and a flash memory.

 Flash memory stores the configuration for the operating system and user storage devices as well as the BIOS. It is divided into a number of blocks, each of which is stored in each block. The controller performs memory mapping between flash memory and system memory. The memory mapping operation of the "window" concept is performed by the window circuit according to the instructions of the configuration circuit CONFIG and the state circuit.

The configuration circuit CONFIG stores the specification of the flash memory. The status circuit takes the specification of flash memory and detects access to system memory in the current window and identifies that the controller reads the system memory address individually or sequentially. And interpret it.

The window circuit WINDOW maps some addresses of system memory to blocks in flash memory. Thus, the flash memory system boots according to the flash memory data mapped to the system memory.

However, the patent does not present a specific scheme for memory mapping between flash memory and system memory.

Meanwhile, a system for describing a memory mapping operation between a flash memory and a system memory is shown in FIG. 1. In FIG. 1, the system 100 includes a system chip 140, a NAND flash memory 124, and an integrated chip 120 having a built-in interface 122, a system memory 130, and a complex chip 120 and a system. The controller 110 controls the memory 130. The controller 110 is a type of central processing unit (CPU) and includes a CPU core unit 112 and a memory controller 114 that perform arithmetic functions.

The memory controller 114 performs the memory mapping between the NAND flash memory 124 and the system memory 130, and uses the interface unit 122 in the middle of the memory mapping process.

The interface unit 122 stores a NAND flash memory 124 data temporarily by incorporating a storage device such as a register or RAM, and stores the data by the memory controller 114 through the system bus 140. Send to 130.

Here, data transfer between the interface unit 122 and the NAND flash memory 124 is performed in the NAND interface method, while data transfer between the interface unit 122 and the controller 110 is performed in the ROM interface method (“NOR interface”). Method ", which is referred to herein as " ROM interface method ". The NAND interface method means data transmission in units of blocks by a block address and a command, and serial access is possible during data transmission.

Meanwhile, the ROM interface method is a general method of transmitting data based on an address in a byte / word unit, and random access is possible in data transmission.

The system 100 transmits the NAND flash memory 124 data to the interface unit 122 using the NAND interface method, and then transmits the data to the system memory 130 using the ROM interface method. In such a data transmission method, since the controller 110 needs to go through a two-stage interface method, that is, a ROM interface method-a NAND interface method, to access the NAND flash memory 124 data, the data access speed decreases. Is generated. In particular, the time required for the controller 110 to access the boot data stored in the NAND flash memory 124 is one measure of the performance of the system. Using a two-stage interface in a system that requires a short boot time is a problem of degrading system performance.

In addition, when the interface unit 122 includes registers, the interface unit 122 becomes large because the area occupied by the registers is large. And since all of the data of the NAND flash memory 124 is loaded into the interface unit 122, the size of the interface unit 122 becomes larger.

Due to the size of the interface unit 122, the size of the composite chip 120 increases, resulting in an increase in the cost of the system device 100, which weakens the competitiveness of the system device 100.

Therefore, in a system using a flash memory with a program that supports connection of various peripheral devices, the memory mapping operation between the flash memory and the system memory is specified, and the boot time and data access time are reduced, thereby optimizing the system performance. There is a need for a system device that can reduce the number of steps.

Accordingly, the present invention has been made to solve the above problems, and an object of the present invention is to reduce system performance by reducing boot time and data access time by using NAND flash memory which is less expensive than NOR flash memory with small overhead. An object of the present invention is to provide a system booting device using flash memory and a method thereof, which can reduce cost while optimizing.

According to an aspect of a system booting apparatus using a flash memory according to the present invention for achieving the above object, a system memory; A system memory controller coupled to the system memory via a system bus to control the system device; A NAND flash memory coupled to the system bus and storing boot code, OS program, data and initialization instructions / data for initializing a system device and the system memory; A boot code stored in the NAND flash memory, connected to the NAND flash memory through a system bus, loading initialization instructions and data for initialization of a system device, storing the stored initialization instructions and data in the system memory controller, and mapping the system memory; The system may include a bootstrapper which loads an OS program and data, copies the data into the system memory through the system memory controller, and boots the system device according to the copied boot code.

The initialization command and data stored in the NAND flash memory store at least one command and data of a special function register (SFR) write command, an SFR data to write, a wait command, a count number, a transfer command, and a transfer count data.

The system memory controller includes a storage unit for storing system initialization instructions and data loaded from the NAND flash memory from the boot strapper.

The boot strapper includes: a state machine for reading an instruction and data loaded from the NAND flash memory to perform an operation; It includes an N-bit counter that can handle the wait function according to the Wait command.

The boot strapper may further include a NAND flash memory controller that loads boot code, an OS program, data, and initialization instructions / data stored in the NAND flash memory.

Meanwhile, according to an aspect of a booting method of a system device including a system memory, a NAND flash memory, and a system memory controller, when a reset signal is applied to the system device, a system device and a system stored in the NAND flash memory are provided. Sequentially reading a plurality of instructions for initializing a memory; Initializing the system memory by loading data for the command from the NAND flash memory to the system memory controller according to the sequentially read instructions from the NAND flash memory; After initialization of the system memory, a transfer count value and a destination address value are read from the NAND flash memory, and boot codes, OS programs, and data stored in the NAND flash memory are stored in the system memory through the system memory controller according to the read count value. Booting a system device according to the loaded and loaded boot code.

A system device stored in the NAND flash memory and data corresponding to a plurality of instructions and instructions for initializing the system memory may include a special function register (SFR) write command, an SFR data to write, a wait command, a count number, a transfer command, a transfer. It includes at least one command and data of the count data.

Hereinafter, a system booting apparatus using a NAND flash memory according to the present invention and a preferred embodiment of the method will be described in detail with reference to the accompanying drawings.

FIG. 2 is a block diagram illustrating a system booting apparatus using a flash memory according to the present invention, and FIG. 3 is a diagram illustrating a structure of a NAND flash memory according to the present invention shown in FIG.

As shown in FIG. 2, the system booting apparatus according to the present invention includes a controller 210, a NAND flash memory 220, and a system memory 230.

The controller 210 includes a CPU core unit 212, a bootstrapper 214, and first and second memory controllers 216 and 218. The first memory controller 216 is a NAND flash memory 220 controller. The second memory controller 218 may be a system memory 230 controller and the first memory controller 216 may be included in the boot strapper 214.

The CPU core unit 212 of the controller 210 performs a calculation function of the system 200, and the first memory controller 216 controls the NAND flash memory 220, and the NAND flash memory 220. And mapping operations.

The second memory controller 218 controls the mapping with the system memory 230. The second memory controller 218 has a storage device such as a register or a RAM built therein, and the NAND flash memory 220 is formed by the bootstrapper 214. By temporarily storing the initialization data loaded from the system and transmitting the temporarily stored data to the system memory 230 through the system bus, the system memory 230 is initialized and the boot code (Boot) loaded from the NAND flash memory 220 is initialized. Code), an OS program, and data are provided to and driven by the system memory 230 to boot the system 200.

In addition, as illustrated in FIG. 3, the NAND flash memory 220 includes a data area 221, an OS program area 222, a boot code area 223, and an initialization command. And an initial command & data area 224.

The data area 221 stores software codes indicating how to use user applications or applications using user storage devices according to a user's request.

The OS program area 222 stores software for operating the system 200, such as MS-DOS or WINDOWS provided by Microsoft Corporation.

The boot code area 223 stores codes for booting the system 200.

In the initialization command and the data area 224, various commands for initializing the system 200, that is, the controller 210 and the system memory 230, and data according to the command are stored. For example, SFR (Special Function) Register) Write Command, SFR Data to Write, Wait Command, Count Number, Transfer Command, Transfer Count, etc. may be stored.

In addition, the bootstrap 214 shown in FIG. 2 includes a state machine (not shown) for reading an instruction and data (Command / Data) read from the NAND flash memory 220 and performing an operation. It may include an N-bit counter (not shown) that can process the wait function according to the Wait Command. Here, the N-bit counter may use a pre-scaler in order to use the minimum logic.

The operation of the system booting apparatus using the flash memory according to the present invention having the above configuration will be described in detail.

First, when a reset signal is applied to the boot strapper 214 of the system 200 and then released, the boot strapper 214 is connected to the NAND flash memory through the first memory controller 216, that is, the NAND flash memory controller. Commands and data stored in the initialization command and data area of 220 are sequentially read.

The bootstrapper 214 sets the SFR of the second memory controller 218, that is, the system memory controller, to map the system memory 230 according to instructions and data read from the NAND flash memory 220. The memory 230 is set.

If the command read from the NAND flash memory 220 is a command that must wait for a predetermined time, that is, a Wait Command, the Wait Command is repeated several times while counting the time by a counter built in the boot strapper 214. Wait function is used.

 As such, when the configuration for initializing the system is completed between the system memory controller 218 and the system memory 230, the bootstrapper 214 may initialize the command and data area 224 of the NAND flash memory 220. The boot code, OS program, and data stored in the NAND flash memory 220 are copied to the system memory 230 by using a transfer command stored in the NAND flash memory 220.

When the copy operation is completed, the reset of the CPU core unit 212 is released, and the boot code stored in the system memory 230 is read to execute a boot program.

For example, an instruction, for example, an initialization instruction of the NAND flash memory 220 and an SFR Write Command stored in the data area 224 may be assigned to a corresponding SFR address, and other instructions, for example, Wait Command, Transfer Command Allocates an address on the reserved memory map.

If the read command is, for example, 0x0500_0000 and the address of the SFR area, the command to write data following Ox0500_0000 is written.

A method of booting a system using the flash memory according to the present invention corresponding to the operation of the system booting apparatus using the flash memory according to the present invention will be described step by step with reference to FIG. 4.

4 is a flowchart illustrating an operation of a system booting method using a flash memory according to the present invention.

As shown in Figure 4, it is determined whether the reset signal is applied to the system (S101).

As a result of the determination, when the reset signal is applied, the bootstrap 214 initializes the instructions stored in the NAND flash memory 220 through the NAND flash memory controller 216, that is, the controller 210 and the system memory 230. In order to sequentially read the instructions (S102).

It is determined whether the instruction read from the NAND flash memory 220 is an instruction (S103), and when the read instruction is an SFR Write Command, the SFR data stored at the address following the SFR Write Command is read from the NAND flash memory 220. (S104).

The read SFR data is stored in the system memory controller 218 to perform a mapping operation with the system memory 230 (S105). Herein, when the SFR command is continuously stored in the NAND flash memory 220, that is, when there are SFR commands for a plurality of environment options for initialization of the controller 210 and the system memory 230, the above operation is performed. By repeatedly performing the mapping operation through the configuration between the controller 210 and the system memory 230.

In the step S103, when the read command is a wait command, that is, a command to wait for a predetermined time for initialization of the system memory, a count number stored in the NAND flash memory 220 is read ( In step S106, the counter in the boot strapper 214 is counted by the number of counts read (S107). When there are a plurality of such wait commands, the above-described counting operation is repeatedly performed several times.

On the other hand, in step S103, when the read command is a Transfer Command, the bootstrapper 214 reads the Transfer count value and the destination address value from the NAND flash memory 220 shown in Fig. 3 (S108), The boot code, the OS program, and the data stored in the NAND flash memory 220 are copied to the system memory 230 according to the read count value (S109). Therefore, the system 200 is booted by accessing the boot code stored in the system memory 230 and releasing the reset of the CPU core unit 212 (S110).

In this booted state, the system memory controller 218 drives the system 200 according to an OS program stored in the system memory 230.

One embodiment according to the present invention described above is merely illustrative, and does not limit or limit the technical aspects and scope of the present invention. Therefore, various changes and modifications can be made by those skilled in the art without departing from the spirit and scope of the present invention.

As described above, the system booting apparatus using the NAND flash memory and the method according to the present invention, compared to the conventional system device having a two-stage interface method, ROM interface method-NAND interface method, the one-stage interface method, NAND interface Since it has a scheme or ROM interface scheme, booting speed and data access speed are fast.

In addition, the use of NAND flash memory as the boot ROM allows a system to be implemented at a lower cost than that implemented with NOR flash memory.

In addition, since the internal SFR setting value and the system memory setting value can be changed, it can support various memories.

 1 is a block diagram showing a system booting apparatus according to the prior art.

2 is a block diagram illustrating a system booting apparatus using a flash memory according to the present invention.

3 is a diagram showing the structure of a NAND flash memory according to the present invention shown in FIG.

4 is a flowchart illustrating an operation of a system booting method using a flash memory according to the present invention.

* Description of the symbols for the main parts of the drawings *

200: system unit 210: controller

212: CPU core unit 214: bootstrapper

216, 218: memory controller 220: NAND flash memory

230: system memory

Claims (7)

A system device, System memory; A system memory controller coupled to the system memory via a system bus to control the system device; A NAND flash memory coupled to the system bus and storing boot code, OS program, data and initialization instructions / data for initializing a system device and the system memory; A boot code stored in the NAND flash memory, connected to the NAND flash memory through a system bus, loading initialization instructions and data for initialization of a system device, storing the stored initialization instructions and data in the system memory controller, and mapping the system memory; And a boot strapper for loading an OS program and data, copying the data to the system memory through the system memory controller and booting the system device according to the copied boot code. The method of claim 1, Initialization instructions and data stored in the NAND flash memory, Special Function Register (SFR) A system booting device using flash memory that stores at least one command and data among Write Command, SFR Data to Write, Wait Command, Count Number, Transfer Command, and Transfer Count data. The method of claim 1, The system memory controller, And a storage unit for storing system initialization instructions and data loaded from the NAND flash memory from the boot strapper. The method of claim 1, The bootstrapper, A state machine for reading an instruction and data loaded from the NAND flash memory to perform an operation; System booting device using flash memory including N-bit counter that can handle wait function according to Wait command. The method of claim 1, The bootstrapper, And a NAND flash memory controller configured to load boot codes, OS programs, data, and initialization instructions / data stored in the NAND flash memory. A booting method of a system device including a system memory, a NAND flash memory, and a system memory controller, When a reset signal is applied to the system device, sequentially reading a system device stored in the NAND flash memory and a plurality of instructions for initializing the system memory; . Initializing the system memory by loading data for the command from the NAND flash memory to the system memory controller according to the sequentially read instructions from the NAND flash memory; After initialization of the system memory, a transfer count value and a destination address value are read from the NAND flash memory, and boot maps, OS programs, and data stored in the NAND flash memory are controlled according to the read count value. And booting a system device according to the loaded boot code by loading the system memory through a system memory controller. The method of claim 6, A system device stored in the NAND flash memory and data corresponding to a plurality of instructions and instructions for initializing the system memory may include a special function register (SFR) write command, an SFR data to write, a wait command, a count number, a transfer command, a transfer. A system booting method using flash memory that stores at least one command and data among count data.