KR100520924B1 - Light emitting diode driving apparatus and light emitting diode display module for multi-mode driving - Google Patents

Abstract

The LED driving control apparatus of the present invention includes a dynamic mode unit for applying input data from the outside to the panel in a dynamic driving method, a memory mode unit for storing the input data from the outside in an internal memory and applying the image data to the panel; A video mode unit for driving a panel using a video data memory for storing and a control data memory for storing control data, and an output signal of the dynamic mode unit, the memory mode unit, and the video mode unit are selected and applied to the panel. A multiplexer and an external input mode selector configured to receive a signal from an external device and to select and operate one of the dynamic mode, the memory mode, and the video mode.

The driving control apparatus of the present invention can selectively apply dynamic driving, memory driving, and video driving modes on one printed circuit board.

Description

LIGHT EMITTING DIODE DRIVING APPARATUS AND LIGHT EMITTING DIODE DISPLAY MODULE FOR MULTI-MODE DRIVING}

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a drive control device for driving a light emitting diode (LED) display panel used in an electronic display system, and an LED display module including the drive control device. The present invention relates to a LED driving control device that can be commonly applied to.

The electronic signboard system displays LEDs, small fluorescent tubes, etc. in a matrix, and displays information such as various characters and pictures, and is generally composed of red, green, and blue (R, G, B) LED elements. The combination of LED display modules displays multiple colors.

There are many ways to drive the LED display module of the electronic display system, but it can be classified into a dynamic method and a static method, and a dynamic method with a small number of driving elements and a low manufacturing cost is used on a large screen. Since it is effective, it is widely used for an electronic sign board system.

FIG. 1 shows an example of a dynamic mode drive control circuit for driving a 16x16 LED dot matrix panel.

In FIG. 1, input data (R_DATA, G_DATA, B_DATA) for turning on / off three LEDs of red, green, and blue (R, G, B) is input to each shift register 11, 12, 13, The output terminal may be connected to the next driving control circuit in a cascade form, and output data R_DATA_O, G_DATA_O, and B_DATA_O may be output to the input terminal of the next driving control circuit. In addition, the clock signal CLK is input to each of the shift registers 11, 12, and 13, and the data is sequentially stored in each of the shift registers 11, 12, and 13.

The input data stored in the shift registers 11, 12, 13 are latched to the latch element 14 by the latch signal LATCH_I, and the LED dot matrix panel 10 is passed through the output enable circuit 17. Drive. That is, vertical line data driving to the LED dot matrix panel 10 is performed. At the same time, the address signals A0 to A3 are input and decoded to the address decoder 18 to drive the panel 10, thereby driving the horizontal line data driving of the LED dot matrix 10. Is executed. Subsequently, by performing vertical line data driving for the next data while sequentially changing the address input to the address decoder 18, the LED of the LED dot matrix 10 is turned on / off to display an image.

The output enable circuit 17 turns on the vertical line driving data by using the output enable signal OUT_EN at the time when the address is changed to solve the problem that an afterimage occurs due to the horizontal line driving. Control the time appropriately.

In addition, like the input data R_DATA, G_DATA, and B_DATA, the clock signal CLK, the latch signal LATCH_I, and the output enable signal OUT_EN are respectively a clock output signal CLOCK_O, a latch output signal LATCH_O, and an output. As the enable output signal OUT_EN_O, it is output to the drive control circuit of the next LED module connected in cascade form.

In general, the LED display panel used in the electronic signage system is characterized by the input and output type of the drive control circuit, the data processing, the driving voltage, and the duty ratio (depending on the ratio of display time) according to the use of the system to be manufactured or the installation environment. It can be set differently. However, as described above, the conventional drive control circuit can execute only one drive method, and there is a problem that the drive control circuit must also be changed when the drive method is changed.

In addition, when the drive control circuit is changed as described above in the electronic sign system, the design of the system main controller to be interlocked with the driving control circuit must be changed, so that the design of the electronic sign system is complicated and the manufacturing cost increases.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems of the conventional drive control apparatus for LED panels, and an object thereof is to provide a drive control apparatus capable of executing various driving methods as one apparatus.

It is also an object of the present invention to provide a drive control device capable of reducing the burden of controlling the drive control device in the main controller of a display system such as an electronic display system.

In order to achieve the above object, the LED driving control apparatus of the present invention,

A control signal buffer for receiving and storing control signals for controlling an operation of the driving control device;

A dynamic mode unit having a shift register for receiving input data from the outside and applying the data stored in the shift register to the panel in a dynamic driving method;

A memory mode unit having a shift register for receiving and storing input data from an external device, an internal memory for receiving and storing data stored in the shift register, and driving the panel with an output signal of the internal memory;

A shift register for receiving and storing input data from an external source, a video data memory for storing image data, a control data memory for storing control data for controlling the operation of the driving control apparatus, and a pulse for the image data of the video data memory A video mode unit having a PWM counter for executing width modulation control and driving the panel with an output signal of the PWM counter;

A multiplexer which selects one of an output signal of the dynamic mode unit, a memory mode unit, and a video mode unit and applies it to the panel;

And an external input mode selector which receives a signal from an external device and selects and operates one of the dynamic mode, the memory mode, and the video mode.

The video mode unit may be divided into a first video mode unit and a second video mode unit according to whether a PWM amplitude controller for separating data stored in the video data memory into image data and luminance data and inputting the same to the PWM counter. .

In addition, the video mode unit

A correction data memory for receiving and storing data for color correction for each dot of the panel from the shift register;

A brightness and white balance memory for receiving and storing data for adjusting brightness and white balance of the light emitting diode of the panel from the shift register according to a control signal stored in the control signal buffer;

A luminance controller which receives data stored in the luminance and the white balance memory, divides the clock of the PWM counter, and adjusts the luminance of the light emitting diode of the dot matrix panel;

A white balance controller which receives data stored in the luminance and white balance memory, divides the clock of the PWM counter, and adjusts the white balance of the light emitting diode of the panel;

The apparatus may further include a dot correction controller that receives data stored in the correction data memory, divides the clock of the PWM counter, and corrects the color of each dot of the panel.

The video mode unit may receive input data of the external input mode selector and control data input to the control data memory and generate a read address corresponding to a duty ratio to be driven.

The driving control apparatus may be easily mounted on an LED display module used in an electronic board or the like.

Hereinafter, a preferred embodiment of the present invention will be described with reference to FIG. 2.

2 is a block diagram showing an LED driving control apparatus according to an embodiment of the present invention. In FIG. 2, the drive control apparatus which drives the 16x16 LED dot matrix 100 is shown as an example.

In the driving control apparatus of FIG. 2, first, mode selection signals for setting the overall operation of the driving control are input to the external input mode selector 120, and the basic control signals and address signals A0 to A3 for controlling the operation of the driving control apparatus. ) Is input to the control signal buffer 110.

The signals input to the external input mode selector include PIN / REGISTER and PRE1 / TEST signals for determining the input method of the control data, DYN / MEM and VIDEO / VIDEO + MAG signals for determining the operation mode of the drive control device, and driving. LINEOUT_N / P and COLOUT_N / P signals that determine how data is applied to the line driver, POSITION0 to POSITION3 signals that determine the address corresponding to the position of each drive control device according to the duty ratio, and the drive control device There is a DRIVE_MTRX signal to select the drive mode.

The control data is input and set through one of the external pin PIN, the external controller PRE1, and the internal register REGISTER according to the PIN / REGISTER and PRE1 / TEST signals. Here, the TEST signal is for testing the drive control device. Input through the external pin (PIN) is when some of the control data 30 bits are set by the external pin (PIN) and the rest is set in advance internally, input through the external controller (PRE1) is 30 bits control data All of them are stored in the internal memory to be described later, and the input through the internal register (REGISTER) represents a case where all 30 bits of the control data are set in advance.

The operation mode of the drive control device is one of dynamic mode (DYN), memory mode (MEM), first video mode (VIDEO) and second video mode (VIDEO + MAG) according to the DYN / MEM and VIDEO / VIDEO + MAG signals. Is set. The operation of each mode will be described later.

According to the LINEOUT_N / P signal, the driving element drives the output logic of the horizontal line to active low or active high, and likewise activates the output logic of the vertical line according to the COLOUT_N / P signal. Drive to active low or active high. The DRIVE_MTRX signal determines whether the output drive is 1x16 drive or 2x8 drive. The POSITION0 to POSITION3 signals function to vary the duty ratio of the driving control device in the video mode. This will be described below along with video mode operation.

As described above, when the operation mode and the basic control values of the drive control device are input through the control signal buffer 110 and the external input mode selector 120, the drive control device may be configured to have dynamic, memory, first and It operates in one of the second video modes. R, G, and B input data R_DATA, G_DATA, and B_DATA are input to the selected mode circuit. The control signals inputted through the R, G, and B data (R_DATA_O, G_DATA_O, B_DATA_O) and the control signal buffer 110 required as input signals of the next stage driving control device among the output signals of the respective mode circuits are first multiplexers ( The signals are output through the multiplexer (MUX1) 130 and the signals for driving the LED dot matrix panel 100 are output through the second multiplexer (MUX2) 140. That is, the first and second multiplexers 130 and 140 select one of the output signals of the dynamic mode, the memory mode, and the first and second video modes, and output them to the panel 100 and the next driving control device. .

The signal output from the first multiplexer 130 is input in the cascade form to the drive control device of the next stage. The R, G, and B output signals RO [15..0], GO [15..0], and BO [15..0] output from the second multiplexer 140 are connected to the output enable circuit 150. It is applied to the panel 100 through the line driving device 170 to execute vertical line driving, and the horizontal line signal LINE [15..0] is applied to the panel 10 through the 16 line driving device 170. By performing horizontal line driving, the LED of the panel 100 is operated to display an image.

Here, the output enable circuit 150 turns on the vertical line driving data by using the output enable signal OUT_EN at the time when the address is changed in order to solve the problem that an afterimage occurs due to the horizontal line driving. on) to control the time appropriately.

Next, the operation of each mode will be described.

(Dynamic mode)

The dynamic mode circuit 200 of FIG. 2 is shown in detail in FIG. 3. The dynamic mode circuit of FIG. 3 is the same as the conventional dynamic mode described with reference to FIG. 1 except for receiving a control signal from the control signal buffer 110 and outputting data to the first and second multiplexers 130 and 140. Do. Therefore, description thereof is omitted.

(Memory mode)

The memory mode circuit 300 of FIG. 2 is shown in detail in FIG. 4. Unlike the dynamic mode of FIG. 3, the memory mode does not use the latch 240.

In the memory mode, input data (R_DATA, G_DATA, B_DATA) is input to each shift register (310, 320, 330). Input data stored in the shift registers 310, 320, and 330 are sequentially stored in the 16x16 bit memories 340, 350, and 360, and the addresses of the memories 340, 350, and 360 are built in their own counters. Is generated by

The memory read / write generator 370 controls reading or writing of each of the memories 340, 350, and 360 according to the input of the latch signal LATCH, and if the write operation does not occur, the read operation is repeated. Run

The address decoder 380 generates horizontal line driving data according to the read signal READ_SIG of the memory read / write generator 370.

(First and second video modes)

The first and second video mode circuits 400 of FIG. 2 are shown in detail in FIG. 5.

First, the first video mode will be described.

The R, G, and B input data R_DATA, G_DATA, and B_DATA are input to the 10-bit x 3x16 shift register 410 by the shift clock S_CRK. In addition, correction data, control data, and the like to be stored in the internal memory of the driving control apparatus are also input through the shift register 410.

The shift register 410 may be set to shift registers of 1x3x16, 2x3x16, 4x3x16, 6x3x16, 8x3x16, and 10x3x16 bits according to the control data. In addition, the input method can be converted in series and in parallel by the control data. In the case of serial, all R, G, and B data are input through the R input terminal, and the G and B input terminals are not used.

In addition, the input data of the shift register 410 may be selected from 1 bit up to 10 bits. That is, data of 1, 2, 4, 6, 8, 10 bits can be selected according to the control data value stored in the control data memory 480. Therefore, by appropriately changing and inputting control data, only LED on / off driving is required to display only characters, and signals up to 10 bits (1024 gray scales) can be driven to display high quality video signals. Can be.

The data input through the shift register 410 may be a video data memory 470 that is an internal memory, a correction data memory 480, and control data according to control signals VD / CD, CRTL / BRT, and LATCH. Memory 490 and brightness and white balance memory 500, respectively.

The control signal VD / CD is a signal for selecting the video data memory 470 and the correction data memory 480, and the CTRL / BRT is a signal for selecting the control data memory 490 and the luminance and white balance memory 500. , LATCH is a signal to write data to memory.

The video data memory 470 is a memory for storing 30x16x16 bits of data for displaying an image on the LED, and the correction data memory 480 is for 15x16x16 bits for color correction for each dot of the 16x16 dot matrix panel 100. The memory where data is stored. The video data memory 470 preferably uses dualport RAM in which data read / write is executed independently.

On the other hand, the control data memory 490 is a memory for storing 30-bit control data for controlling the operation of the drive control device, the brightness and white balance memory 500 is R, G, It is a memory that stores 20-bit data for controlling the luminance and white balance of B colors.

The memory write address generator 420 generates data write addresses for the video data memory 470 and the correction data memory 480 according to the address signals A0 to A3, and controls them according to the generated addresses. The corresponding data is stored in the memory selected by the signals VD / CD and CRTL / BRT.

The data buffer 540 buffers the data stored in the video data memory 470 to be suitable for 1x16 driving or 2x8 driving.

The pulse width modulation (PWM) counter 550 performs pulse width modulation control on the data output from the data buffer 540 according to the clock of the gradation clock generator 450.

The gradation clock generator 450 is a circuit for generating a clock for driving the PWM counter 550. The gradation clock generator 450 selects an appropriate basic clock according to the clock of the oscillator and the external clock G_CLK input to the control signal buffer 110. . The gray clock generator 450 may increase or decrease the clock of the PWM counter 550 in multiples from 5 MHz to 80 MHz. Since the overall brightness of the LED panel 100 can be changed by such a clock change, the brightness of the LED panel can be easily adjusted by changing only the control data.

The luminance controller 510 receives 5-bit data stored in the luminance and white balance memory 500, divides the clock of the PWM counter 550, and adjusts the luminance of the LEDs of the panel 100. Meanwhile, the white balance controller 520 receives the 15-bit data stored in the luminance and the white balance memory 500, divides the clock of the PWM counter 550, and adjusts the white balance of the LED of the panel 100.

The dot correction controller 530 receives 5-bit data for each color stored in the correction data memory 480, divides the clock of the PWM counter 550, and corrects the color of each dot of the panel 100.

As described above, the PWM counter 550 is a video data memory 470 by clock division by the gradation clock generator and clock division by the luminance controller 510, the white balance controller 520, and the dot correction controller 530. Perform PWM control on the data.

The output of the PWM counter 550 is applied to the LED dot matrix panel 100 through the second multiplexer 140, the output enable circuit 150 of FIG. 2, and the 16 dot x 3 color LED driver 160. Vertical line drive for is performed.

At the same time, the memory read address generator 430 generates a memory read address according to the 30-bit control data of the control memory. At this time, the memory read address is automatically generated in accordance with the control signal LOAD.

The memory read address is decoded by the display line address decoder 440 and applied to the LED dot matrix panel 100 through the second multiplexer 140 and the 16-line driving device 170 of FIG. Horizontal line drive is executed.

In FIG. 5, the watchdog timer 460 is for turning off the output of the driving device when a basic clock and other important signals for operating the PWM counter 550 are not input.

Next, the duty ratio variable function in the first and second video modes will be described with reference to FIG. 6.

The number of driving control devices is determined according to the duty ratio. When the duty ratio is 1/16 in a 16x16 dot matrix, one driving control device scans the horizontal line. When the duty ratio is 1/8, two driving is performed. The control device is applied, i.e., if the duty ratio is 1/8, one drive control device is responsible for displaying the upper 8 lines, and the other displays the lower 8 lines. Similarly, when the duty ratio is 1/4, four driving control devices are applied to display four lines each. When 16 drive control devices are applied and display one line each, the drive control device operates in the same manner as the static drive.

In the case of the first and second video modes, as shown in FIG. 6, the duty mask data (here, 4 bits) of the POSITION0 to POSITION3 signals and the control data are stored in the memory read address generator 430. The read address for each drive control device is determined in accordance with the input. The determined address is input to the display line address decoder 440 and decoded to drive a corresponding line of the panel 100.

As described above, the read line corresponding to each driving control device is automatically determined by using the duty mask data of the POSITION0 to POSITION3 signals and the control data, thereby driving the horizontal line of the panel according to the duty ratio. Therefore, the duty ratio can be freely changed in one chip.

Next, the overall operation of the first video mode will be described.

First, signals for determining an operation mode of the driving control apparatus are input to the external input mode selector 120, input data is stored in the shift register 410, and various control signals are input to the control signal buffer 110. Then, control data is input to the control data memory 490 to set a control method and the like.

That is, various operations for driving are selected and set by the signal input to the external input mode selector 120 and the control data input to the control data memory 490.

Next, the PWM clock is appropriately divided using the gradation clock, brightness, white balance, and dot correction data. This feature can be omitted as needed.

Next, image data is input, and luminance and white balance data, dot correction data, and image data are stored in each memory by a LATCH signal, and the stored data is driven vertical lines to the LED dot matrix panel 100 by a LOAD signal. Run At the same time, horizontal line driving is also performed by the display line address decoder 440 to operate an LED of the panel 100 to display an image.

Next, the second video mode will be described.

The second video mode is identical in configuration and operation to the first video mode except that a PWM amplitude controller 560 is further included in the first video mode.

The PWM amplitude controller 560 uses 10-bit input data stored in the video data memory 470 to separate 8-bit image data and 2-bit luminance data and input the same to the PWM counter 550. That is, the upper two bits of MSB are used to express the difference in brightness. Therefore, the lower image signal shows the same value as the data value, but the 256 or more image signal is displayed with more emphasis on the brightness. In other words, by using the PWM amplitude controller 560 in the second video mode, luminance correction can be simplified with only 10-bit image data, which is gamma correction generally used in image processing.

As described above, the LED driving control apparatus according to the embodiment of the present invention may selectively apply the dynamic mode, the memory mode, and the first and second video modes.

The LED drive control device according to the present invention described above is preferably made of an ASIC. As described above, the LED driving control apparatus of the present invention made of an ASIC can be easily mounted on an LED display module, which is a basic unit of an electronic display, and can provide a standardized control method to an LED display for displaying an image.

As described above, the LED drive control device of the present invention includes all of the functions of the dynamic, memory, first and second video modes. Therefore, all four driving schemes may be applied to one printed circuit board.

In addition, the LED drive control apparatus of the present invention can be selected and driven to vary the duty ratio. In other words, even if the duty ratio is changed from 1/16 to 1/1 in the electronic board system, the control method is the same, so if you design a controller to control the 1/16 duty ratio, 1/2, 1/4, 1/8 The duty ratio of 1/16 can also be controlled. Therefore, it is possible to reduce the design and manufacturing cost of the signboard system.

In addition, since the LED drive control device of the present invention can operate in various drive modes, it is possible to reduce the load generated by directly controlling the drive control device in the main controller of a display system such as an electronic display system.

Although the present invention has been described with reference to the above-described preferred embodiments and the accompanying drawings, different embodiments may be constructed within the spirit and scope of the invention. Accordingly, the scope of the invention is defined by the appended claims, and should be construed as not limited by the specific embodiments described herein.

1 is a block diagram showing an example of a conventional LED driving control circuit.

Figure 2 is a block diagram showing a light emitting diode driving control apparatus according to an embodiment of the present invention.

3 is a block diagram illustrating a dynamic mode in the LED driving control apparatus according to the embodiment of the present invention;

4 is a block diagram showing a memory mode in the LED driving control apparatus according to the embodiment of the present invention;

5 is a block diagram showing a video mode in the LED driving control apparatus according to the embodiment of the present invention;

FIG. 6 is a partial block diagram of FIG. 5 for explaining the duty ratio variable function in video mode. FIG.

Claims (5)

A light emitting diode driving control apparatus for displaying an image on a light emitting diode dot matrix panel, A control signal buffer for receiving and storing control signals for controlling an operation of the driving control device; A dynamic mode unit having a shift register for receiving input data from an external device and applying the data stored in the shift register to the panel in a dynamic driving method; A memory mode unit having a shift register for receiving and storing input data from an external device and an internal memory for receiving and storing data stored in the shift register, and for driving the panel with an output signal of the internal memory; A shift register for receiving and storing input data from an external source, a video data memory for storing image data, a control data memory for storing control data for controlling the operation of the driving control apparatus, and a pulse for the image data of the video data memory A video mode unit having a PWM counter for executing width modulation control and for driving the panel with an output signal of the PWM counter; A multiplexer which selects one of an output signal of the dynamic mode unit, a memory mode unit, and a video mode unit and applies it to the panel; And an external input mode selector which receives a signal from an external device and selects and operates one of the dynamic mode, the memory mode, and the video mode. The method of claim 1, The video mode unit is divided into a first video mode unit and a second video mode unit according to whether a PWM amplitude controller for separating data stored in the video data memory into image data and luminance data and inputting the same to the PWM counter. Light emitting diode drive control apparatus. The method of claim 2, wherein the video mode unit A correction data memory for receiving and storing data for color correction for each dot of the panel from the shift register; A brightness and white balance memory for receiving and storing data for adjusting brightness and white balance of the light emitting diode of the panel from the shift register according to a control signal stored in the control signal buffer; A luminance controller which receives data stored in the luminance and white balance memory, divides the clock of the PWM counter, and adjusts the luminance of the light emitting diode of the dot matrix panel; A white balance controller which receives data stored in the brightness and white balance memory, divides the clock of the PWM counter, and adjusts the white balance of the light emitting diode of the panel; And a dot correction controller which receives data stored in the correction data memory, divides the clock of the PWM counter, and corrects the color of each dot of the panel. The method of claim 2, wherein the video mode unit And a read address corresponding to a duty ratio to be driven by receiving input data of the external input mode selector and control data input to the control data memory. An LED display module for an electronic board comprising the LED driving control device according to any one of claims 1 to 4.