KR100520375B1 - Liquid crystal display - Google Patents
Liquid crystal display Download PDFInfo
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- KR100520375B1 KR100520375B1 KR1019980024225A KR19980024225A KR100520375B1 KR 100520375 B1 KR100520375 B1 KR 100520375B1 KR 1019980024225 A KR1019980024225 A KR 1019980024225A KR 19980024225 A KR19980024225 A KR 19980024225A KR 100520375 B1 KR100520375 B1 KR 100520375B1
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136259—Repairing; Defects
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1343—Electrodes
- G02F1/134309—Electrodes characterised by their geometrical arrangement
- G02F1/134336—Matrix
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136227—Through-hole connection of the pixel electrode to the active element through an insulation layer
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
Abstract
본 발명은 스토리지전극과 데이터버스라인간의 쇼트 발생시 용이하게 리페어 할 수 있도록 한 액정표시장치를 개시한다. 개시된 본 발명의 액정표시장치는, 기판; 상기 기판 상에 게이트절연막의 개재하에 교차 배열되어 단위 화소 공간을 한정하는 다수개의 게이트버스라인과 데이터버스라인; 상기 게이트버스라인과 데이터버스라인의 교차부에 배치된 박막트랜지스터; 상기 단위 화소 공간 내에 박막트랜지스터와 콘택하도록 배치된 화소전극; 및 상기 기판 상의 게이트버스라인들 사이에 배치되며, 상기 게이트버스라인과 평행하면서 서로 이격해서 배치된 한 쌍의 제1전극부와 상기 단위 화소 공간 내에서 이격 배치된 제1전극부들간을 상호 연결하도록 배치된 적어도 하나 이상의 제2전극부로 구성되는 스토리지전극;을 포함하는 것을 특징으로 한다.The present invention discloses a liquid crystal display device capable of easily repairing a short circuit between a storage electrode and a data bus line. The disclosed liquid crystal display device includes a substrate; A plurality of gate bus lines and data bus lines arranged on the substrate to intersect with a gate insulating film to define a unit pixel space; A thin film transistor disposed at an intersection of the gate bus line and the data bus line; A pixel electrode disposed in contact with the thin film transistor in the unit pixel space; And a pair of first electrode portions disposed between the gate bus lines on the substrate and spaced apart from each other in parallel with the gate bus lines and the first electrode portions spaced apart from each other in the unit pixel space. And a storage electrode composed of at least one second electrode portion arranged to be disposed.
Description
본 발명은 액정표시장치에 관한 것으로, 보다 구체적으로는, 스토리지전극과 데이터버스라인간의 쇼트 발생시 용이하게 리페어 할 수 있도록 한 액정표시장치의 스토리지전극구조에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device, and more particularly, to a storage electrode structure of a liquid crystal display device which can be easily repaired when a short occurs between the storage electrode and the data bus line.
일반적으로 스토리지전극은 게이트버스라인의 비선택 기간시, 일정 기간(1 프레임)동안 액정분자들이 전계의 영향을 받도록 역할을 한다. 더불어, 게이트버스라인이 선택에서 비선택되었을때, 즉, 전압 강하의 순간에도, 셀에 직접적으로 영향을 미치지 않도록 하는 완충 역할을 한다.In general, the storage electrode plays a role in which the liquid crystal molecules are affected by an electric field for a predetermined period (one frame) during the non-selection period of the gate bus line. In addition, it serves as a buffer so that when the gate busline is unselected in selection, i.e., even at the moment of voltage drop, it does not directly affect the cell.
도 1은 종래 액정표시장치의 하부기판의 평면도이다.1 is a plan view of a lower substrate of a conventional liquid crystal display device.
도시된 바와 같이, 기판(10) 상에 게이트버스라인(1)과 데이터버스라인(3)이 교차 배열되어 사각의 단위 화소 공간이 한정된다. 상기 게이트버스라인(1)과 데이터버스라인(3)의 교차점 부근에는 박막트랜지스터(TFT1)가 배치되고, 단위 화소 공간에는 상기 박막트랜지스터(TFT1)와 콘택되게 화소전극(5)이 배치된다. As illustrated, the gate bus line 1 and the data bus line 3 are arranged on the substrate 10 to define a rectangular unit pixel space. The thin film transistor TFT1 is disposed near the intersection point of the gate bus line 1 and the data bus line 3, and the pixel electrode 5 is disposed in contact with the thin film transistor TFT1 in a unit pixel space.
또한, 기판(10) 상에는 화소전극(5)과 오버랩되게 스토리지전극(7)이 형성된다. 상기 스토리지전극(7)은 인접 게이트버스라인들(1) 사이에 상기 게이트버스라인(1)과 평행하게 단일선으로 배치된다. In addition, the storage electrode 7 is formed on the substrate 10 to overlap the pixel electrode 5. The storage electrode 7 is disposed between the adjacent gate bus lines 1 in a single line in parallel with the gate bus line 1.
그러나, 상기와 같은 종래 액정표시장치의 스토리지전극은 하나의 로우(row)당 단일선으로 형성됨에 따라 다음과 같은 문제점이 발생된다.However, as the storage electrodes of the conventional liquid crystal display device are formed in a single line per one row, the following problems occur.
도 1에 도시된 바와 같이, 스토리지전극(7)과 데이터버스라인(3)이 교차되는 부분(x로 표시됨)에는 공정중 잔재로 인하여 쇼트가 발생되기 쉽다.As shown in FIG. 1, shorts are likely to occur due to residues in the process at portions where the storage electrodes 7 and the data bus lines 3 cross (marked with x).
이와같이, 교차 부분(x)에 쇼트가 발생되면, 신호 왜곡이 발생되므로, 스토리지전극(7)의 소정 부분을 커팅시켜줘야 한다. As such, when a short occurs in the intersection part x, signal distortion occurs, and thus, a predetermined part of the storage electrode 7 needs to be cut.
그러나, 단일선으로 된 스토리지전극(7)을 소정 부분 커팅시키게 되면, 스토리지전극(7)이 오픈되고, 이 경우, 리페어가 불가능하다.However, when the storage electrode 7 formed of a single line is cut at a predetermined portion, the storage electrode 7 is opened, and in this case, repair is impossible.
따라서, 본 발명은 상기와 같은 종래의 문제점을 해결하기 위해 안출된 것으로서, 스토리지전극과 데이터버스라인간 쇼트가 발생되더러라도 용이하게 리페어 할 수 있도록 한 액정표시장치를 제공함에 그 목적이 있다.Accordingly, an object of the present invention is to provide a liquid crystal display device which can be easily repaired even if a short between a storage electrode and a data bus line occurs.
상기와 같은 목적을 달성하기 위하여, 본 발명은, 기판; 상기 기판 상에 게이트절연막의 개재하에 교차 배열되어 단위 화소 공간을 한정하는 다수개의 게이트버스라인과 데이터버스라인; 상기 게이트버스라인과 데이터버스라인의 교차부에 배치된 박막트랜지스터; 상기 단위 화소 공간 내에 박막트랜지스터와 콘택하도록 배치된 화소전극; 및 상기 기판 상의 게이트버스라인들 사이에 배치되며, 상기 게이트버스라인과 평행하면서 서로 이격해서 배치된 한 쌍의 제1전극부와 상기 단위 화소 공간 내에서 이격 배치된 제1전극부들간을 상호 연결하도록 배치된 적어도 하나 이상의 제2전극부로 구성되는 스토리지전극;을 포함하는 액정표시장치를 제공한다.In order to achieve the above object, the present invention, a substrate; A plurality of gate bus lines and data bus lines arranged on the substrate to intersect with a gate insulating film to define a unit pixel space; A thin film transistor disposed at an intersection of the gate bus line and the data bus line; A pixel electrode disposed in contact with the thin film transistor in the unit pixel space; And a pair of first electrode portions disposed between the gate bus lines on the substrate and spaced apart from each other in parallel with the gate bus lines and the first electrode portions spaced apart from each other in the unit pixel space. It provides a liquid crystal display comprising a; storage electrode consisting of at least one second electrode portion arranged to.
본 발명에 의하면, 스토리지전극을 소정의 연결부위를 갖는 이중선으로 형성함에 따라, 데이터버스라인과 스토리지전극의 교차 부분 중 어느 한 부분에 쇼트가 발생되면 쇼트가 발생된 부분을 커팅하고, 나머지 부분을 통하여 공통 신호가 전달되도록 할 수 있으며, 따라서, 스토리지전극과 데이터버스라인간의 쇼트를 용이하게 리페어 할 수 있다.According to the present invention, when the storage electrode is formed as a double line having a predetermined connection portion, if a short occurs at any one of the intersections of the data bus line and the storage electrode, the shorted portion is cut and the remaining portion is cut. Through the common signal can be transmitted, it is possible to easily repair the short between the storage electrode and the data bus line.
(실시예)(Example)
이하, 첨부한 도면에 의거하여 본 발명의 바람직한 실시예를 자세히 설명하도록 한다.Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.
도 2는 본 발명에 따른 액정표시장치의 하부기판의 평면도이다.2 is a plan view of a lower substrate of the liquid crystal display according to the present invention.
도시된 바와 같이, 기판(20) 상에 수개의 게이트버스라인(11)과 데이터버스라인(13)이 교차 배열되어 사각의 단위 화소 공간이 한정된다. 이때, 상기 게이트버스라인(11)과 데이터버스라인(13)은 그들 사이에 게이트절연막이 개재되어 서로를 절연된다.As illustrated, several gate bus lines 11 and data bus lines 13 are alternately arranged on the substrate 20 to define a rectangular unit pixel space. At this time, the gate bus line 11 and the data bus line 13 are insulated from each other with a gate insulating film interposed therebetween.
상기 게이트버스라인(11)과 데이터버스라인(13)의 교차점 부근에는 채널층을 포함하는 박막트랜지스터(TFT2)가 배치된다. A thin film transistor TFT2 including a channel layer is disposed near an intersection point of the gate bus line 11 and the data bus line 13.
각각의 단위 화소 공간에는 박막트랜지스터(TFT2)와 콘택되도록 화소전극(15)이 배치된다. 이때, 상기 화소전극(15)은 단위 화소를 구성하는 게이트버스라인(11) 및 데이터버스라인(13)과 소정 거리만큼 이격되어 있다. The pixel electrode 15 is disposed in each unit pixel space to contact the thin film transistor TFT2. In this case, the pixel electrode 15 is spaced apart from the gate bus line 11 and the data bus line 13 constituting the unit pixel by a predetermined distance.
상기 기판(20) 상의 인접 게이트버스라인들(11) 사이에 화소전극(15)과 오버랩되게 스토리지전극(17)이 배치된다. 이때, 상기 스토리지전극(17)은 인접 게이트버스라인들(11) 사이에 상기 게이트버스라인(11)과 평행하면서 서로 이격해서 배치되는 한 쌍의 제1전극부(17a)와 상기 제1전극부들(17a)간을 상호 연결하도록 배치된 제2전극부(17b)를 포함한다. 여기서, 상기 제1전극부들(17a)은 소정 간격, 즉, 인접 게이트버스라인들(11)간의 간격보다는 가까운 거리로 이격 배치되며, 상기 제2전극부(17b)는 단위 화소 공간 내에서 데이터버스라인(13)과 평행하게 배치되고, 그리고, 하나의 단위 셀당, 즉, 하나의 단위 화소 공간당 적어도 하나 이상이 구비된다. The storage electrode 17 is disposed to overlap the pixel electrode 15 between adjacent gate bus lines 11 on the substrate 20. In this case, the storage electrode 17 is a pair of the first electrode portion 17a and the first electrode portion disposed in parallel with the gate bus line 11 and spaced apart from each other between adjacent gate bus lines 11. And a second electrode portion 17b which is arranged to interconnect each other. Here, the first electrode portions 17a are spaced apart from each other at a predetermined distance, that is, at a distance closer to each other than the distance between adjacent gate bus lines 11, and the second electrode portions 17b are disposed in a data bus in a unit pixel space. It is arranged in parallel with the line 13, and at least one or more per one unit cell, that is, one unit pixel space is provided.
이와같은 구조를 갖는 본 발명에 따른 액정표시장치에서의 스토리지전극(17)은 그의 제1전극부들(17a) 중에서 어느 한 부분과 데이터버스라인(13)이 교차되는 부분(y로 표시됨)에 쇼트가 발생되면, 쇼트가 발생된 부분(y) 주변의 제1전극부(17a)를 레이져로 커팅한다. The storage electrode 17 of the liquid crystal display according to the present invention having such a structure is shorted to a portion (denoted by y) in which any portion of the first electrode portions 17a and the data bus line 13 cross each other. Is generated, the first electrode part 17a around the shorted portion y is cut with a laser.
이 경우, 쇼트된 제1전극부(17a) 부분이 커팅되더라도, 나머지 하나의 제1전극부(17a) 및 제2전극부(17b)통하여, 쇼트된 부분(y)을 제외한 다른 부분에 지속적으로 공통 신호를 전달할 수 있다.In this case, even if the shorted portion of the first electrode portion 17a is cut, the remaining portion of the first electrode portion 17a and the second electrode portion 17b are continuously continually other than the shorted portion y. It can carry a common signal.
이상에서 자세히 설명한 바와 같이, 본 발명은 스토리지전극을 소정의 연결부위를 갖는 이중선으로 형성함으로써 데이터버스라인과 스토리지전극의 교차 부분 중 어느 한 부분에 쇼트가 발생되면 쇼트가 발생된 부분을 커팅하고, 나머지 부분을 통하여 공통 신호가 전달되도록 할 수 있으므로, 스토리지전극과 데이터버스라인간의 쇼트시 용이하게 리페어 할 수 있다.As described above in detail, the present invention forms a storage electrode as a double line having a predetermined connection portion, and when a short occurs at any one of the intersections of the data bus line and the storage electrode, the shorted portion is cut. Since the common signal can be transmitted through the remaining part, the short circuit between the storage electrode and the data bus line can be easily repaired.
기타, 본 발명은 그 요지를 일탈하지 않는 범위에서 다양하게 변경하여 실시할 수 있다. In addition, this invention can be implemented in various changes within the range which does not deviate from the summary.
도 1은 종래 액정표시장치의 하부기판의 평면도.1 is a plan view of a lower substrate of a conventional liquid crystal display device.
도 2는 본 발명에 따른 액정표시장치의 하부기판의 평면도.2 is a plan view of a lower substrate of the liquid crystal display according to the present invention;
(도면의 주요 부분에 대한 부호의 설명)(Explanation of symbols for the main parts of the drawing)
11 : 게이트버스라인 13 : 데이터버스라인 11: gate bus line 13: data bus line
15 : 화소전극 17 : 스토리지전극15: pixel electrode 17: storage electrode
17a : 제1전극부 17bc : 제2전극부 17a: first electrode portion 17bc: second electrode portion
Claims (2)
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019980024225A KR100520375B1 (en) | 1998-06-25 | 1998-06-25 | Liquid crystal display |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019980024225A KR100520375B1 (en) | 1998-06-25 | 1998-06-25 | Liquid crystal display |
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| KR100520375B1 true KR100520375B1 (en) | 2006-01-12 |
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| KR100940574B1 (en) * | 2003-05-15 | 2010-02-03 | 삼성전자주식회사 | Thin film transistor array panel and liquid crystal display including the same |
| JP2007286785A (en) | 2006-04-14 | 2007-11-01 | Fujitsu Ltd | Electronic device and cooling part |
| KR20200113080A (en) | 2019-03-21 | 2020-10-06 | 삼성디스플레이 주식회사 | Display device and reparing method therof |
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