KR100508940B1 - Method and apparatus for driving plasma display panel - Google Patents
Method and apparatus for driving plasma display panel Download PDFInfo
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- KR100508940B1 KR100508940B1 KR10-2003-0057688A KR20030057688A KR100508940B1 KR 100508940 B1 KR100508940 B1 KR 100508940B1 KR 20030057688 A KR20030057688 A KR 20030057688A KR 100508940 B1 KR100508940 B1 KR 100508940B1
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/28—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels
- G09G3/288—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels
- G09G3/291—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels controlling the gas discharge to control a cell condition, e.g. by means of specific pulse shapes
- G09G3/294—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels controlling the gas discharge to control a cell condition, e.g. by means of specific pulse shapes for lighting or sustain discharge
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/2007—Display of intermediate tones
- G09G3/2018—Display of intermediate tones by time modulation using two or more time intervals
- G09G3/2022—Display of intermediate tones by time modulation using two or more time intervals using sub-frames
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/28—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels
- G09G3/288—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels
- G09G3/291—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels controlling the gas discharge to control a cell condition, e.g. by means of specific pulse shapes
- G09G3/293—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels controlling the gas discharge to control a cell condition, e.g. by means of specific pulse shapes for address discharge
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/28—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels
- G09G3/288—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels
- G09G3/296—Driving circuits for producing the waveforms applied to the driving electrodes
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/02—Improving the quality of display appearance
- G09G2320/0271—Adjustment of the gradation levels within the range of the gradation scale, e.g. by redistribution or clipping
Abstract
본 발명은 소거 펄스를 이용하여 고품위 저계조 표현이 가능한 플라즈마 디스플레이 패널의 구동 방법 및 장치에 관한 것이다. 본 발명의 일실시예에 따른 플라즈마 디스플레이 패널의 구동 방법은 제1 기판상에 각각 나란히 형성되는 제1 전극 및 제2 전극과, 제1 전극 및 제2 전극에 교차하며 제2 기판상에 형성되는 어드레스 전극을 포함하는 플라즈마 디스플레이 패널을 구동하는 방법으로서, 유지 구간 동안, 제1 전극에 제1 전압 펄스를 인가하는 단계; 제1 전압 펄스에 의하여 방전이 발생된 후, 어드레스 전극에 제2 전압 펄스를 인가하는 단계; 및 제1 전극 및 제2 전극에 제3 전압 펄스를 교대로 인가하는 단계를 포함한다. 이러한 구동 방법으로, 복수개의 유지 방전을 갖는 서브필드를 유지 방전이 한 개인 서브필드로 변환시켜 사용할 수 있고, 플라즈마 디스플레이 패널의 고품위 저계조 표현이 가능해진다.The present invention relates to a method and apparatus for driving a plasma display panel capable of high quality low gradation representation using an erase pulse. In the method of driving a plasma display panel according to an embodiment of the present invention, a first electrode and a second electrode are formed on a first substrate, and are formed on a second substrate to intersect the first electrode and the second electrode. A method of driving a plasma display panel including an address electrode, comprising: applying a first voltage pulse to a first electrode during a sustain period; After the discharge is generated by the first voltage pulse, applying a second voltage pulse to the address electrode; And alternately applying a third voltage pulse to the first electrode and the second electrode. In this driving method, a subfield having a plurality of sustain discharges can be converted into a subfield having a single sustain discharge, and high quality low gradation representation of the plasma display panel can be achieved.
Description
본 발명은 플라즈마 디스플레이 패널(plasma display panel, PDP)을 구동하기 위한 방법 및 장치에 관한 것으로서, 더욱 상세하게는 소거 펄스(erase pulse)를 이용하여 고품위 저계조 표현이 가능한 플라즈마 디스플레이 패널의 구동 방법 및 장치에 관한 것이다. The present invention relates to a method and apparatus for driving a plasma display panel (PDP), and more particularly, to a method of driving a plasma display panel capable of high quality low gray level expression using an erase pulse, and Relates to a device.
플라즈마 디스플레이 패널은 기체 방전에 의해 생성된 플라즈마를 이용하여 문자 또는 영상을 표시하는 평면 표시 장치로서, 그 크기에 따라 수십에서 수백 만개 이상의 화소가 매트릭스 형태로 배열되어 있다. 이러한 플라즈마 디스플레이 패널은 인가되는 구동 전압 파형의 형태와 방전 셀의 구조에 따라 직류형(DC형)과 교류형(AC형)으로 구분된다.A plasma display panel is a flat panel display device that displays characters or images using plasma generated by gas discharge, and tens to millions or more of pixels are arranged in a matrix form according to their size. The plasma display panel is classified into a direct current type (DC type) and an alternating current type (AC type) according to the shape of the driving voltage waveform applied and the structure of the discharge cell.
도 1은 교류형 플라즈마 디스플레이 패널의 일부 사시도이다. 1 is a partial perspective view of an AC plasma display panel.
도 1에 도시한 바와 같이, 제1 유리 기판(1) 상에는 유전체층(2) 및 보호막(3)으로 덮인 주사 전극(4)과 유지 전극(5)이 쌍을 이루어 평행하게 형성된다. 제2 유리 기판(6) 위에는 절연체층(7)으로 덮인 복수의 어드레스 전극(8)이 설치된다. 어드레스 전극(8)들 사이에 있는 절연체층(7) 위에는 어드레스 전극(8)과 평행하게 격벽(9)이 형성되어 있다. 또한, 절연체층(7)의 표면 및 격벽(9)의 양측면에 형광체(10)가 형성되어 있다. 제1 유리 기판(1)과 제2 유리 기판(6)은 주사 전극(4)과 어드레스 전극(8) 및 유지 전극(5)과 어드레스 전극(8)이 직교하도록 방전 공간(11)을 사이에 두고 대향하여 배치되어 있다. 어드레스 전극(8)과, 쌍을 이루는 주사 전극(4)과 유지 전극(5)과의 교차부에 있는 방전 공간이 방전셀(12)을 형성한다.As shown in FIG. 1, the scan electrode 4 and the sustain electrode 5 covered with the dielectric layer 2 and the protective film 3 are formed in parallel on the first glass substrate 1. A plurality of address electrodes 8 covered with the insulator layer 7 are provided on the second glass substrate 6. The partition 9 is formed on the insulator layer 7 between the address electrodes 8 in parallel with the address electrode 8. In addition, the phosphor 10 is formed on the surface of the insulator layer 7 and on both side surfaces of the partition wall 9. The first glass substrate 1 and the second glass substrate 6 have a discharge space 11 therebetween so that the scan electrode 4 and the address electrode 8 and the sustain electrode 5 and the address electrode 8 are orthogonal to each other. They are arranged to face each other. The discharge space at the intersection of the address electrode 8 and the paired scan electrode 4 and the sustain electrode 5 forms a discharge cell 12.
도 2는 플라즈마 디스플레이 패널의 전극 배열도를 나타낸다. 2 shows an electrode arrangement diagram of the plasma display panel.
도 2에 도시한 바와 같이, PDP 전극은 m X n의 매트릭스 구성을 가지고 있으며, 구체적으로 열 방향으로는 어드레스 전극(A1~Am)이 배열되어 있고 행 방향으로는 n행의 주사 전극(Y1~Yn) 및 유지 전극(X1~Xn)이 지그재그로 배열되어 있다. 이하에서는 주사 전극을 "Y 전극", 유지 전극을 "X 전극"이라 칭한다. 도 2에 도시된 방전셀(12)은 도 1에 도시된 방전셀(12)에 대응한다.As shown in Fig. 2, the PDP electrode has a matrix configuration of m X n. Specifically, the address electrodes A1 to Am are arranged in the column direction, and the scan electrodes Y1 to n rows in the row direction. Yn) and sustain electrodes X1 to Xn are arranged in a zigzag. Hereinafter, the scan electrode is referred to as "Y electrode" and the sustain electrode as "X electrode". The discharge cell 12 shown in FIG. 2 corresponds to the discharge cell 12 shown in FIG.
도 3은 종래의 플라즈마 디스플레이 패널의 구동 파형을 도시한 것이다. 3 illustrates driving waveforms of a conventional plasma display panel.
도 3에 도시한 바와 같이, 종래의 PDP의 구동 방법에 따르면 각 서브필드는 리셋 구간, 어드레스 구간, 유지 구간으로 구성된다.As shown in FIG. 3, according to the conventional method of driving a PDP, each subfield includes a reset period, an address period, and a sustain period.
리셋 구간은 이전의 서스테인 방전에 의해 형성된 벽전하 상태를 소거하고, 다음의 어드레싱 동작이 원활히 수행되도록 하기 위해 각 셀의 상태를 초기화시키는 기간이다. 어드레스 구간은 패널에서 켜지는 셀과 켜지지 않는 셀을 선택하여 켜지는 셀(어드레싱된 셀)에 벽전하를 쌓아두는 동작을 수행하는 기간이다. 유지 구간은 어드레싱된 셀에 실제로 화상을 표시하기 위한 방전을 수행하는 기간으로, 유지 구간이 되면 X 전극과 Y 전극에 서스테인 펄스가 교대로 인가되어 서스테인 방전이 행하여져 영상이 표시된다. The reset period is a period of erasing the wall charge state formed by the previous sustain discharge and initializing the state of each cell so that the next addressing operation can be performed smoothly. The address period is a period in which a wall charge is accumulated in a cell (addressed cell) that is turned on by selecting a cell that is turned on and a cell that is not turned on in the panel. The sustain period is a period in which discharge for actually displaying an image is performed on the addressed cell. When the sustain period is reached, sustain pulses are alternately applied to the X electrode and the Y electrode to perform sustain discharge, thereby displaying an image.
즉, 종래의 플라즈마 디스플레이 패널의 유지 구간에서는 X 전극 및 Y 전극에 인가되는 펄스의 수만큼 방전이 이루어지기 때문에, 고품위의 저계조 표현을 하고자 하는 경우에는 서브필드의 개수를 증가시켜야 하는 문제가 있었다. 서브필드 개수의 증가는 유지 방전에 할당되는 시간을 감소시키고, 만족할 만한 개수의 유지 방전의 확보가 용이하지 않다는 단점이 있다. That is, since the discharge is generated by the number of pulses applied to the X electrode and the Y electrode in the sustaining period of the conventional plasma display panel, there is a problem in that the number of subfields must be increased in order to achieve high quality low gradation expression. . Increasing the number of subfields reduces the time allocated to sustain discharge and has a disadvantage in that it is not easy to secure a sufficient number of sustain discharges.
본 발명이 이루고자 하는 기술적 과제는 이와 같은 종래 기술의 문제점을 해결하기 위한 것으로서, 서브필드의 개수를 증가시키지 않고 고품위의 저계조 표현이 가능한 플라즈마 디스플레이 패널의 구동 방법 및 장치를 제공하기 위한 것이다.SUMMARY OF THE INVENTION The present invention has been made in an effort to solve the problems of the prior art, and to provide a method and apparatus for driving a plasma display panel capable of high quality low gray scale expression without increasing the number of subfields.
이와 같은 목적을 달성하기 위하여 본 발명의 하나의 특징에 따른 플라즈마 디스플레이 패널의 구동 방법은 제1 기판상에 각각 나란히 형성되는 제1 전극 및 제2 전극과, 상기 제1 전극 및 상기 제2 전극에 교차하며 제2 기판상에 형성되는 어드레스 전극을 포함하는 플라즈마 디스플레이 패널을 구동하는 방법으로서,In order to achieve the above object, a driving method of a plasma display panel according to an aspect of the present invention includes a first electrode and a second electrode formed side by side on a first substrate, and the first electrode and the second electrode. A method of driving a plasma display panel including an address electrode that crosses and is formed on a second substrate, the method comprising:
유지 구간 동안,During the maintenance interval,
(a) 상기 제1 전극에 제1 전압 펄스를 인가하는 단계;(a) applying a first voltage pulse to the first electrode;
(b) 상기 제1 전압 펄스에 의하여 방전이 발생된 후, 상기 어드레스 전극에 제2 전압 펄스를 인가하는 단계; 및(b) applying a second voltage pulse to the address electrode after discharge is generated by the first voltage pulse; And
(c) 상기 제1 전극 및 상기 제2 전극에 제3 전압 펄스를 교대로 인가하는 단계를 포함한다.(c) alternately applying a third voltage pulse to the first electrode and the second electrode.
한편, 본 발명의 다른 특징에 따른 플라즈마 디스플레이 패널의 구동 방법은 제1 기판상에 각각 나란히 형성되는 제1 전극 및 제2 전극과, 상기 제1 전극 및 상기 제2 전극에 교차하며 제2 기판상에 형성되는 어드레스 전극을 포함하는 플라즈마 디스플레이 패널을 구동하는 방법으로서,On the other hand, the driving method of the plasma display panel according to another aspect of the present invention is a first electrode and a second electrode formed on the first substrate side by side, and intersecting the first electrode and the second electrode on the second substrate A method of driving a plasma display panel including an address electrode formed at
유지 구간 동안,During the maintenance interval,
(a) 상기 제1 전극에 제1 전압 펄스를 인가하는 단계;(a) applying a first voltage pulse to the first electrode;
(b) 상기 제1 전압 펄스에 의하여 방전이 발생된 후, 상기 제1 전극에 제2 전압 펄스를 인가하고, 상기 어드레스 전극에 제3 전압 펄스를 인가하는 단계; 및(b) after the discharge is generated by the first voltage pulse, applying a second voltage pulse to the first electrode and applying a third voltage pulse to the address electrode; And
(c) 상기 제1 전극 및 상기 제2 전극에 제4 전압 펄스를 교대로 인가하는 단계를 포함한다.(c) alternately applying a fourth voltage pulse to the first electrode and the second electrode.
한편, 본 발명의 하나의 특징에 따른 플라즈마 디스플레이 패널은 On the other hand, the plasma display panel according to an aspect of the present invention
제1 및 제2 기판;First and second substrates;
상기 제1 기판에 나란히 형성되는 제1 전극 및 제2 전극;First and second electrodes formed side by side on the first substrate;
상기 제2 기판에 형성되는 어드레스 전극; 및An address electrode formed on the second substrate; And
리셋 구간, 어드레스 구간, 유지 구간 동안에 상기 제1 전극, 상기 제2 전극, 및 상기 어드레스 전극에 구동 신호를 전송하는 구동 회로를 포함하고,A driving circuit for transmitting a driving signal to the first electrode, the second electrode, and the address electrode during a reset period, an address period, and a sustain period;
유지 구간 동안, 상기 구동 회로는During the sustain period, the drive circuit
상기 제1 전극에 제1 전압 펄스를 인가하는 하고,Applying a first voltage pulse to the first electrode,
상기 제1 전압 펄스에 의하여 방전이 발생된 후, 상기 어드레스 전극에 제2 전압 펄스를 인가하며,After the discharge is generated by the first voltage pulse, a second voltage pulse is applied to the address electrode,
상기 제1 전극 및 상기 제2 전극에 제3 전압 펄스를 교대로 인가한다. A third voltage pulse is alternately applied to the first electrode and the second electrode.
이와 같은 목적을 달성하기 위한 본 발명의 구동 파형은 이하에서 설명하는 바와 같이, 어드레스 전극과 X 전극, X 전극과 Y 전극 사이의 상대 전압차를 고려하여 파형을 설계한다. In order to achieve the above object, the driving waveform of the present invention designs the waveform in consideration of the relative voltage difference between the address electrode and the X electrode, and the X electrode and the Y electrode as described below.
고품위의 저계조를 표현하기 위해서는 유지 구간에서 발생되는 유지 방전의 개수가 1인 서브필드의 개수가 많은 것이 바람직하다.In order to express high quality low gradation, it is preferable that the number of subfields having a number of sustain discharges generated in the sustain period is large.
그러나, 종래의 구동 파형에서는, 상술한 바와 같이, 유지 구간 동안 여러 번의 유지 방전의 일어나고, 이로 인하여 플라즈마 디스플레이 패널의 고품위 저계조 표현에 한계가 있었다.However, in the conventional drive waveforms, as described above, several sustain discharges occur during the sustain period, and thus there is a limit to the high quality low gradation representation of the plasma display panel.
본 발명은 이러한 점에 착안한 것으로서, 복수개의 유지 방전으로 이루어진 서브필드를 1개의 유지 방전으로 이루어진 서브필드로 변환시킴으로써, 고품위의 저계조 표현이 가능하도록 하였다.The present invention has been made in view of this point, and by converting a subfield consisting of a plurality of sustain discharges into a subfield consisting of one sustain discharge, high quality low gradation expression is made possible.
이하에서는 이러한 본 발명의 개념이 최적으로 적용된 실시예에 대하여 도면을 참조하여 상세히 설명한다.Hereinafter, exemplary embodiments to which the concept of the present invention is optimally applied will be described in detail with reference to the accompanying drawings.
도 4는 본 발명의 제1 실시예에 따른 플라즈마 디스플레이 패널의 구동 파형을 도시한 것이다.4 illustrates driving waveforms of the plasma display panel according to the first embodiment of the present invention.
도 4에 도시한 바와 같이, 본 발명의 제1 실시예에 따르면, 유지 구간에서 1회의 방전이 발생된 후 어드레스 전극에 소거 펄스를 인가하여, 그 이후의 서스테인 펄스에 의해서는 방전이 발생되지 않도록 한다. 따라서, 유지 구간에서 복수의 서스테인 펄스가 인가되는 서브필드도 유지 방전이 1개인 것처럼 사용할 수 있다.As shown in FIG. 4, according to the first embodiment of the present invention, an erase pulse is applied to the address electrode after one discharge is generated in the sustain period, so that the discharge is not generated by the sustain pulse thereafter. do. Therefore, the subfield to which the plurality of sustain pulses are applied in the sustain section can be used as if the sustain discharge is one.
보다 구체적으로는, 셀 내부에 벽전하가 쌓인 상태에서 Y 전극에 양의 서스테인 펄스를 인가하면, 유지 방전이 발생된다. 유지 방전이 발생된 a 시점에서는, Y 전극에는 (-) 전하가 쌓이고, X 전극에는 (+) 전하가 쌓인다. 이 때, X 전극 및 Y 전극에 인가되는 서스테인 펄스를 지연 시간 Δt 만큼 지연시키고, 어드레스 전극에 양의 소거 펄스를 인가하면, (-) 전하가 쌓여 있는 Y 전극과 어드레스 전극 간에 소거 방전이 발생된다. 이러한 소거 방전으로 인하여 방전 셀 내부의 벽전하는 제거되고, 소거 방전 이후의 서스테인 펄스는 방전을 수행하지 않게 된다. More specifically, sustain discharge is generated when a positive sustain pulse is applied to the Y electrode while wall charges are accumulated inside the cell. At the time point a when the sustain discharge was generated, negative charges accumulated on the Y electrode, and positive charges accumulated on the X electrode. At this time, if the sustain pulses applied to the X electrode and the Y electrode are delayed by the delay time Δt, and a positive erase pulse is applied to the address electrode, erase discharge is generated between the Y electrode and the address electrode where negative charges are accumulated. . Due to such erase discharge, the wall charges inside the discharge cells are removed, and the sustain pulse after the erase discharge does not perform discharge.
본 발명의 일실시예에 따르면, 어드레스 전극에 인가되는 소거 펄스의 폭은 방전 이후 공간 전하가 쌓이지 않도록 0.5~1.5μm 정도의 세폭으로 하는 것이 바람직하다. 또한 도 4에 도시한 바와 같이 유지 기간에서 어드레스 전극은 양의 소거 펄스를 인가하지 않은 기간에서는 기준 전압을 바이어스 한다.According to an embodiment of the present invention, the width of the erase pulse applied to the address electrode is preferably set to a width of about 0.5 to 1.5 μm so as not to accumulate space charge after discharge. In addition, as shown in FIG. 4, in the sustain period, the address electrode biases the reference voltage in the period in which the positive erase pulse is not applied.
도 4와 같은 구동 파형을 사용함으로써, 복수개의 유지 방전으로 이루어진 서브필드를 1개의 유지 방전과 1개의 어드레스 방전으로 이루어진 저계조용 서브필드로 변환시켜 사용할 수 있다. By using the driving waveform as shown in Fig. 4, the subfield composed of a plurality of sustain discharges can be converted into a low gradation subfield composed of one sustain discharge and one address discharge.
다만, 도 4에 도시된 바와 같이, 어드레스 전극에만 소거 펄스를 인가는 방법은 셀 내에 포함되는 방전 기체 중 Xe가 차지하는 비율이 높거나, 높은 가스 압력을 적용하는 등의 방전을 어렵게 하는 설계 또는 재료적인 항목이 있는 경우, 안정적인 소거 작용을 수행하기 어려운 문제가 있다.However, as shown in FIG. 4, a method of applying an erase pulse only to an address electrode is a design or material that makes it difficult to discharge, such as a high proportion of Xe of discharge gas included in a cell, or a high gas pressure. If there is an item, it is difficult to perform a stable erasing action.
도 5에 도시한 본 발명의 제2 실시예에 따른 구동 파형은 이와 같은 본 발명의 제1 실시예에 따른 구동 파형의 단점을 해결하기 위한 것이다.The driving waveform according to the second embodiment of the present invention shown in FIG. 5 is to solve the disadvantage of the driving waveform according to the first embodiment of the present invention.
본 발명의 제2 실시예에서는, 1회의 유지 방전이 발생된 후, Y 전극측에도 음의 전압이 인가되도록 하여 소거 방전이 안정적으로 발생할 수 있도록 한다. 이로써, Y 전극과 어드레스 전극 사이에는 제1 실시예에 비해 더 큰 전압이 인가되어, 소거 방전이 안정적으로 일어나게 된다.In the second embodiment of the present invention, after one sustain discharge is generated, a negative voltage is applied to the Y electrode side so that erase discharge can be stably generated. As a result, a larger voltage is applied between the Y electrode and the address electrode than in the first embodiment, so that the erase discharge is stably generated.
Y 전극에 인가되는 소거 펄스는 어드레스 기간 동안 Y 전극에 인가되는 스캔 전압을 그대로 사용할 수 있다. 또한, Y 전극에 인가되는 소거 펄스의 폭은 어드레스 전극에 인가되는 소거 펄스와 마찬가지로 0.5~1.5μm로 하는 것이 바람직하다.또한 도 5에 도시한 바와 같이 유지 기간에서 어드레스 전극은 양의 소거 펄스를 인가하지 않은 기간에서는 기준 전압을 바이어스 한다.The erase pulse applied to the Y electrode may use the scan voltage applied to the Y electrode as it is during the address period. In addition, it is preferable that the width of the erase pulse applied to the Y electrode is 0.5 to 1.5 占 퐉, similarly to the erase pulse applied to the address electrode. As shown in FIG. In the unapplied period, the reference voltage is biased.
본 발명에 의하면, 유지 방전의 개수가 1개가 아닌 서브필드를 유지 방전이 1개인 서브필드처럼 사용할 수 있기 때문에, 고품위의 저계조 표현이 가능해진다.According to the present invention, since the subfields not having the number of sustain discharges can be used like the subfields with one sustain discharge, high-quality low gradation can be expressed.
또한, 서브필드의 개수를 증가시키지 않고 고품위의 저계조 표현이 가능하다는 장점이 있다.In addition, there is an advantage that high quality low gradation can be expressed without increasing the number of subfields.
도 1은 교류형 플라즈마 디스플레이 패널의 일부 사시도.1 is a partial perspective view of an AC plasma display panel.
도 2는 플라즈마 디스플레이 패널이 전극 배열도.2 is an arrangement of electrodes of a plasma display panel;
도 3은 종래의 플라즈마 디스플레이 패널의 구동 파형도.3 is a drive waveform diagram of a conventional plasma display panel.
도 4는 본 발명의 제1 실시예에 따른 플라즈마 디스플레이 패널의 구동 파형도.4 is a driving waveform diagram of a plasma display panel according to a first embodiment of the present invention;
도 5는 본 발명의 제2 실시예에 따른 플라즈마 디스플레이 패널의 구동 파형도.5 is a driving waveform diagram of a plasma display panel according to a second embodiment of the present invention;
Claims (13)
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