KR100465512B1 - Gradation expanded display Device of an OELD panel using a clock modulation - Google Patents

Abstract

The present invention provides a more suitable screen representation by using an extended gradation representation method when expressing gradations of OELD, and at the same time, unlike the previous scheme of modulating data to minimize hardware cost increase, an organic implementation using clock modulation is realized. The present invention relates to an gradation extension display device of an electroluminescent display panel. To this end, the reference clock generator for generating and outputting a predetermined clock; An image signal input unit configured in parallel with the reference clock generator; An output generator for displaying a video signal on the organic light emitting display panel based on the reference clock input from the reference clock generator and the video signal input from the video signal input unit; And data modulation means provided in the reference clock generation section and modulating M bits generated in the reference clock generation section into N bits (N> M).

Description

Gradation expanded display device of an OELD panel using a clock modulation

The present invention relates to an extended gray scale display device for an organic light emitting display panel using clock modulation. More particularly, the present invention provides an appropriate screen representation by using an extended gray scale display method for gray scale expression of an organic light emitting display panel. The present invention relates to a gray scale display device of an organic light emitting display panel using clock modulation to minimize hardware cost increase.

In general, an organic electroluminescent display (OLED) panel uses two methods to express a screen. One is a pulse amplitude modulation (PAM) method for expressing the luminance according to the magnitude of the current, and the other is a pulse width modulation (PWM) method for displaying the luminance according to the time interval difference for passing the current. In general, OELD uses a PWM gray scale representation circuit because the PAM requires fine control of the voltage, but the effectiveness of the circuit implementation is complicated. On the other hand, PWM has a simpler circuit configuration than PAM because it uses time control.

Basically, the PWM gradation representation circuit expresses gradation by adjusting the time of supplying current by flowing and breaking the amount of current flowing based on this by using a constant bias. The basic configuration of the PWM circuit consists of a bias section, a PWM input section, an output generator, and a reference time generator.

1 is a block diagram of a conventional PWM circuit. As shown in FIG. 1, the image signal input unit includes a memory controller 10, a logic operation 12, a look-up table (LUT) map 14, and a data latch 16. The reference time generating unit for generating and outputting is composed of an oscillator 18 and a counter 20, and the output generating part is composed of a comparator 22 and a data driver 24. It will be omitted.

Looking at the configuration of each part, first, the video signal input unit stores the video signal data in the memory, and reads and outputs the frame data of the video signal according to a predetermined timing (10); A logic operation (12) for computing the data input from the memory controller (10); A LUT map 14 for modulating a clock of M bits into a clock of N bits; And a data latch 16 in which the operation result of the logic operation 12 is stored.

In particular, the reference time generation section for generating a predetermined clock is composed of an oscillator 18 for generating a predetermined clock and a counter 20 for counting and outputting the clock of the oscillator 18.

The output generator includes a comparator 22 for comparing the output of the counter 20 with data read from the data latch 16; And a data driver 24 for displaying the comparison result data of the comparator 22 as an image signal on the organic light emitting display panel.

The operation of the PWM circuit can be divided into a section in which an output is applied and a section in which an output is not applied. By using the PWM circuit as described above, it is possible to implement a more suitable screen by increasing the expressive power of the actual driver in order to consider the characteristics of the panel and the visual characteristics and to match them through data processing.

That is, in the PWM circuit, the more steps of expressing the gradation, the greater the ability of expressing luminance and more detailed screen realization is possible. However, considering the characteristics of the panel, even though there is a difference in the actual PWM circuit, it is not visually felt. This is a result of not considering the characteristics of the panel and the visual characteristics. In implementing the gradation to be expressed, the steps appropriate to the panel are used by increasing the gradation expression ability of the actual driver.

In particular, the LUT map 14 of FIG. 1 expresses an image from M bit to N bit by extending the actual image data. Where N> M. Therefore, when expressing an actual image, it is possible to express more detailed characteristics, which is suitable for a panel. However, there is a disadvantage in that the cost of hardware is increased because the hardware configuration is increased instead of the proper representation of the image.

In simple calculation, the number of image data increases from M bit to N bit, so the complexity of storage area, bus area, and wiring as much as (NM) * (number of output of data driver) The increase in the number of gray scales in the driver stage adds to the cost and increases the cost.

Accordingly, the present invention has been made to solve the above problems, and an object of the present invention is to enable a more suitable screen representation by using an expanded gradation representation method when expressing gradations of OELD, and at the same time increase the hardware cost. Unlike the previous method of modulating data to minimize, it is to provide a gray scale extended representation device of an organic light emitting display panel using clock modulation.

An object of the present invention as described above, the reference clock generator for generating and outputting a predetermined clock; An image signal input unit configured in parallel with the reference clock generator; An output generator for displaying a video signal on the organic light emitting display panel based on the reference clock input from the reference clock generator and the video signal input from the video signal input unit; And data modulation means provided in the reference clock generation unit and modulating M bits generated in the reference clock generation unit into N bits (N> M). It can be achieved by the gradation expansion representation of.

The reference clock generator and the data modulation means include: an oscillator 56 for generating a predetermined clock; A LUT map 58 for modulating a clock of M bits output from the oscillator 56 into a clock of N bits; And a counter 60 that counts and outputs the N-bit clock of the LUT map 58.

The video signal input unit may include a memory controller 50 for storing video signal data in a memory and reading and outputting frame data of the video signal at a predetermined timing; A logic operation 52 for calculating and processing data input from the memory controller 50; And a data latch 54 in which the operation result of the logic operation 52 is stored.

In addition, the output generator comprises: a comparator 62 for comparing the output of the counter 60 with the data read from the data latch 54; And a data driver 64 for displaying the comparison result data of the comparator 62 as an image signal on the organic light emitting display panel.

Other objects, specific advantages and novel features of the present invention will become more apparent from the following detailed description and the preferred embodiments associated with the accompanying drawings.

1 is a block diagram of a conventional PWM circuit,

2 is a block diagram of a PWM circuit for implementing a gray scale extended representation device of an organic light emitting display panel using a clock modulation according to the present invention;

3 is a waveform diagram illustrating a clock operation according to FIG. 2.

Explanation of symbols on the main parts of the drawings

10, 50: memory controller,

12, 52: logic operation,

14, 58: LUT map,

16, 54: data latch,

18, 56: oscillator,

20, 60: counter,

22, 62: comparator,

24, 64: data driver

Hereinafter, with reference to the accompanying drawings it will be described in detail for the configuration for the gray scale extended representation of the organic light emitting display panel using a clock modulation according to the present invention.

2 is a block diagram of a PWM circuit for implementing a gray scale extended representation device of an organic light emitting display panel using a clock modulation according to the present invention. As shown in FIG. 2, the basic configuration of the PWM circuit according to the present invention includes a bias unit, a PWM input unit, an output generator, and a reference time generator.

Here, the video signal input unit includes a memory controller 50, a logic operation 52, and a data latch 54. The reference time generation unit for generating and outputting a predetermined clock includes an oscillator 56 and a look-up. Table) is composed of a map 58 and a counter 60, the output generator is composed of a comparator 62 and a data driver 64, and the description thereof will be omitted because it is a known configuration in the bias.

Looking at the configuration of each part, first, the video signal input unit stores the video signal data in the memory, and reads and outputs the frame data of the video signal according to a predetermined timing (50); A logic operation 52 for calculating and processing data input from the memory controller 50; And a data latch 54 in which the operation result of the logic operation 12 is stored.

In particular, the reference time generation unit for generating a predetermined clock output unit comprises an oscillator 56 for generating a predetermined clock; A LUT map 58 for modulating a clock of M bits into a clock of N bits; And a counter 60 that counts and outputs the clock of the oscillator 56.

The output generator includes: a comparator 62 for comparing the output of the counter 60 with data read from the data latch 54; And a data driver 64 for displaying the comparison result data of the comparator 62 as an image signal on the organic light emitting display panel.

Hereinafter, an operation of the gradation extension display apparatus of the organic light emitting display panel using the clock modulation according to the present invention will be described in detail.

As shown in FIG. 2, the circuit configuration can be extended to gray scales by performing 1: N processing on a clock while data processing is performed according to 1: 1 mapping. The actual operating waveform according to this representation is shown in FIG. 3. That is, FIG. 3 is a clock operation waveform diagram of FIG. 2. In other words, the waveform (a) of FIG. 3 is a reference clock output from the oscillator 56, and the waveform (b) of FIG. 3 is a waveform when the LUT map 58 linearly maps the reference clock. (c) The waveform is a waveform when the LUT map 58 non-linearly maps the reference clock. The waveform of the mapping result (FIGS. 3B and 3C) is merely an example, and various mapping may be performed according to a table change of the LUT map 58.

In FIG. 2, the memory controller 50 is a part that processes frame data for image processing. The input data is transferred to a separate memory (not shown) and stored, and the data is transmitted to the logic operation 52 in accordance with a timing for representing an image.

As such, the data to be delivered is subjected to a 1: 1 mapping process. The logic operation 52 calculates the received data and outputs the result. The output operation result is stored in the data latch 54. The stored data is compared with the output of the counter 60 using the reference clock generated by the oscillator 56 to generate an output. At this time, the clock generated to operate the counter 60 is modulated via the LUT map 58 to operate.

In other words, in FIG. 1, the processing data is extended by using the LUT map 14 in the data processing part to process extended gray scale. However, in FIG. 2, in FIG. To deal with gradation.

Nonlinear gradation representation using LUT (Look-Up Table) is generally implemented through data modulation. In this data modulation, the hardware configuration and the increase of blocks increase the area of the actual circuit and greatly increase the time for design verification. However, in the present invention, the data processing is invariably generated by generating a nonlinear clock through the LUT map 58 in the clock to obtain the same effect. As a result, the hardware configuration is not significantly changed, and the verification time is not changed compared to the gray scale extension through the conventional LUT map 14.

In the present invention, although the LUT map 58 is used to modulate the linear clock into the nonlinear clock, the present invention is not limited thereto, but may be replaced by various circuits. In addition, although the installation position of the LUT map 58 is also arranged between the oscillator 56 and the counter 60, various positions can be set within the level of those skilled in the art.

As described above, according to the gray scale display device of the organic light emitting display panel using the clock modulation according to the present invention, the result is the same as the PWM circuit of the conventional OELD, but the data processing part uses 1: 1 mapping as in the prior art. Compared with the hardware cost, the hardware cost is not greatly increased, and the image expressing ability is increased.

In addition, it is possible to eliminate the interference on the screen that may occur between frames by leaving a stabilization period.

Although the present invention has been described in connection with the above-mentioned preferred embodiments, various other modifications and variations may be made without departing from the spirit and scope of the invention. It is therefore contemplated that the appended claims will cover such modifications and variations as fall within the true scope of the invention.

Claims (4)

A reference clock generator for generating and outputting a predetermined clock; An image signal input unit configured in parallel with the reference clock generator; An output generator for displaying a video signal on the organic light emitting display panel based on the reference clock input from the reference clock generator and the video signal input from the video signal input unit; And And a data modulating means provided in the reference clock generation unit and modulating M bits generated in the reference clock generation unit to N bits (N> M). Gradient Expansion Display. The method of claim 1, wherein the reference clock generator and the data modulation means, An oscillator 56 for generating a predetermined clock; A LUT map 58 for modulating the M bit clock output from the oscillator 56 to an N bit clock; And And a counter (60) for counting and outputting N-bit clocks of the LUT map (58). The method of claim 1 or 2, wherein the video signal input unit, A memory controller (50) storing image signal data in a memory and reading and outputting frame data of the image signal at a predetermined timing; A logic operation 52 for calculating and processing data input from the memory controller 50; And And a data latch (54) for storing the operation result of the logic operation (52). The gray scale display device of the organic light emitting display panel using the clock modulation. The method of claim 3, wherein the output generating unit, A comparator (62) for comparing the output of the counter (60) with data read from the data latch (54); And And a data driver (64) for displaying the comparison result data of the comparator (62) as an image signal on the organic light emitting display panel.