KR100459820B1 - Chip scale package and its manufacturing method - Google Patents

Abstract

Chip scale package (CSP) according to the present invention and a method for manufacturing the same, the through-hole is formed in the center portion, and the CSP is manufactured by using a metal substrate having a structure in which the bottom surface of the substrate around the predetermined thickness is recessed, First, the bonding pads and the metal wiring are electrically connected by the metal wires on the recessed side of the substrate, thereby facilitating easy wire bonding, and second, the molding resin inside the through hole including the recessed portion of the metal substrate. It is encapsulated so as to be filled only at the bottom, so that even if the pitch and size of solder balls are gradually miniaturized due to the thinning and miniaturization of the package, it is possible to solve the difficulty of the potting process. Since warpage can be prevented, coplanarity of solder balls can be secured. Fourth, semiconductor chips and brushes Since the metal substrate is placed between the balls, it is possible to improve the heat dissipation capability of the CSP.

Description

Chip scale package and its manufacturing method

The present invention relates to a chip scale package (hereinafter referred to as a CSP) and a method of manufacturing the same, and more particularly, not only can improve heat dissipation characteristics of the package, but also easily perform a wire bonding and potting process. It relates to a CSP and a method of manufacturing the same.

BACKGROUND With the trend of thinning and miniaturization of electronic devices, packaging technologies for mounting semiconductor devices are also required to have high speed, high functionality, and high density mounting. 1 is a cross-sectional view showing a conventional general CSP structure manufactured based on this requirement.

Referring to the cross-sectional view, bonding of the upper surface of the chip 1 onto the substrate 5 on which the CSP, which is generally used in the prior art, is large, the through hole is formed in the center portion, and the metal wiring 7 is formed on the lower surface thereof. The semiconductor chip 1 is attached to expose the pad, and each bonding pad of the semiconductor chip 1 and the metal wire 7 on the bottom surface of the substrate 5 are electrically connected by a metal wire 9. Predetermined portions of the wire 9, the upper surface of the semiconductor chip 1 and the lower surface of the substrate 5 around the wire 9 are sealed by the molding resin 15, and the metal wiring 7 on the lower surface of the substrate 5 has solder balls ( It can be seen that the structure is attached to 11).

Thus, the CSP is manufactured through the following fifth step process.

As a first step, a substrate (for example, a PCB) 5 having a structure in which a through hole is provided in a central portion and a metal wiring 7 to be used as a land pattern is formed on a lower surface thereof.

As a second step, the upper surface of the substrate 5 (the surface on which no metal wiring is formed) and the upper surface of the semiconductor chip 1 are separated from each other so that the bonding pad of the upper surface of the semiconductor chip 1 is exposed through the through hole. adhere using a non-conductive adhesive (3).

As a third step, the metal wire 9 is used to bond the bonding pads on the upper surface of the semiconductor chip 1 with the metal wirings 7 on the lower surface of the PCB 5 (the surface on which the metal wirings are formed).

As a fourth step, in order to protect the portion where the bonding pads and the metal wires 7 are wire-bonded from the external environment, the upper surface of the metal wire 9 and the semiconductor chip 1 around the metal wire 9 and the surroundings thereof by using a potting method; The predetermined portion of the lower surface of the substrate 5 is sealed with the molding resin 15.

As a fifth step, the CSP manufacture is completed by attaching the solder balls 11 to the metal wirings 7 formed on the lower surface of the substrate 5.

However, when manufacturing the CSP through such a series of manufacturing processes, various problems occur after the completion of the packaging process.

First, when the pitch and size of the solder ball 11 are gradually fined due to the thinning and miniaturization of the package, the metal wire 9 and the surrounding semiconductor chip 1 by the potting method are used. In order to seal a predetermined portion of the upper surface and the lower surface of the substrate 5 with the molding resin 15, it becomes impossible to secure a space for installing a dam l3 necessary, so that the potting process cannot be performed. When the size of (11) decreases, a phenomenon in which the height of the molding resin 15, which is a potting material, becomes relatively higher than the height of the solder ball 11 occurs. Third, warpage of the package due to a difference in coefficient of thermal expansion. When the phenomenon occurs, a difference occurs in the height between the solder balls 11 attached to the metal wiring 7, so that it is difficult to secure coplanarity of the balls 11. 1) and the solder ball (11) between the adhesive layer and the substrate (5) Therefore, problems such as deterioration of the heat dissipation capability of the CSP occur.

Accordingly, an object of the present invention is to manufacture a package using a metal substrate having a structure in which a lower surface of a substrate around a through hole is recessed instead of a PCB, thereby improving heat dissipation characteristics of the CSP and facilitating an easy wire bonding and potting process. The present invention provides a CSP and a method of manufacturing the same.

In order to achieve the above object, in the present invention, the metal substrate having a through hole formed in the center portion, an insulating layer formed on the lower surface of the metal substrate, the metal wiring is formed on the surface, and the bonding pad is exposed through the through hole A semiconductor chip attached to an upper surface of a metal substrate and having a bonding pad formed at a central portion thereof, a metal wire electrically connecting the bonding pad and the metal wiring, a molded resin encapsulating the upper surface of the metal wire and the semiconductor chip, and A CSP consisting of solder balls attached to metal wiring is provided.

In this case, the metal substrate constituting the CSP may be manufactured such that the bottom surface of the substrate around the through hole has a predetermined thickness recessed structure, and a tab tape is mainly used as an insulating layer having a metal wiring formed on the surface thereof.

In order to achieve the above object, in the present invention, forming a through hole in the center of the metal substrate, forming an insulating layer on the lower surface of the metal substrate, forming a metal wiring on the insulating layer, Attaching a semiconductor chip to an upper surface of the metal substrate to expose a bonding pad through the through hole, wire bonding the bonding pad and the metal wiring, and encapsulating the upper surface of the metal wire and the semiconductor chip with a molding resin. And a step of attaching a solder ball to the metal wiring is provided.

In the present invention, as a method for facilitating the wire bonding process and the potting process of the thinned and miniaturized CSP, after forming the through hole in the center of the metal substrate, the lower surface of the substrate around the through hole is predetermined. The process may proceed in a manner that further comprises processing the substrate to be recessed in thickness.

In addition, instead of forming an insulating layer on the lower surface of the metal substrate and forming a metal wiring on the insulating layer, the process may be performed by directly attaching a tab tape having metal wiring formed on the lower surface of the metal substrate. It may be.

At this time, the metal wiring is formed of a CCL structure of Cu or Cu / resin / Cu, and polyimide is used as the insulating layer.

As a result of manufacturing the CSP to have the above structure, it is possible to improve the heat dissipation characteristics of the CSP due to the use of a metal substrate. In addition, the recessed portion formed on the bottom surface of the metal substrate around the through hole can reduce the height at which the bonding pad and the metal wiring are wire-bonded. In this case, the wire bonding and potting process can be easily performed.

Hereinafter, with reference to the accompanying drawings will be described in detail a preferred embodiment of the present invention.

The present invention improves the heat dissipation characteristics of the CSP by manufacturing a package using a metal substrate having a structure in which the lower surface of the substrate around the through hole is recessed in thickness instead of the PCB which is generally used in manufacturing the CSP. At the same time, a technology that focuses on making it easy to perform the wire bonding and potting process, which will be described with reference to the cross-sectional view shown in FIG.

Referring to the cross-sectional view, the CSP presented in the present invention is large, through-holes are formed in the center portion, and the lower surface of the substrate around the through-holes is formed on the metal substrate 104 manufactured to have a predetermined thickness recessed structure. The semiconductor chip 100 is attached to expose the bonding pads through the through-holes, and an insulating layer 106 having metal wirings 108 formed on a surface thereof is formed on a bottom surface of the metal substrate 104. The upper bonding pad and the metal wire 108 are electrically connected to each other by the metal wire 110, and the upper surface of the metal wire 110 and the semiconductor chip 100 are encapsulated by the molding resin 112. In addition, it can be seen that the metal wire 108 has a structure in which a solder ball 114 is attached.

In this case, Cu or Al is mainly used as the metal substrate 104, and a copper clad laminate (CCL) made of Cu, Cu, resin, or Cu is used as the metal wiring 108, and the metal wiring 108 is formed on the surface thereof. ), Polyimide is used as the insulating layer 106 formed. Here, the insulating layer 106 formed on the bottom surface of the metal substrate 104 and having the metal wiring 108 formed thereon can be replaced with a tab tape on which the metal wiring is formed.

Meanwhile, in the present invention, when the CSP is to be used for the purpose of improving only the heat dissipation characteristic, the structure focuses only on the metal substrate 104 instead of the PCB, and the bottom surface of the substrate 104 around the through hole is recessed. The CSP may be manufactured using the metal substrate 104 having no.

Thus, the CSP is manufactured through the following sixth step process.

As a first step, a through hole is formed in a central portion of the metal substrate 104, and then the metal substrate 104 is processed so that the bottom surface of the substrate 104 around the through hole is recessed to a predetermined thickness. Is formed, and the metal substrate 104 which has the structure by which the lower surface of the periphery of the substrate 104 was recessed by predetermined thickness is prepared. In this case, the substrate 104 is processed by a forming method or a coining method.

As such, the manufacture of the package using the metal substrate 104 instead of the PCB improves the heat dissipation characteristics of the finally produced CSP and at the same time, the package caused by the difference in thermal expansion coefficient between the substrate and the semiconductor chip after assembly of the product. This is to suppress the warpage phenomenon.

Recessing the lower surface of the substrate 104 around the through hole by a predetermined thickness allows the wire bonding process to be performed on the recessed surface of the substrate 104, so that the wire bonding process can be performed more easily. At the same time, even when the pitch and size of the solder ball gradually become fine due to the thinning and miniaturization of the CSP, the upper surface of the metal wire and the semiconductor chip 100 can be easily encapsulated with the molding resin 112 by using the potting method. For sake.

Therefore, when the CSP is to be used only for the purpose of improving heat dissipation characteristics and preventing warpage of the package, the process may be performed by skipping the recess process on the lower surface of the substrate 104 around the through hole.

As a second step, after the polyimide, which is an insulating layer 106, is applied to the lower surface of the metal substrate 104, a metal wiring 108 having a Cu or CCL structure is formed thereon or a metal wiring is formed. The metal wiring 108 is formed on the metal substrate 104 by attaching a tab tape directly to the bottom surface of the metal substrate 104.

As a third step, the semiconductor chip 100 is attached to the top surface of the metal substrate 104 using the insulating adhesive 102 so that the bonding pad formed at the center of the top surface of the semiconductor chip 100 is exposed.

As a fourth step, the metal wire 110 is bonded to the bonding pads on the upper surface of the semiconductor chip 100 and the metal wires 108 formed on the recessed surfaces of the metal substrate 104 to wire-bond them. Connect to

As such, when the wire bonding process is performed, the metal wire 110 does not come down to the point where the solder balls 114 and the metal wires 108 are attached in the bonding process, so that the bonding process may be performed more easily than in the conventional case. Will be.

As a fifth step, in order to protect the portion where the bonding pads and the metal wires 108 are wire-bonded from the external environment, the upper surface of the metal wire 110 and the semiconductor chip 100 may be formed by using a molding method. 112).

In this case, since the molding resin 112 is encapsulated to be filled only inside the through hole including the recessed portion of the metal substrate 104, even when the pitch and size of the solder ball 114 are miniaturized, the potting operation is difficult. Will not.

As a sixth step, by attaching the solder ball 114 to the metal wiring 108 formed on the lower surface of the metal substrate 104, the package manufacturing is completed.

As described above, according to the present invention, first, since the bonding pad and the metal wiring are electrically connected to each other by the metal wires on the recessed surface of the substrate, the wire bonding operation is easily performed. Second, the molding resin is the metal substrate. Since the sealing is filled only inside the through hole including the recessed part of the mold, the height of the molding resin does not occur higher than the height of the solder ball even if the pitch and size of the solder ball gradually become smaller due to the thinner and smaller package. Third, the difficulty of the potting process can be solved. Third, the coplanarity of the solder ball can be prevented because the CSP warpage caused by the difference in thermal expansion coefficient between the semiconductor chip and the substrate is prevented after assembly of the product. Fourth, since the metal substrate is placed between the semiconductor chip and the solder ball, the heat release of the CSP You will be able to improve your skills.

1 is a cross-sectional view showing a CSP structure according to the prior art.

2 is a cross-sectional view showing a CSP structure according to the present invention.

Claims (13)

A metal substrate having a through hole formed in a central portion thereof and having a predetermined thickness recessed in a lower surface of the substrate around the through hole; An insulating layer formed on a lower surface of the metal substrate and having metal wiring formed on a surface thereof; A semiconductor chip attached to an upper surface of the metal substrate to expose a bonding pad through the through hole and having a bonding pad formed at a center thereof; A metal wire electrically connecting the bonding pad and the metal wire; A molding resin encapsulating an upper surface of the metal wire and the semiconductor chip in the recessed portion of the metal substrate; And And a solder ball attached to the metal wiring. The chip scale package of claim 1, wherein the metal substrate is made of Cu or Al. The chip scale package of claim 1, wherein the metal wiring has a CCL structure of Cu or Cu / resin / Cu. The chip scale package of claim 1, wherein the insulation layer is made of polyimide. The chip scale package of claim 1, wherein the insulating layer on which the metal wiring is formed is a tab tape. Forming a through hole in a central portion of the metal substrate; Processing the substrate such that a lower surface of the substrate around the through hole is recessed by a predetermined thickness; Forming an insulating layer on a lower surface of the metal substrate; Forming a metal wiring on the insulating layer; Attaching a semiconductor chip to an upper surface of the metal substrate to expose a bonding pad through the through hole; Wire bonding the bonding pads to the metal wires; Encapsulating the upper surface of the metal wire and the semiconductor chip with a molding resin in the recessed portion of the metal substrate; And Attaching a solder ball to the metal wiring; The method of claim 6, wherein the metal substrate is formed of Cu or Al. The method of claim 6, wherein the metal wiring is formed of a CCL structure of Cu or Cu / resin / Cu. The method of claim 6, wherein the insulating layer is formed of polyimide. The method of claim 6, wherein the substrate is processed by a forming method or a coining method. Forming a through hole in a central portion of the metal substrate; Processing the substrate such that a lower surface of the substrate around the through hole is recessed by a predetermined thickness; Adhering a tab tape having metal wiring to a lower surface of the metal substrate; Attaching a semiconductor chip to an upper surface of the metal substrate to expose a bonding pad through the through hole; Wire bonding the bonding pads to the metal wires; Encapsulating the upper surface of the metal wire and the semiconductor chip with a molding resin; And Attaching a solder ball to the metal wiring; The method of claim 11, wherein the metal substrate is formed of Cu or Al. The method of claim 11, wherein the substrate is processed by a forming method or a coining method.

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