KR100453367B1 - Etching method of insulating film in liquid crystal display device - Google Patents

Abstract

The present invention discloses an insulating film etching method in a liquid crystal display device capable of preventing step coverage defects. An insulating film etching method in a liquid crystal display device according to the present invention is an insulating film etching method in a liquid crystal display device to have an etch surface having a positive tapered etch profile during the etching of the insulating film using a wet etching process. The insulating film including the sacrificial layer is etched in a state in which a sacrificial layer having an etching rate of 2 to 3 times faster than that of the insulating film is formed on a specific chemical or gas.

Description

Method of etching insulating film in liquid crystal display device

The present invention relates to a liquid crystal display device, and more particularly, to an insulating film etching method in a liquid crystal display device that can prevent a step coverage failure.

The liquid crystal display has a lower glass substrate on which a thin film transistor, which is an individual switching element, and three color filters of red, green, and blue are repeated and arranged. The upper glass substrate is bonded to each other, and the liquid crystal is sealed in the space between the glass substrates.

1 is a cross-sectional view illustrating a lower substrate of a liquid crystal display device according to the prior art.

First, a predetermined metal film is deposited on the entire surface of the glass substrate 1, and then patterned by a conventional method to form the gate electrode 2 and the pad electrode 11, and then on the entire surface of the substrate 1 including them. A gate insulating film 3 made of a silicon oxide film is formed on the substrate.

Then, the channel layer 4 is formed of an amorphous silicon film on the portion of the gate insulating film 3 covering the gate electrode 2, and the channel layer 4 is formed on the center of the channel layer 4 in a subsequent process. In order to prevent damage, an etch stopper (5) made of silicon nitride is formed.

Then, an ohmic contact layer 6 made of a doped silicon film is formed on the channel layer 4 adjacent to each of them from both edges of the etch stopper 5, and then ITO (Indium Tin Oxide) in the pixel region. The pixel electrode 8 made of a transparent metal such as) is formed.

Subsequently, the gate insulating layer 3 of the pad electrode 11 is etched, and then the ohmic contact layer 6 and the gate insulating layer 3 adjacent to the pad electrode 11 and the pad electrode 11 and the pixel electrode 8 adjacent thereto are etched. The source / drain electrodes 7 are formed on the substrate, and then the protective film 9 made of a silicon nitride film is formed over the whole.

However, the method of manufacturing the lower substrate as described above includes a seven-step etching process, that is, an etching process for forming a gate electrode, an etch stopper, a channel layer, a pixel electrode, and a source / drain electrode, a gate insulating film covering the pad electrode; Since the etching process for removing the protective film must be performed separately, the manufacturing process is very complicated.

Therefore, recently, a method of simplifying a manufacturing process of a lower substrate by forming a pixel electrode as a top layer has been performed. In this case, a process of forming a channel layer and a source / drain electrode is performed in one etching process. In this case, the gate insulating layer and the protective layer covering the pad electrode may be simultaneously removed by one etching process, thereby simplifying the manufacturing process of the lower substrate.

2 is a cross-sectional view illustrating a lower substrate in which the pixel electrode as described above is formed as a top layer. Here, the same parts as in Fig. 1 are denoted by the same reference numerals.

As shown, the thin film transistor 30 is formed on one side, the pad electrode 11 is formed on the other side, and the thin film transistor 20 and the pad electrode on the lower substrate 1 through a conventional manufacturing process. A protective film 9 is formed on the entire surface of the substrate 1 including the 11. The pixel electrode 8 which contacts the source / drain electrode 7 and the pad electrode 11 of the thin film transistor is formed on the passivation layer 9 on the pixel region and the pad electrode 11, respectively.

However, in the case of manufacturing the lower substrate as described above, in the case of patterning each insulating film using a wet etching process, as shown in FIG. 3, isotropic etching occurs during etching of the silicon nitride film for etch stopper and subsequent processes When the in source / drain electrodes were formed, there was a problem in that a metal film was not deposited on the etch stopper with a uniform thickness. Here, reference numeral 1 denotes a substrate, 4 denotes a channel layer, 5 denotes an etch stopper, and 50 denotes a photosensitive film pattern.

In addition, in order to prevent the isotropic etching of the etch stopper silicon nitride film as described above, a photoresist film having a low adhesive strength with the silicon nitride film is conventionally used as an etching mask material, but in this case, the photoresist film falls off during the etching process. Due to the defects of the etching process was rather poorly made.

In addition, when the pixel electrode is formed as a top layer, the etching rate is rapidly increased at the interface between the gate oxide silicon oxide film and the protective silicon nitride film when the pad electrode is opened. As shown in FIG. In the case of 3), the etch profile is in the form of a positive taper, whereas in the case of the protective film 9, the etch profile is in the form of an inverse tape, thereby forming a pixel electrode, which is a subsequent process, as shown in FIG. There is a problem that a poor step coverage of the pixel electrode 8 occurs. Here, reference numeral 1 denotes a substrate, 11 a pad electrode, and 50 a photoresist pattern.

Accordingly, the present invention has been made to solve the above problems, by forming a sacrificial layer on the insulating film to be etched so that the etching profile of the insulating film is a positive tapered form, the step coverage failure occurs during the subsequent process It is an object of the present invention to provide a method for etching an insulating film in a liquid crystal display device which can be prevented.

In order to achieve the above object, the present invention is an insulating film etching method in the liquid crystal display device for the etching surface to have a positive tapered etching profile during the etching of the insulating film using the wet etching process, wherein The present invention provides a method for etching an insulating film in a liquid crystal display device, wherein the insulating film including the sacrificial layer is etched while a sacrificial layer having an etching rate of 2 to 3 times faster than the insulating film is formed with respect to a specific chemical or gas. .

In addition, the present invention is an insulating film etching method in a liquid crystal display device for forming an etch stopper having a positive tapered etching profile on the center of the channel layer, the silicon nitride film for the arch stopper on the entire surface of the glass substrate having the channel filling Depositing; Forming a sacrificial layer on the etch stopper silicon nitride film having an etching rate of 2 to 3 times faster than the etch stopper silicon nitride film with respect to a specific chemical or gas; Forming a photoresist pattern on the sacrificial layer to expose a predetermined portion thereof; And performing a wet etching process using a BOE solution using the photoresist pattern as an etching mask.

In addition, the present invention is an insulating film etching method in a liquid crystal display device for the etching profile of the gate insulating film and the protective film covering the pad electrode to have a positive tapered shape in the etching process for opening the pad electrode, the protective film image Forming a sacrificial layer having an etching rate of 2 to 3 times faster than an etching rate at an interface between the gate insulating layer and the passivation layer; Forming a photoresist pattern exposing an upper portion of the pad electrode on the regenerative layer, comprising: performing a wet etching process using a BOE solution using the photoresist pattern as an etching mask; Provided is an insulating film etching method.

(Example)

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

6A and 6B are views for explaining an insulating film etching method in the liquid crystal display device according to the first embodiment of the present invention.

Referring to FIG. 6A, in the state in which the channel layer 4 is formed on the glass substrate 1, the silicon nitride film 12 for etch stopper is deposited on the channel layer 4, and then, the silicon nitride film. A sacrificial layer 14 having a relatively higher etching speed is formed on (12).

Here, the sacrificial layer 14 may have an etching speed that is about 2 to 3 times faster than the silicon nitride film 12 for the arch stopper for the same etching atmosphere, that is, a chemical or a specific gas such as a BOE solution. For example, as the material for the sacrificial layer 14, the silicon nitride film (SiNx) may be deposited in the same manner as the material for the etch stopper, and the silicon nitride film for the sacrificial layer 14 may be controlled through deposition conditions, that is, plasma. In the case of depositing by using the final process, the electrode is deposited to have an etching rate that is about 2 to 3 times faster than the etch stopper silicon nitride film 12 by adjusting the power applied to the electrode and the gap between the upper and lower electrodes. .

On the other hand, the deposition thickness of the sacrificial layer 14 is preferably about 400 to 600 kPa. This is because, as is well known, most of the films on the lower substrate of the thin film transistor liquid crystal display are deposited at a thickness of 400 to 600 Å in order not to cause the step coverage problem by itself. .

Next, a photoresist pattern 50 is formed on the sacrificial layer 14 to expose a predetermined portion thereof.

Referring to FIG. 6B, the etch stopper silicon nitride layer 12 including the sacrificial layer 14 is etched by a wet etching process using a BOE solution, thereby forming an etch stopper 20. Then, the photoresist pattern used as an etch mask is removed and a series of subsequent steps known in the art is performed.

Here, the sacrificial layer 14 is about 2 to 3 times faster than the etch stopper silicon nitride film 12 with respect to the BOE solution, and when the wet etching using the BOE solution, the sacrificial layer 14 ) Is etched faster than the etch stopper silicon nitride film 12 below, so that the etch profile of the etch stopper silicon nitride film 12 is positive tapered as shown.

Therefore, when the photoresist pattern is removed and a source / drain film is deposited on the etch stopper 20 having the etch profile in the form of a positive tape, poor step coverage of the metal film can be prevented.

7A and 7B are diagrams for describing an insulating film etching method of a liquid crystal display according to a second exemplary embodiment of the present invention.

Referring to FIG. 7A, the passivation layer is formed to open the pad electrode 11 formed on the glass substrate 1 and covered with a heterogeneous lamination layer of the gate insulating silicon oxide layer 22 and the passivation silicon nitride layer 24. A sacrificial layer 26 is formed on the silicon nitride film 24.

Here, the sacrificial layer 26 may have an etching rate that is relatively faster than an etching rate at an interface between the gate oxide silicon oxide layer 22 and the protective silicon nitride layer 24, for example, an etching rate that is about 2 to 3 times faster. It is formed to have. This is because the interface between the nitride film and the oxide film is an interface between dissimilar materials. At this time, the interface between the dissimilar materials has a low bonding force, which is much faster than the etching rate of the nitride film itself or the oxide film itself, so that the sacrificial layer 26 must be etched to make a positive taper. This is because the speed must be faster than the etching rate at the interface between the nitride film and the oxide film.

As the material of the sacrificial layer 26, a silicon nitride film is preferable, and the silicon nitride film for the sacrificial layer has a lower bond strength of the film quality than the interface bond strength between the nitride film and the oxide film by controlling conditions during deposition, for example, pressure and RF power. By making it, it can be formed to have an etching rate about 2-3 times faster than the etching rate at the interface between the nitride film and the oxide film.

In addition, the thickness of the sacrificial layer 26 is formed to a thickness of about 400 to about 60 kPa, which is itself a thickness range that does not cause poor step coverage.

Next, a photoresist pattern 50 is formed on the sacrificial layer 26 to expose the upper portion of the pad electrode 11.

Referring to FIG. 7B, after the wet etching process using the BOE solution is performed using the photoresist pattern as a stone mask, the photoresist pattern is removed.

Here, since the etching rate of the sacrificial layer 26 is relatively faster than the etching rate of the interface method between the passivation silicon nitride film 24 and the gate oxide silicon oxide film 22, the passivation film silicon nitride film 24 is gated. More than the silicon oxide film 22 for the insulating film is etched relatively, so that the etching profile of the protective film silicon nitride film 24 and the gate insulating film silicon oxide film 22 is a positive tapered form.

Therefore, ITO for forming a pixel electrode on the gate oxide silicon oxide film 22, the protective film silicon nitride film 24, and the sacrificial layer 26 having the positive tapered etch profile with the photoresist pattern removed, In the case of depositing the same transparent metal film 28, it is possible to prevent poor step coverage, as shown.

As described above, in the insulating film etching method of the liquid crystal display according to the present invention, by forming an additional sacrificial layer having a very high etching rate on the deposited film to be etched, the etching profile may be formed in a positive tapered shape. Poor coverage can be prevented.

Meanwhile, although specific embodiments of the present invention have been described and illustrated, modifications and variations can be made by those skilled in the art. Accordingly, the following claims are to be understood as including all modifications and variations as long as they fall within the true spirit and scope of the present invention.

1 is a cross-sectional view showing a lower substrate of a liquid crystal display device according to the prior art.

2 is a cross-sectional view showing a lower substrate of a liquid crystal display device according to another conventional technology.

3 to 5 are views for explaining a problem occurring in the conventional lower substrate manufacturing.

6A and 6B are cross-sectional views illustrating a method of etching an insulating film according to a first embodiment of the present invention.

7A and 7B are cross-sectional views illustrating a method of etching an insulating film according to a second embodiment of the present invention.

(Explanation of symbols for the main parts of the drawing)

1: lower substrate 4: channel layer

11 pad electrode 12 silicon nitride film for etch stopper

14,26: sacrificial layer 20: etch stopper

22 silicon oxide film for gate insulating film 24 silicon nitride film for protective film

28: transparent metal film 50: photosensitive film pattern

Claims (9)

An etching method of an insulating film in a liquid crystal display device such that the etching surface has a positive tapered etching profile when the insulating film is etched using a wet etching process. Insulating film including the sacrificial layer is etched on the insulating film while a sacrificial layer having an etching rate of 2 to 3 times faster than that of the insulating film is formed on the insulating film. Way. The method of claim 1, wherein the sacrificial layer is a silicon nitride film. The method of claim 2, wherein the silicon nitride layer is formed to have a thickness of 400 to 600 kV. An insulating film etching method in a liquid crystal display device for forming an etch stopper having a positive tapered etching profile on a central portion of a channel layer, Depositing a silicon nitride film for an etch stopper on the entire surface of the glass substrate on which the channel layer is formed; Forming a sacrificial layer on the etch stopper silicon nitride film having an etching rate of 2 to 3 times faster than the etch stopper silicon nitride film with respect to a specific chemical or gas; Forming a photoresist pattern on the sacrificial layer to expose a predetermined portion thereof; And And performing a wet etching process using a BOE solution using the photoresist pattern as an etching mask. The method of claim 4, wherein the sacrificial layer is a silicon nitride film. 6. The method of claim 5, wherein the silicon nitride film is formed to a thickness of 400 to 600 kHz. An insulating film etching method in a liquid crystal display device such that the etching profile of the gate insulating film and the protective film covering the pad electrode has a positive taper shape during an etching process for opening the pad electrode. Forming a sacrificial layer on the passivation layer having an etching rate that is 2 to 3 times faster than a viewing speed at the interface between the gate insulating layer and the passivation layer; Forming a photoresist pattern on the sacrificial layer to expose an upper portion of the pad electrode; And performing a wet etching process using a BOE solution using the photoresist pattern as an etching mask. 8. The method of claim 7, wherein the sacrificial layer is a silicon nitride film. 10. The method of claim 8, wherein the silicon nitride layer is formed to a thickness of 400 to 600 kV.

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