KR100449507B1 - Method for dividing socket of test handler - Google Patents

Abstract

The method relates to the socket classification method of the test handler which distinguishes only the socket in which the error occurs among the plurality of sockets. The method of designating a different address according to the capacity of the corresponding memory module for each socket, and assigning each socket a memory module Performing a test on the address, generating a file including the entire test area and the error occurrence address upon completion of the test, and comparing the error occurrence address recorded in the file with a predetermined address for each socket, thereby generating a socket. Since the step of separating the problem is solved that all of the defective processing even if only one or more of the plurality of sockets, can improve the test yield and work efficiency.

Description

Method for dividing socket of test handler}

The present invention relates to a test handler, and more particularly, to a test handler and a control method thereof.

In general, a test handler is a device for handling and testing a large amount of products in various memory or non-memory fields using semiconductor devices, and is configured according to a test object such as a logic IC or a memory module in which various semiconductor devices are mounted on one chip. This may indicate a difference in phase.

Hereinafter, as an example of a test handler, a description will be given of a type of testing by mounting a module on a test computer.

That is, as shown in FIG. 1, the loading unit 2 in which trays in a state in which a plurality of module RAMs are accommodated in the front part of the housing 1 forming the overall appearance are vertically stacked in two rows, The state of the memory module tested by the primary test unit 3 and the primary test unit 3 for firstly receiving a memory module stored in the tray of the loading unit 2 and performing a test such as a short inspection. According to the present invention, the buffer unit 4 for temporarily storing the product is separated from the good and defective parts, and the test computer 5 is lifted up and down in the horizontal direction while the test computer 5 is stored in the rear part of the housing 1. It is also possible to draw out, and receives only the memory modules in a good state among the temporarily stored memory modules in the buffer unit 4, and temporarily mounts them in the test computer 5 while checking the abnormal state in the mounted state secondary Secondary A first unloading unit 7 in which empty trays are vertically stacked in two rows to accommodate a plurality of memory modules of a memory module secondaryly tested by the test unit 6 and the secondary test unit 6, The second tray test unit 6 includes a second unloading unit 8 in which empty trays 8a are vertically stacked so as to accommodate a large number of defective memory modules among the memory modules secondary tested by the secondary test unit 6. In the above-described configuration, the secondary test unit 6 is provided with a plurality of sockets in a form of a column so that a plurality of memory modules can be simultaneously tested for each test computer 5.

The test operation of the test handler configured as described above is briefly described as follows.

First, before description, it is assumed that four sockets are provided for the predetermined test computer 5 of the secondary test unit 6, and the capacity of the memory module under test is 32 MB (Mega Byte).

When the memory modules are mounted in each of the four sockets and mounted in the test computer 5, the test computer allocates a common memory address for the memory modules in each socket.

That is, since the capacity of the memory module is 32MB, 0x00000000 ~ 0x03FFFFFF are commonly defined and tests are sequentially performed on 0x00000000 ~ 0x03FFFFFF addresses.

As a result of the test, if any one of the four memory modules has an error at the address 0x02001000 of the third socket, for example, an abnormality is determined, that is, a test or a failure is determined, the memory modules of the entire socket are All are either retested or failed.

In this case, if any memory module of any socket is abnormally determined, the memory module of all sockets is regarded as abnormal because the same address is assigned to all the memory modules, so it is not known which error occurred in the memory module of which socket.

The test handler according to the related art has a problem in that even if only one memory module is abnormally determined, even a normal memory module is retested or failed.

Accordingly, an object of the present invention is to provide a method for distinguishing a socket of a test handler that can distinguish only a socket in which an error occurs among a plurality of sockets.

1 is a plan view showing the configuration of a typical test handler

2 is a flowchart illustrating a socket classification method of a test handler according to the present invention.

The present invention provides a method of designating a different address according to a capacity of a corresponding memory module for each socket, performing a test on an address assigned to a memory module of each socket, and completing a test area and an error address when the test is completed. Generating a file including a; and distinguishing a socket in which an error occurs by comparing an error occurrence address recorded in the file with a predetermined address for each socket.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

2 is a flowchart illustrating a socket classification method of the test handler according to the present invention.

In the socket classification method of the test handler according to the present invention, as shown in FIG. 2, a memory module is inserted into each socket (S21) and mounted on a test computer.

Testing capacity socket Addressing 32 MB Socket 1 0x00000000 to 0x00FFFFFF Socket 2 0x01000000 to 0x01FFFFFF Socket 3 0x02000000 to 0x02FFFFFF Socket 4 0x03000000 to 0x03FFFFFF 64 MB Socket 1 0x00000000 to 0x01FFFFFF Socket 2 0x02000000 to 0x03FFFFFF Socket 3 0x04000000 to 0x05FFFFFF Socket 4 0x06000000 to 0x07FFFFFF … … … 1024 MB Socket 1 0x00000000 to 0x1FFFFFFF Socket 2 0x20000000-0x3FFFFFFF Socket 3 0x40000000 to 0x5FFFFFFF Socket 4 0x60000000 to 0x7FFFFFFF

Subsequently, the test computer designates a different address for each socket as shown in Table 1 to match the capacity of the inserted memory module (S22).

Then, the test computer tests in a predetermined order from the start address to the end address of the address specified for each memory module of the socket (S23).

Subsequently, when the test is completed, a primary file including a capacity and a test area of the memory module of the socket is generated, and a secondary file including a quality value (Bin) of the socket and an address where an error occurs in the test area is generated. (S24).

In addition, referring to the primary file and the secondary file, an address in which an error occurs is compared with a predetermined address for each socket as shown in Table 1, and the socket in which the memory module in which the error occurs is mounted is distinguished (S25).

For example, as a result of testing a socket 1 to a socket 4 equipped with four memory modules having a capacity of 64MB, an error is recorded at address 0x02000010 in the secondary file. If 0x02000000 to 0x03FFFFFF is specified for, 0x02000010 address recorded in the secondary file is included in 0x02000000 to 0x03FFFFFF specified in the socket 2, and thus, an error has occurred in the memory module of the socket 2.

Therefore, the socket according to which the error occurs, that is, the memory module of the socket 2, takes measures according to the quality value recorded in the secondary file, that is, retest or fail (S26).

Since the socket classification method of the test handler according to the present invention can distinguish only sockets in which a memory module in which an error occurs among a plurality of sockets is solved, all of the existing sockets have a problem that is poorly handled even if only one or more of them occurs. There is an effect to improve the test yield and work efficiency.

Claims (2)

A test handler for performing a test by mounting a memory module in at least two sockets and mounting the same on a test computer, Designating different addresses to match the capacity of the corresponding memory module for each socket; Performing a test on an address assigned to a memory module of each socket; Generating a file including an entire test area and an error occurrence address when the test is completed; And classifying sockets in which an error occurs by comparing an error occurrence address recorded in the file with a predetermined address for each socket. According to claim 1, And the file further comprises a capacity of a corresponding memory module and a test quality value (Bin).