KR100423247B1 - An amplifier and a liquid crystal display using the same - Google Patents

Abstract

The present invention is to drive a large capacity load with low power consumption in response to the input signal voltage at high speed.

The negative output voltage of the differential amplifier stage according to the input signal voltage Vin is connected to the gate of the charge charging Tr (M25) for the capacitive load 80, and the positive output voltage of the differential amplifier stage is The current according to the signal is output to the node A connecting the gate of Tr (M26) for discharging the charge of the capacitive load 80 and the constant current source 4. This current is changed by the input signal voltage Vin to become the value Iy + ΔI. The gate voltage of Tr (M26) is changed so that Tr (M26) is turned on to extract current I3 from the capacitive load 80. Converts the input signal voltage Vin into a current in the voltage-current converter 1, converts it into a voltage in the current-voltage converter 2, and outputs only by increasing the current corresponding to the positive output voltage. The driving ability of the Tr M26 is increased to perform a high speed response operation with low power consumption.

Description

Amplifier and Liquid Crystal Display {AN AMPLIFIER AND A LIQUID CRYSTAL DISPLAY USING THE SAME}

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to an amplification device for achieving low power consumption for driving capacitive loads such as liquid crystal cells constituting a liquid crystal display device and a liquid crystal display device incorporating the amplification device.

Background Art [0002] In recent years, liquid crystal displays including a liquid crystal panel composed of a large number of liquid crystal cells, a source driver for driving the liquid crystal panel, and the like have been widely used in various information processing apparatuses as display means for images and characters. The operation principle of the liquid crystal display is performed by changing one arrangement state of liquid crystal molecules to another arrangement state by an electric field, and modulating light using the optical characteristics of the liquid crystal cell at this time.

Therefore, an image is displayed on the liquid crystal panel by applying a voltage corresponding to the video signal to the liquid crystal cell. Such a liquid crystal panel is driven by a plurality of amplifying devices that constitute a source driver and apply a voltage to a corresponding liquid crystal cell. However, each liquid crystal cell becomes a capacitive load from the amplifying device side. For this reason, the amplifying apparatus displays an image by supplying (charging) or extracting (discharging) the charge to the capacitive load and setting the voltage of the capacitive load to a predetermined level.

Fig. 17 is a block diagram showing a configuration example of a conventional amplifying apparatus used for extracting the electric charge of the capacitive load (liquid crystal cell) as described above. In FIG. 17, the input signal voltage Vin is converted from the voltage-current converter 151 into a current I1 (for example, 200 to 300 mA) to flow through the diode-connected transistor T1. Since the transistors T1 and T2 constitute a current mirror circuit, the same current as the current I1 through the transistor T2 from the capacitor C (e.g., 100pF), which is an equivalent circuit of the capacitive load 80, through the transistor T2. (I) flows. Then, the charge accumulated in the capacitor C is extracted, and after the charge extraction period T elapses as shown in FIG. 18, for example, the voltage is lowered from 5V to 3V.

Since the conventional amplification apparatus is comprised as mentioned above, when the capacity | capacitance of the capacitor | condenser C is large or when the extraction speed of an electric charge is to be made faster, it is necessary to increase the electric current I which flows through the transistor T2. . However, in this case, it is necessary to increase the current I1 flowing from the voltage-current converter 151 to the transistor T1, resulting in a defect in which the power consumption is also increased. In particular, when a device equipped with a liquid crystal display device is portable and driven by a battery, an increase in power consumption causes a problem of shortening the battery driving time.

SUMMARY OF THE INVENTION The present invention has been made in view of the above point, and an object thereof is to provide an amplifier capable of driving a large capacitive load at high speed with low power consumption, and a liquid crystal display device having the amplifier.

1 is a block diagram showing the configuration of an amplifying apparatus according to Embodiment 1 of the present invention;

2 is a block diagram showing the overall configuration of a liquid crystal display device using the amplifier of the present invention;

3 is a block diagram showing the configuration of a source driver using the amplifying apparatus of the present invention in the liquid crystal display shown in FIG.

4 is a circuit diagram showing a configuration of an amplifier according to Embodiment 2 of the present invention;

5 is a circuit diagram showing another configuration of the amplifying apparatus according to Embodiment 2 of the present invention;

6 is a circuit diagram showing another configuration of the amplifier according to Embodiment 2 of the present invention;

7 is a circuit diagram showing another configuration of the amplifying apparatus according to Embodiment 2 of the present invention;

8 is a circuit diagram showing another configuration of the amplifying apparatus according to Embodiment 2 of the present invention;

9 is a circuit diagram showing another configuration of the amplifying apparatus according to Embodiment 2 of the present invention;

10 is a circuit diagram showing another configuration of the amplifying apparatus according to Embodiment 2 of the present invention;

11 is a circuit diagram showing another configuration of the amplifying apparatus according to Embodiment 2 of the present invention;

12 is a circuit diagram showing another configuration of the amplifying apparatus according to Embodiment 2 of the present invention;

13 is a circuit diagram showing the construction of an amplifying apparatus according to Embodiment 3 of the present invention;

FIG. 14 is a view showing an input voltage range of the voltage-current converter in the amplifier according to Embodiment 3 shown in FIG. 13;

15 is a circuit diagram showing a configuration of an amplifier according to Embodiment 4 of the present invention;

FIG. 16 is a diagram showing current extraction characteristics from capacitive loads in the amplifier according to Embodiment 4 shown in FIG. 15;

17 is a block diagram showing a configuration example of a conventional amplifier;

FIG. 18 is a characteristic diagram showing an example of voltage change of capacitive load in the conventional amplifier shown in FIG.

<Description of the Reference Code>

1,1-1,1-2,1-3,1-4,1-6 ... voltage-current converter,

1-5 ... voltage-current converter,

2 ... current-voltage converter, 4 ... constant current source,

5,7,11 ... output circuit, 6 ... bias voltage generating circuit,

8 ... bypass circuit, 10 ...

30 ... voltage range guarantee circuit, 36 amplifier device (liquid crystal drive circuit),

80 Capacitive load, SD1, ..., SDq ...

GD1, ..., GDp ... gate driver, LCDP ... liquid crystal panel.

The amplifier according to the present invention basically comprises a voltage-current converter, a current-voltage converter, a first output semiconductor element, and a second output semiconductor element. In particular, the voltage-current converter includes an amplifier stage for amplifying an input signal voltage and a voltage-current converter stage for outputting a current corresponding to the output voltage of the first polarity of the amplifier stage. Also, the current-voltage converter is composed of a semiconductor element and a constant current source connected in series with each other. Then, a current corresponding to the output voltage of the first polarity of the amplifier stage is supplied to the connection node of the semiconductor element and the constant current source, and outputs a voltage corresponding to the current output from the voltage-current converter to the connection node. Therefore, the first output semiconductor element controls the discharge operation of extracting charge from the capacitive load by the voltage output from the current-voltage converter based on the current corresponding to the output voltage of the first polarity of the amplifier stage, and for the second output. The semiconductor device is characterized in that it controls the charging operation of supplying charge to the capacitive load based on the output voltage of the second polarity different from the first polarity of the amplifier stage. Therefore, control is performed to extract the charge accumulated in the capacitive load based on the output voltage of the first polarity of the amplifier stage, and control is performed to charge the charge to the capacitive load based on the output voltage of the second polarity of the amplifier stage. Accordingly, in order to increase the current flowing through the first output semiconductor element, only the current corresponding to the input signal voltage is increased, thereby discharging and charging the charge to the capacitive load without increasing the power consumption. Since the second output semiconductor element can be performed quickly, the potential of the capacitive load can be quickly reduced to a predetermined level with low power consumption.

Further, in the amplifying apparatus of the present invention, when the input signal voltage input to the voltage-current converter is 0, the output current output from the voltage-current converter is smaller than the constant current flowing through the constant current source. . Therefore, when the converted voltage, which is the input signal voltage, exceeds zero, the current Iy output from the voltage-current converter becomes Iy + ΔI (ΔI is an increment of Iy), and Iy + ΔI> I for the first output. The voltage of the gate (control terminal) of the semiconductor element rises to turn on, and charge is extracted from the capacitive load. In order to increase this extracted current amount, it is only necessary to increase [Delta] I so that power consumption is reduced.

Further, in the amplifying apparatus of the invention described above, the voltage-current converter has a differential pair having a configuration in which the first and second transistors are differentially coupled, each gate is connected in common, each source is connected to a power supply line, and each drain Is connected to the drains of the first and second transistors, and the fifth and fourth transistors are connected to one drain of the first and second transistors, and the fifth transistor converts the voltage obtained from the differential pair into a current. And a drain connected to the source of both the first and second transistors, and having a sixth transistor for supplying a constant current to the differential pair.

Further, in the amplifying apparatus of the present invention, the voltage-current converter further comprises a compensation circuit comprising a seventh transistor whose source is connected to the drain of the fifth transistor and suppresses an error of the output current. As a result, an error in converting the input signal voltage into a current can be suppressed, and an error in the control voltage of the first output semiconductor element obtained by converting the current into a voltage can be eliminated, thereby reducing the potential of the capacitive load. The precision can be set to a predetermined voltage.

In the amplifying apparatus of the present invention, the voltage-current converter further includes an eighth transistor cascaded between the differential pair and the sixth transistor.

The amplifying apparatus of the present invention is characterized in that a resistor for phase compensation is provided in a path through which the first output semiconductor element extracts charge from the capacitive load.

In addition, the amplifying apparatus of the present invention is characterized by further comprising a bypass portion for bypassing and extracting the charge of the capacitive load by a path separate from the first output semiconductor element. As a result, the charge accumulated in the capacitive load can be rapidly extracted through the bypass portion to the outside of the first output semiconductor element.

Furthermore, in the amplifying apparatus of the present invention, the bypass portion extracts the charge of the capacitive load from a path in which one end thereof is directly connected to the capacitive load. Thereby, for example, by passing a current directly through this path from the capacitive load through the resistor, the apparent threshold of the transistor constituting the bypass portion can be reduced.

In addition, the amplifying apparatus of the present invention is characterized in that it further comprises a voltage range compensation circuit for extending the voltage range of the in-phase input signal voltage of the voltage-to-current converter. Therefore, the voltage range compensating circuit has characteristics such that the portion outside the input signal voltage range becomes the input signal voltage range by the voltage-current converter alone, thereby widening the in-phase input signal voltage range of the voltage-current converter. do.

In addition, the amplifying apparatus of the present invention includes a second voltage-current converter for converting an input signal voltage into a corresponding current, a second current-voltage converter for converting a current output from the second voltage-current converter into a corresponding voltage; And a third output semiconductor element controlled by the voltage output from the second current-voltage converter and extracting electric charges from the capacitive load. As a result, since the charge is extracted from the capacitive load through the first and third output semiconductor elements, the voltage of the capacitive load can be quickly set to a predetermined voltage.

In addition, the amplifying apparatus of the present invention includes a voltage-current converter, a current-voltage converter, first and second output semiconductor elements, and a control circuit. In particular, the voltage-current converter includes an amplifier stage for amplifying an input signal voltage, And a voltage-current conversion stage for outputting a current corresponding to the output voltage of the first polarity of the amplifier stage. The current-voltage converter consists of a semiconductor element and a first constant current source connected in series with each other. Then, a current corresponding to the output voltage of the first polarity of the amplifier stage is supplied to the connection node of the semiconductor element and the first constant current source via the switch transistor. Accordingly, the voltage corresponding to the current output from the voltage-to-current converter to the connection node is output in accordance with the operation of the switching transistor. The first output semiconductor element controls the discharge operation by extracting charge from the capacitive load by the voltage output from the current-voltage converter based on the current corresponding to the output voltage of the first polarity of the amplifier stage. The second output semiconductor element controls a charging operation for supplying charge to the capacitive load based on the output voltage of the amplifier stage. The control circuit controls the switching transistor based on the output voltage of the amplifier stage.

In this way, since the control circuit controls the switching transistor based on the output voltage of the amplifier stage, the voltage obtained from the current corresponding to the output voltage of the first polarity of the amplifier stage is converted into the first output semiconductor element based on the level of the input signal voltage. It is possible to supply or to stop the supply. In addition, since the discharge and charging of the charge to the capacitive load can be performed quickly through the first and second output semiconductor elements without increasing the power consumption, the potential of the capacitive load can be quickly reduced to a predetermined level. Can be set.

In the amplifying apparatus of the present invention, the control circuit includes a ninth transistor for outputting a current corresponding to the output voltage of the second polarity of the amplifying stage, and a second constant current source connected to the drain of the ninth transistor. do.

In addition, the amplifying apparatus of the present invention is characterized in that a phase compensation resistor is provided in a path through which the first output semiconductor element extracts charge from the capacitive load.

The amplifier according to the present invention is characterized in that a phase compensation capacitor is provided between the gate of the second output semiconductor element and the common connection node of the first and second output semiconductor elements.

In the amplifying apparatus of the present invention, the amplifying stage is a differential amplifier having a positive input stage, so-called voltage polo, in which the second polarity input terminal of the differential amplifier stage and the common connection node of the first and second output semiconductor elements are connected. It is characterized by a war configuration.

Furthermore, the liquid crystal display device of the present invention comprises a source driver having the amplifying device of the invention described above, and a control unit for transmitting control signals to the gate driver, the source driver and the gate driver, and controlling the operation thereof from the source driver and the gate driver. And a liquid crystal display for displaying an image based on the output signal output.

(Example)

EMBODIMENT OF THE INVENTION Hereinafter, embodiment of this invention is described with reference to drawings.

Embodiment 1

BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a block diagram showing the configuration of an amplifying apparatus according to Embodiment 1 of the present invention. In Fig. 1, reference numeral 1 denotes a voltage-current converter for converting an input signal voltage Vin into a current, and reference numeral 4 is always constant. A constant current source through which the current I flows, reference numeral M18 is a transistor connected in series with the constant current source 4 to set the gate voltage at the steady state of the transistor M26 constituting the output circuit, and reference numeral 5 denotes a gate It is an output circuit which consists of the output transistor M26 connected to the input side of the constant current source 4, and whose drain is connected to the capacitive load 80 (capacitor C). Reference numeral 7 denotes an output circuit composed of the transistor M25. In the amplifying apparatus of the present invention, the output circuit 5 controls the discharge operation of the accumulated charge in the capacitive load 80, and the output circuit 7 controls the charging operation of the charge on the capacitive load 80. . The operation of the transistor M26 constituting the output circuit 5 is controlled by the positive output voltage of the amplifying stage in the voltage-current converter 1, while the transistor M25 constituting the output circuit 7 is provided. The operation of is controlled by the negative output voltage of the amplifying stage in the voltage-current converter 1.

Further, the transistor M18 and the constant current source 4 constitute the current-voltage converter 2, and the capacitor C is an equivalent circuit of the capacitive load 80. Then, the bias voltage generation circuit 6 supplies a constant bias voltage Vb to the gate of the transistor M18.

2 is a block diagram showing the overall configuration of a liquid crystal display device including a plurality of source drivers including the amplifying device of the present invention. The liquid crystal display shown in FIG. 2 includes a plurality of liquid crystal cells, a liquid crystal panel LCDP in which signal lines and scanning lines are arranged in sequence, and source drivers SD1,..., SDq, each of which drives a plurality of signal lines. q is an integer greater than or equal to 1), a gate driver (GD1, ..., GDp; where p is an integer greater than or equal to 1) for driving two or more scanning lines, and a source driver (SD1, ..., SDq) and The controller CTRL controls the operation of the gate drivers GD1, ..., GDp. Moreover, each of the source drivers SD1, ..., SDq is formed as one IC.

In the liquid crystal display of FIG. 2, the entire signal line of the liquid crystal panel LCDP is driven by a plurality of source drivers S1, ..., SDq, and as a result, information is displayed on the liquid crystal panel LCDP.

The controller CTRL stores the clock CPH1, the input signal (shift pulse) DI / O11, the digital gradation data DATA, and the load signal LOAD. , SDq). Based on these signals, each of the source drivers SD1, ..., SDq outputs a voltage signal necessary for driving a signal line of the liquid crystal panel LCDP to the liquid crystal panel LCDP. As such, each of the source drivers SD1,..., And SDq sequentially drives the signal lines of the blocks that are part of the horizontal direction of the liquid crystal panel LCDP. The controller CTRL supplies the clock CPH2 and the input signal DI / 021 to the gate drivers GD1,..., GDp. Based on these signals, each of the gate drivers GD1,..., GDp outputs a voltage signal necessary for driving the gate line of the liquid crystal panel LCDP to the liquid crystal panel LCDP.

Each of the source drivers SD1, ..., SDq has a built-in amplifier as a buffer amplifier and corresponds to the amplifiers shown in each embodiment.

3 is a block diagram showing a detailed configuration of each of the source drivers SD1,..., SDq. In Fig. 3, reference numeral 31 is a shift register, which shifts the shift pulses supplied from an external controller CTRL in sequence in synchronization with the transmission clock. Reference numeral 32 denotes a plurality of data latch circuits for latching digital gradation data in synchronization with shift pulses output from the respective output terminals of the shift register 31.

Reference numeral 33 is a load latch circuit, which latches the output of the plurality of data latch circuits 32 in synchronization with the load signal. Reference numeral 34 is a level shifter, which converts the output level of the load latch circuit 33. Reference numeral 35 denotes a D / A converter, which outputs an analog voltage corresponding to the output voltage of the level shifter 34. Reference numeral 36 is a buffer amplifier and corresponds to the amplifier shown in FIG. Reference numeral 37 denotes a bleeder, which generates an analog reference voltage corresponding to the digital gray scale data.

Moreover, the amplifiers of each structure shown in Embodiments 1 to 4 described below can be incorporated into the source driver shown in FIG. 3, which is assembled to the liquid crystal display device shown in FIG.

Next, the operation of the amplifier according to Embodiment 1 shown in FIG. 1 will be described. Since the constant current source 4 always flows a constant current I, the gate voltage of the transistor M26 in the steady state is determined as the current flowing through the transistor M18. That is, since the gate-source voltage Vgs18 of the transistor M18 is determined by the current flowing through the transistor M18, the gate voltage of the transistor M26 is given to Vb-Vgs18. Therefore, the gate bias voltage of the transistor M26 in the steady state is set by adjusting the current flowing through the transistor M18 by the bias voltage Vb applied to the gate of the transistor M18.

Here, in the steady state, if the current output from the voltage-current converter 1 is Iy, the current flowing through the transistor M18 is Iz, and the constant current of the constant current source 4 is I, I = Iy + Iz.

When the level of the input signal voltage Vin changes, the current changes according to the positive output voltage of the amplifying stage in the voltage-current converter 1, and when the change is set to? I, Since the current flowing through the transistor M18 changes by? I with respect to the change in the indicated current, the gate potential of the transistor M26 changes accordingly.

Therefore, when the input signal voltage Vin level changes to increase the current Iy + ΔI output from the voltage-to-current converter 1, the gate voltage of the transistor M26 increases, and the capacitor through the transistor M26 is increased. The current I3 extracted from (C) increases. In particular, if the sum of the maximum value of ΔI and Iy is selected to be larger than the current I supplied from the constant current source 4, no current flows in the transistor M18 when the large input signal voltage changes. In other words, the transistor M18 is turned off, and the gate voltage of the transistor M26 is significantly increased, so that charge can be quickly extracted from the capacitor C. In addition, when the capacity of the condenser C becomes large or when the accumulation charge of the condenser C is increased, the current output from the voltage-current converter 1 is increased or the constant current source 4 is increased. What is necessary is just to make small the current I supplied.

Thus, according to the amplifying apparatus of the first embodiment, the output is based on the current output based on the positive output voltage obtained by the voltage-current converter 1 in accordance with the level of the input signal voltage Vin. The current I3 flows through the transistor M26 by changing the gate voltage of the transistor M26 constituting the circuit 5 to control the discharge operation of the charge from the capacitive load 80. Therefore, compared with the structure of the conventional amplifier shown in Fig. 17, the same capacity capacitive load 80 is driven, for example, it can be reduced to almost half of low current consumption. That is, large capacitive loads can be driven at high speed with low power consumption. Further, according to the level of the input signal voltage Vin, the operation of the transistor M25 constituting the output circuit 7, i.e., the electric charge, is based on the negative output voltage obtained from the voltage-current converter 1. The operation of charging the capacitive load 80 is controlled.

In the case of driving the liquid crystal cell of the liquid crystal display device which is the capacitive load in the amplifying device of the first embodiment, the power consumption is not increased even if the charge is rapidly extracted from the capacitive load and the high-speed display is used. The above effects can be obtained without shortening the driving time of the battery of one portable information processing apparatus.

Embodiment 2

4 is a circuit diagram showing the configuration of the amplifier according to Embodiment 2 of the present invention. However, the same components as those of the amplifying apparatus of Embodiment 1 shown in FIG. 1 are denoted by the same reference numerals, and description thereof is omitted as appropriate.

The amplifying apparatus of Embodiment 2 shown in FIG. 4 uses a voltage-current converter 1-1 for converting a voltage into a current, a constant current source 4 for flowing a constant current, and a resistor R1 from a capacitive load 80. The bias voltage applied to the gate of the output circuit 5 which extracts a charge by a medium, the transistor M18 which sets the gate bias voltage at the time of the transistor M26 which comprises the output circuit 5, and the transistor M18. A bias voltage generation circuit 6 for generating a voltage, an output circuit 7 for supplying charge to the capacitive load 80 via a resistor R1, and a capacitive load 80 in a path including the resistor R1. ), A bypass circuit 8 for extracting charges is provided. This path has a different path configuration than the path including the output circuit 5. Moreover, the resistor R1 is inserted in order to operate stably so that the amplifier does not cause oscillation or the like.

Here, the voltage-current converter 1-1 is a transistor M6, M9 constituting the differential pair, transistors M5, M8 connecting the differential pair to the power supply AVDD, and a differential pair connected to the ground level. A transistor M1 as a current source and transistors M15 and M16 for converting the voltage difference detected by the differential amplifier stage into current are provided. In addition, the positive output voltage of the differential amplifier stage output from the drain of the transistor M9 controls the operation of the transistor M26 constituting the output circuit 5 and is output from the drain of the transistor M6. The negative output voltage controls the operation of the transistor M25 constituting the output circuit 7.

The constant current source 4 has transistors M17 and M19, the bias voltage generating circuit 6 has transistors M20, M21, M22, M23 and M24, and the output circuit 5 has a transistor for charge extraction ( It has M26, the output circuit 7 has the transistor M25 for charge supply, and the bypass circuit 8 has the transistor M27.

Next, the operation of the amplifier of the second embodiment will be described.

The amplifying apparatus of Embodiment 2 shown in FIG. 4 is controlled by the voltage-to-current converter 1-1 based on the signal voltages of the input terminals INP and INM, and supplies electric charges to the capacitive load 80. An output circuit 7 for raising the voltage is provided.

The output circuit 7 can supply electric charge from the power supply AVDD to the capacitive load 80 via the resistor R1 and set the voltage to a predetermined voltage. Of course, similarly to the amplifier according to Embodiment 1 shown in Fig. 1, the output circuit 5 can extract the charge from the capacitive load 80 and drop the voltage down to a predetermined voltage. Therefore, in the amplifying apparatus of the second embodiment, the voltage of the capacitive load 80 can be raised to an arbitrary value corresponding to the input signal voltages of the input terminals INP and INM.

By the way, in the voltage-current converter 1-1, the voltage difference detected by the differential amplifier stage is converted into the current by the transistor M15. However, the drain voltage of the transistor M15 is the transistor M18 only by the transistor M15. Since it is significantly different from the drain voltage of), an error occurs in the output current. For this reason, by connecting the transistor M16 to the transistor M15 in series and bringing the drain voltage of the transistor M18 close to the drain voltage of the transistor M15, the error of the current is suppressed and a stable current is supplied to the constant current source ( 4) and the output to the connection point N1 of the gate of the transistor M26.

This transistor M16 constitutes a compensation circuit which applies an appropriate bias voltage from the bias voltage generating circuit 6 to its gate to suppress an error of the current.

When the error of the current output from the voltage-current converter 1-1 is suppressed by the compensating circuit composed of the transistor M16, there is no error in the gate voltage of the transistor M26, so that the voltage of the capacitive load 80 is reduced. Can be stably set to a predetermined voltage. Thereby, the image displayed on a liquid crystal display device can be stabilized and the image quality can be improved.

In addition, the transistor M27 constitutes the bypass circuit 8. The gate of this transistor M27 is connected to one input terminal INP of the amplifier. Therefore, the bypass circuit 8 performs an operation of extracting the charge of the capacitive load 80 in a path separate from the output circuit 5 based on the voltage difference between the input and output of the amplifier. In other words, the transistor M27 of the bypass circuit 8 extracts the charge of the capacitive load 80, and when turned into a mode in which the voltage is lowered, the transistor M27 turns on to turn on the charge of the capacitive load 80. Is extracted through the resistor R1, and the extracted current flows to the gate of the transistor M26 constituting the output circuit 5. As a result, since the charge of the capacitive load 80 is extracted by a path separate from the output circuit 5, the voltage of the capacitive load 80 can be rapidly set to a predetermined voltage, and high speed operation can be performed.

Further, since the current extracted by the transistor M27 flows to the gate of the transistor M26, the gate potential of the transistor M26 is increased to be extracted from the capacitive load 80 through the transistor M26. The amount of current can be increased rapidly, thereby facilitating high speed operation.

Fig. 5 is a circuit diagram showing another configuration of the amplifier according to the second embodiment of the present invention. In addition to the structure shown in FIG. 4, the structure of the amplifier shown in FIG. 5 further cascades the transistor M28 between the differential pairs (transistors M6 and M9) and the transistor M1, and the gate of the transistor M28. Is directly connected to the gate of the transistor M18 constituting the current-voltage converter 2. In this configuration, the gates of the transistors M1 and M19 are connected to each other, and the two stages of the transistors M28 and M18 are connected, and the output transistors M6 and M9 in the differential amplifier stages are connected. The sum of the output currents of the differential pairs consisting of) can be maintained substantially constant, further improving the accuracy of the voltage-to-current converter.

6 is a circuit diagram showing another configuration of the amplifier according to the second embodiment of the present invention. In the configuration of FIG. 6, the node OUT of the capacitive load 80 and the transistor M27 constituting the bypass circuit 8 are directly connected without the resistor R1. In this manner, the sensitivity increase portion for directly extracting the charge from the capacitive load 80 by the bypass circuit 8 is configured as a path not through the resistor R1, thereby dropping the threshold voltage of the transistor M27 apparently. The sensitivity of the bypass circuit 8 can be raised.

7 is a circuit diagram showing another configuration of the amplifying apparatus according to Embodiment 2 of the present invention. In the configuration shown in FIG. 7, the capacitor C is inserted between the node OUT of the capacitive load 80 and the gate of the transistor M25 constituting the output circuit 7. Instead, the capacitor C is inserted in the configuration of FIG. 4. Resistor R1 is removed. The rest of the configuration is the same as that of the amplifier shown in FIG. In this manner, even when the capacitor C is provided instead of the resistor R1, the same effect that the amplifier can be stably operated so as not to cause oscillation or the like can be obtained.

Furthermore, the amplifier of the present invention may have a configuration in which, for example, the resistor R1 shown in Fig. 4 is combined with the capacitance C shown in Fig. 7, and in this case, the amplifier can be stably operated so as not to cause oscillation or the like. Can be.

8 is a circuit diagram showing another configuration of the amplifying apparatus according to Embodiment 2 of the present invention. In the configuration shown in Fig. 8, the gate of the transistor M9 constituting the differential amplifier stage in the voltage-to-current converter 1-2 is not the input INM, but the output side of the amplifier, i.e., the capacitive load, via the resistor R1. With the configuration connected to the node OUT side of (80), the differential amplifier stage of the voltage-to-current converter 1-2 has a configuration of a voltage follower. In this manner, the same effect can be obtained even when the voltage follower is configured.

FIG. 9 is a circuit diagram showing another configuration of the amplifier of the configuration shown in FIG. 4, in particular, the inverting amplifier stage 10 is provided on the negative output voltage side of the differential amplifier stage in the voltage-current converter 1-3. Of the switching transistor M16 provided on the positive output voltage side of the differential amplifier stage in the voltage-current converter 1-3 using the output of the voltage-current converter stage VI in the inverting amplifier stage 10. Has a configuration to control the operation. Furthermore, reference numeral 9 is a constant current source provided in the inverting amplifier stage 10.

FIG. 10 is a circuit diagram showing the detailed configuration of the amplifier shown in FIG. In FIG. 10, the voltage-current converters 1-3 are transistors M6 and M9 constituting an amplification pair, transistors M5 and M8 and a voltage-current converter 1-1 connecting a differential pair to a power supply AVDD. A transistor M15 and a switch transistor M16 for outputting the current Iy + ΔI from the positive output voltage of the differential amplifier stage 3).

The inverting amplifier stage 10 is composed of a transistor M24 as the voltage-current conversion stage V-I and a transistor M17 as the constant current source 9. Thus, the transistors M17 and M24 constitute the inverting amplifier stage 10, and the inverting amplifier stage 10 is provided on the negative output voltage side of the differential amplifier stage in the voltage-current converter 1-3. Install it. The switch transistor M16 provided on the positive output voltage side of the differential amplifier stage in the voltage-current converter 1-3 using the output of the voltage-current converter stage VI in the inverting amplifier stage 10. To control the operation. That is, the voltage of the connection node of the transistor M24 and the transistor M17 becomes the gate voltage of the switching transistor M16, and the inversion amplifier stage 10 composed of the transistor M24 and the transistor M17 switches as a control circuit. The operation of the transistor M16 is controlled. Moreover, transistor M1 is a current source that connects the differential pair to ground level.

In the amplifier having the configuration shown in Figs. 9 and 10, the transistor M24 in the inverting amplifier stage 10 converts the negative output voltage into a current, and based on the converted current, the voltage-current converter 1 The on / off operation of the switching transistor M16 in -3) is controlled. Therefore, the control for starting or stopping the supply of the voltage to the gate of the transistor M26 in the output circuit 5 based on the current converted from the positive output voltage in accordance with the level of the input signal voltage Vin. Can be done.

Further, the amplifier shown in Figs. 9 and 10 has the same effect as the case of the amplifier shown in Figs. 1 and 4, and the charging and discharging operation of the charge for the capacitive load can be carried out in the output circuit 7 without increasing the power consumption. Since the transistor M25 and the transistor M26 of the output circuit 5 can be performed quickly, the potential of the capacitive load can be set to a predetermined level with low power consumption. Further, in the steady state, the gate bias of the transistor M26 constituting the output circuit 5 can be made constant regardless of the level of the input signal voltage Vin. As a result, the current consumed can be made constant. Further, even when the capacity at the time of change of the input signal voltage Vin is increased, that is, even when the size of the transistor M15 is increased, the current consumption does not increase.

FIG. 11 is a circuit diagram showing another detailed configuration of the amplifier shown in FIG. In the configuration shown in FIG. 11, the capacitor C is inserted between the node OUT of the capacitive load 80 and the gate of the transistor M25 constituting the output circuit 7, and instead the resistor R1 is removed. It is. The rest of the configuration is the same as that of the amplifier shown in FIG. In this way, even when the capacitor C is provided instead of the resistor R1, the amplifier can be stably operated so as not to cause oscillation or the like, thereby obtaining the same effect.

Furthermore, the amplifier of the present invention may have a configuration in which, for example, the resistor R1 shown in Fig. 10 is combined with the capacitance C shown in Fig. 11, and in this case, the amplifier can be stably operated so as not to cause oscillation or the like. Can be.

FIG. 12 is a circuit diagram showing another detailed configuration of the amplifier shown in FIG. In the configuration shown in FIG. 12, the gate of the transistor M9 constituting the differential amplifier stage in the voltage-to-current converter 1-4 is connected to the node of the capacitive load 80 via the resistor R1 instead of the input INM. With the configuration connected to the OUT side, the differential amplifier stage of the voltage-to-current converters 1-4 has the configuration of the voltage follower. In this manner, the same effect can be obtained even when the voltage follower is configured.

The voltage-current converter 1 shown in FIG. 1 and the voltage-current converter shown in FIG. 4 even when the voltage-current converters 1-3 and 1-4 having the configuration shown in FIGS. 9 to 12 are assembled into the amplifier. Almost the same effect as in the case of (1-1) can be obtained, but the amplifying device shown in Figs. 1 and 4 to 8 has a higher input signal voltage than the amplifying device shown in Figs. It is possible to respond more quickly to the change of Vin), and can be applied to a liquid crystal display device or the like requiring high responsiveness.

Embodiment 3

Fig. 13 is a circuit diagram showing the construction of an amplifier according to Embodiment 3 of the present invention. However, the same components as those of the amplifier of Embodiment 2 shown in Fig. 4 are denoted by the same reference numerals, and the description thereof is omitted.

The amplifier shown in FIG. 13 includes a voltage range compensating circuit surrounded by a broken line with reference numeral 30.

The voltage range compensating circuit 30 is composed of transistors M2, M3, M4, M7, M10, M11, and M13. In particular, the transistors M2 and M4 constitute the differential amplifier stages. And a P-type MOS transistor having a reverse polarity with M14), thereby extending the in-phase input voltage range of the voltage-to-current converter 1-1.

In the amplifying apparatus having no assembled voltage range compensating circuit 30, the input voltage range of the voltage-to-current converter 1-1 is shown by an oblique line in Fig. 14A, but this voltage range compensating circuit 30 is used. In the amplifying device of FIG. 14B, the input voltage range of the voltage-current converter 1-1 can be extended, as shown by the diagonal line in FIG. 14B. Therefore, in the amplifying apparatus of the third embodiment, when the effective input voltage range is the same, the power supply voltage AVDD can be lowered by that much, and the power can be reduced.

Embodiment 4

Fig. 15 is a circuit diagram showing the construction of an amplifier according to Embodiment 4 of the present invention. In the amplifying apparatus of Embodiment 3 shown in Fig. 13, a voltage-current converter comprising a voltage-current converter 1-1 and a voltage range compensation circuit 30, a current-voltage converter 2 provided correspondingly, Although the output circuit 5 is provided, in the amplifier of Embodiment 4, the current-voltage converter is composed of the same voltage-current converters 1-5 and Embodiments M1 and M19 provided correspondingly to Embodiment 3, respectively. And a current-voltage converter consisting of a voltage-current converter 1-6, and transistors M153 and M154 provided correspondingly, in addition to the output circuit 5 composed of the transistor M26, and the transistor M152. An output circuit 11 is further provided.

In this case, the voltage-to-current converter 1-5 may use the transistors M131, M132, M133, M134, M134, M135, M136, M137, M138, M139, M140, M141, M142, M143, M144, M145, and M146. Have On the other hand, the voltage-to-current converter 1-6 includes transistors M147, M148, M149, M150, and M151.

The output circuit 5 has a transistor M26, the output circuit 7 has a transistor M25, and the output circuit 11 has a transistor M152.

Next, the operation of the amplifier according to the fourth embodiment will be described.

The voltage-current converters 1-5 and the output circuits operate in the same manner as in the third embodiment shown in FIG.

In the amplifier device of the fourth embodiment, the gate voltage of the transistor M152 constituting the output circuit 11 is controlled by the current output from the voltage-current converter 1-6, and the output circuit 5 and the output circuit are further controlled. Through (11), an operation of extracting charges at high speed from the capacitive load 80 is performed.

That is, in the amplifying apparatus of the fourth embodiment, since the extraction of the charge from the capacitive load 80 is performed through the output circuit 5 and the output circuit 11, the charge is extracted from the capacitive load 80. Since the speed is improved, it is possible to perform high speed operation.

Further, since the transistors M148 and M150 constituting the differential pair of the voltage-current converters 1-6 supply electric charge to the capacitive load 80, the transistors M25 constituting the output circuit 7 By setting the same polarity, the charge extraction characteristic of the output circuit 11 has the characteristic indicated by reference numeral 1 in Fig. 16A. This characteristic is different from the charge extraction characteristic of the output circuit 5 indicated by reference numeral 2 in Fig. 16A. 16A and 16B, the vertical axis represents charge amount and the horizontal axis represents charge extraction time.

The comprehensive charge extraction characteristics including the output circuits 5 and 11 are as shown in Fig. 16B, but the drop is abrupt.

Thus, in the amplifier according to the fourth embodiment, the charge extraction characteristics combined with the output circuits 5 and 11 are obtained at the respective differential amplifier stages in the voltage-current converter 1-5 and the voltage-current converter 1-6. The voltage difference detected is steep even in a small range, the voltage drop of the capacitive load 80 is steep, and the voltage of the capacitive load 80 can be rapidly set to a predetermined voltage, thereby obtaining characteristics suitable for high speed operation. .

As described above, according to the present invention, the first output semiconductor element discharges the charge in the capacitive load based on the first polarity output voltage of the amplifier stage (i.e., the differential amplifier stage) in the voltage-current converter constituting the amplifier. Operation of the second output semiconductor element which charges the charge into the capacitive load based on the output voltage of the second polarity different from the first polarity of the amplifier stage. In addition, the current obtained from the voltage-current converter in accordance with the input signal voltage is converted into a voltage by the current-voltage converter to drive the first output semiconductor element, so that a large capacitive load can be quickly driven with low power consumption. In addition, since the operation of the switching transistor for turning on / off the output obtained from the voltage-current converter based on the output voltage of the first polarity is controlled by the control circuit based on the output voltage of the amplifier stage, the level of the input signal voltage Accordingly, the operation of the first output semiconductor device can be controlled.

Further, according to the present invention, by supplying charge to the capacitive load (charging) or extracting the charge from the capacitive load (discharging), the potential of the capacitive load can be set at a high speed at a predetermined level according to the input signal voltage. have.

Further, according to the present invention, the capacitive load can be set to a predetermined voltage with high accuracy, and when the capacitive load is a liquid crystal cell of the liquid crystal display device, the display image can be stabilized and the quality thereof can be improved.

In addition, according to the present invention, since the charge can be extracted from the capacitive load through the bypass section outside the output semiconductor element, the voltage of the capacitive load can be set to a predetermined voltage more quickly.

In addition, according to the present invention, since the sensitivity of the bypass unit is increased, the response of the voltage change of the capacitive load to the change of the input signal voltage can be improved.

In addition, according to the present invention, if the effective input voltage range is the same, the power supply voltage can be dropped and the power can be reduced by that much.

Further, according to the present invention, the charge accumulated in the capacitive load can also be extracted from the third output semiconductor element provided in addition to the first output semiconductor element, so that the voltage of the capacitive load can be set to a predetermined voltage at high speed.

Claims (16)

A voltage-current converter comprising an amplifier stage for amplifying an input signal voltage, and a voltage-current converter stage for outputting a current corresponding to a positive output voltage of the amplifier stage; A semiconductor element and a constant current source connected in series with each other, and a current corresponding to the positive output voltage of the amplifying stage is supplied to a connection node between the semiconductor element and the constant current source, and is connected to the connection node from the voltage-current converter. A current-voltage converter for outputting a voltage corresponding to the output current; A first output transistor for controlling a discharge operation of extracting charge from a capacitive load by a voltage output from the current-voltage converter based on a current corresponding to a positive output voltage of the amplifier stage; And a second output transistor for controlling a charging operation for supplying charge to the capacitive load based on the negative output voltage of the amplifier stage. The amplification method of claim 1, wherein when the input signal voltage input to the voltage-current converter is 0, the output current output from the voltage-current converter is smaller than the constant current flowing through the constant current source. Device. The voltage-current converter of claim 1 or 2, wherein the voltage-current converter includes: a differential pair having a configuration in which the first and second transistors are differentially coupled; Third and fourth transistors for connecting each gate in common, connecting each source to a power supply line, and connecting each drain to drains of the first and second transistors, A fifth transistor whose gate is connected to one of the drains of the first and second transistors and converts the voltage obtained in the differential pair into a current; And a sixth transistor having a drain connected to the source of both the first and second transistors, the sixth transistor supplying a constant current to the differential pair. 4. The amplifier of claim 3, wherein the voltage-current converter further includes a compensation circuit having a source connected to the drain of the fifth transistor and comprising a seventh transistor for suppressing an error of an output current. 4. The amplifier of claim 3, wherein the voltage-to-current converter further comprises an eighth transistor cascaded between the differential pair and the sixth transistor. The amplifier according to claim 1 or 2, wherein a resistor for phase compensation is provided in a path through which said first output transistor extracts electric charge from said capacitive load. The amplifying apparatus according to claim 1 or 2, further comprising a bypass unit for bypassing and extracting the charge of the capacitive load by a path separate from the first output transistor. The amplifying apparatus according to claim 7, wherein the bypass unit extracts the charge of the capacitive load from a path in which one end thereof is directly connected to the capacitive load. The amplifying apparatus according to claim 1 or 2, further comprising a voltage range compensating circuit for extending the voltage range of the in-phase input signal of the voltage-current converter. A second voltage-to-current converter for converting the input signal voltage into a corresponding current; A second current-voltage converter for converting a current output from the second voltage-current converter into a corresponding voltage; And a third output semiconductor element controlled by the voltage output from the second current-voltage converter and extracting charge from the capacitive load. A voltage-current converter comprising an amplifier stage for amplifying an input signal voltage, and a voltage-current converter stage for outputting a current corresponding to a positive output voltage of the amplifier stage; A semiconductor element and a first constant current source connected in series with each other, and a current corresponding to the positive output voltage of the amplifier stage is supplied to a connection node between the semiconductor element and the first constant current source via a switching transistor; A current-voltage converter outputting a voltage corresponding to the current output from the voltage-current converter to the connection node according to the operation of the switching transistor; A first output transistor for controlling a discharge operation of extracting charge from a capacitive load by a voltage output from the current-voltage converter based on a current corresponding to a positive output voltage of the amplifier stage; A second output transistor for controlling a charging operation for supplying charge to the capacitive load based on a negative output voltage of the amplifying stage; And a control circuit for controlling the operation of the switching transistor based on the negative output voltage of the amplifier stage. 12. The amplifier of claim 11, wherein the control circuit comprises a ninth transistor for outputting a current corresponding to a negative output voltage of the amplifier stage, and a second constant current source connected to the drain of the ninth transistor. . The amplifier according to claim 11 or 12, wherein a resistor for phase compensation is provided in a path through which the first output transistor extracts charge from the capacitive load. 12. The amplifier according to claim 1 or 11, wherein a capacity for phase compensation is further provided between the gate of the second output transistor and the common connection node of the first and second output transistors. 12. The amplification stage according to claim 1 or 11, wherein the amplifying stage is a differential amplifier having an input terminal of a positive stage, and a negative input terminal of the differential amplifier stage and a common connection node of the first and second output transistors are connected. Device. A source driver comprising the amplifier according to claim 1 or 11, Gate Driver, A control unit which sends a control signal to the source driver and the gate driver and controls their operation; And a liquid crystal display for displaying an image based on an output signal output from the source driver and the gate driver.