KR100390544B1 - Harmonic Mixer Circuit Having Improved DC Offset and Linearity - Google Patents

Abstract

According to the present invention, a mixer circuit comprising a first circuit comprising a first active element and a second active element having first to third terminals and a second circuit comprising a third active element and a fourth active element. Is provided. The second terminals of the first and second active elements are connected to each other and connected to the second power supply through the second terminal side first bias and impedance portions, and the second terminals of the third and fourth active elements are connected to each other and the second It is connected with a 2nd power supply via the terminal side 2nd bias and an impedance part, The 1st terminal of a 1st and 4th active element is connected with a 1st input terminal and a 2nd input terminal, respectively, The 1st of a 2nd and 3rd active element The terminals are connected to each other and connected to the third input terminal, and the first terminals of the first to fourth active elements are connected to the first voltage through the first to fourth bias and impedance parts, respectively, to maintain a predetermined operating bias voltage. The connection point of the third terminal of the first and third active elements is connected with the first power supply through the first output end and the first output side bias and impedance part, and the connection point of the third terminal of the second and fourth active elements is the second output end. And Article 2 is connected to the first power supply via the output side bias and impedance section.

Description

Harmonic Mixer Circuit Having Improved DC Offset and Linearity

TECHNICAL FIELD The present invention relates to a mixer circuit, and more particularly, to improvement of DC offset and nonlinearity of a mixer circuit that can be used in a direct receiver or the like.

Recently, with the spread of portable wireless telephones, there has been a demand for miniaturization, low power consumption, and low cost of terminals. Accordingly, a direct conversion receiver is widely used. Using a direct conversion receiver, there is no image frequency component, and thus no need for a band pass filter (BPF) type channel filter, which is essential for a superheterodyne receiver. Instead, a low band filter (LPF) is used as the channel filter. Therefore, the integrated circuit manufacturing process is easy.

Direct conversion receivers basically convert the input high frequency signals directly into baseband frequency signals. This may correspond to the case where the intermediate frequency is 0 Hz in the superheterodyne receiver. Thus, in order to directly convert an input high frequency signal to a baseband frequency signal, a local oscillator (LO) signal of approximately the same frequency as the input frequency is generated and mixed with the input frequency. FIG. 1 is a diagram illustrating an input signal having a carrier frequency of ω _RF , an LO signal having a frequency of ω _LO , and a baseband signal generated by mixing these signals in the frequency domain. 2 is a circuit diagram illustrating a mixer 205 and associated circuits for mixing the input signal 201 and the LO signal 203.

As shown in FIG. 1, by mixing a LO signal of the same frequency (ω _LO ) as the carrier frequency (ω _RF ) of the RF modulated signal using a mixer, an intermediate frequency (ω _IF ) signal having a frequency of 0 Hz is generated. do. The intermediate frequency signal having a frequency of 0 Hz generated by mixing the carrier frequency and the LO signal includes a baseband frequency signal, an LO frequency (ω _LO ) signal, a carrier frequency (ω _IF ) signal, and a LO frequency and a carrier frequency. The sum frequency (ω _LO + ω _IF ) signal and the frequency (| ω _LO -ω _IF |) signal component of the difference between the LO frequency and the carrier frequency. Of these components, except for the baseband frequency signal, as shown in FIG. 2, the signal is blocked through the low band filter 207, whereby the frequency of the difference between the information signal and the LO frequency and the carrier frequency (| ω _LO -ω _IF It is possible to extract only signal components.

Such a direct conversion receiver has some problems as follows.

First, the direct conversion receiver has a DC offset voltage problem caused by mixing of the same frequency signal.

The cause of such a DC offset will be described. As shown in FIG. 2, due to the nature of the hardware, part of the LO signal leaks through the high frequency signal input terminal of the mixer 205. The leaked LO signal is reflected by the output port of the high frequency signal amplifier 209 and the antenna 211. The reflected LO signal is mixed with the LO signal in the mixer to appear as a DC component in the output signal. This is called the dynamic DC offset. The amount of dynamic DC offset largely depends on the reflectance at the high frequency signal amplifier 209 and the antenna. The reflectance is variable according to the amplification factor of the high frequency signal amplifying unit 209, and therefore, the transfer time of the dynamic DC offset is variable depending on the time.

As another cause of the DC offset, in the case of a so-called balanced mixer, in which the frequency (| ω _LO -ω _IF |) signal component of the difference between the LO frequency and the carrier frequency is configured to acquire signals in phase and antiphase, An asymmetry between circuits that contributes to the signals of the out of phase and the out of phase is mentioned. That is, the normal and antiphase signals of the frequency signal of the difference between the carrier frequency ω _RF of the high frequency signal and the frequency ω _LO of the LO signal are asymmetrically generated, resulting in a DC offset. This is called static DC offset.

This DC offset remains an undesirable component in the output signal and is one factor that degrades the characteristics of a direct conversion receiver using a mixer. Therefore, it is necessary to remove the DC offset voltage present in the mixer.

Second, the direct conversion receiver has a problem due to the secondary intermodulation (IMD2) component. Most mixer circuits are implemented by active elements. Active elements exhibit non-linear characteristics, especially when high frequency signals are input.

This nonlinear characteristic is approximated by power series. Since the most important component of the even order component among the components approximated by the power series is the secondary water supply component, the even order component can be approximated to the secondary water supply component.

However, the above nonlinear characteristics of the mixer circuit are known as one of the major factors that degrade the performance of the entire direct receiver circuit.

It is an object of the present invention to provide a mixer circuit with a DC offset removed.

It is another object of the present invention to provide a mixer circuit with improved DC non-linear characteristics, especially non-linear characteristics due to superior order components.

According to one feature of the invention, a third terminal comprising a first terminal, a second terminal, and a third terminal, based on the magnitude of the voltage applied between the first terminal and the second terminal, from the second terminal to the third terminal. Provided is a mixer circuit comprising a first circuit comprising a first active element and a second active element and a second circuit comprising a third active element and a fourth active element in which the magnitude and direction of the current flowing in the furnace varies. . The second terminals of the first active element and the second active element are connected to each other and to a second power source through a second terminal side first bias and impedance unit, and the second terminal of the third active element and the fourth active element. The two terminals are connected to each other and are connected to the second power supply through a second bias side and a second impedance side of the terminal, and the first terminals of the first active element and the fourth active element are connected to the first input terminal and the second input terminal, respectively. The first terminals of the second active element and the third active element may be connected to each other to be connected to a third input terminal, and the first terminals of the first to fourth active elements may be formed of a first bias and an impedance unit, respectively. A predetermined operating bias voltage is maintained by being connected to the first voltage through the fourth bias and impedance unit, and a connection point of the third terminal of the first active element and the third active element is connected to the first output terminal. And a first power source via a first output side bias and impedance unit, and a connection point of the third terminal of the second active element and the fourth active element to the first power source through a second output terminal and a second output side bias and impedance unit. Connected.

According to another feature of the present invention, there is provided a first terminal, a second terminal, and a third terminal, and the third terminal from the second terminal based on the magnitude of the voltage applied between the first terminal and the second terminal. Provided is a mixer circuit comprising a first circuit comprising a first active element and a second active element and a second circuit comprising a third active element and a fourth active element in which the magnitude and direction of the current flowing in the furnace varies. . The second terminals of the first active element and the second active element are connected to each other and to the first power source through a first source side bias and impedance unit, and the second terminal of the third active element and the fourth active element. Are connected to each other and are connected to the first power source through a second source side bias and impedance unit, and the first terminals of the first active element and the fourth active element are respectively connected to the first high frequency input terminal and the second high frequency input terminal, The first terminals of the second active element and the third active element are connected to each other and are connected to a local oscillator (LO) signal input terminal, and the first terminals of the first to fourth active elements are first bias and impedance, respectively. The first to third active elements are connected to the first voltage through the fourth to fourth bias and impedance parts to maintain a predetermined operating bias voltage. The connection point of the third terminal of is connected to the second power supply through the first output terminal and the first output side bias and impedance section, and the connection point of the third terminal of the second active element and the fourth active element is the second output terminal and the second output side. It is connected to the second power supply via a bias and impedance section.

According to another feature of the invention, the third terminal having a first terminal, a second terminal, and a third terminal, based on the magnitude of the voltage applied between the first terminal and the second terminal from the second terminal A first circuit including a first type first active element and a second active element and a second circuit including a first type third active element and a fourth active element varying in magnitude and direction of current flowing through the terminal; A first circuit and a second type third active element and a fourth circuit including a first type circuit unit and a second type first to second active element having complementary characteristics to the first to fourth active elements A mixer circuit is provided that includes a second type circuit portion that includes a second circuit that includes an active element. The second terminals of the first type first active element and the second active element are connected to each other and to the second power source through the first type bias terminal and the first bias side of the first type second terminal, and the first type third active The second terminals of the device and the fourth active device are connected to each other and connected to the second power supply through the first bias-side second bias and impedance part of the first type, and the second type first active device and the second active device. The second terminals of are connected to each other and are connected to a first power source through a second biasing-side first bias and impedance section of the second type, and the second terminals of the second type third active element and the fourth active element are mutually Connected to the second power supply via a second bias and impedance section of a second type second terminal, connecting points of the first terminals of the first active elements of the first type and the second type, and the first type and the first type First of the fourth active element of type 2 The connection points of the terminals are respectively connected to the first high frequency input terminal and the second high frequency input terminal, and the first terminals of the second active element and the third active element of the first type and the second type are connected to each other so that the local oscillator (LO) signal is connected. It is connected to the input terminal, and the first terminals of the first type and second type active elements to the fourth active element is the first bias and impedance unit to the fourth bias and impedance unit and the first type on the first type first terminal side, respectively. A first operating voltage is maintained by being connected to the first voltage through the second type first terminal side through the first bias and impedance parts through the fourth bias and impedance parts, and the first and second type first active elements and the third type; The connection point of the third terminal of the active element is connected to the first power supply through the first output terminal and the first output side bias and impedance part, and the third of the first type and second type second active element and the fourth active element. Party connection point is connected to the first power supply through the second output terminal and the second output-side bias, and impedance.

1 illustrates an input signal having a carrier frequency of ω _RF , an LO signal having a frequency of ω _LO , and a baseband signal generated by mixing these two signals in a frequency domain.

2 is a circuit diagram showing a mixer 205 and associated circuits for mixing an input signal and an LO signal 203.

3 is a circuit diagram illustrating one embodiment of a mixer circuit with a DC offset cut off in accordance with the present invention.

4 is a circuit diagram showing a circuit complementary to the embodiment shown in FIG. 3 using a P-type MOSFET having characteristics complementary to that of the N-type MOSFET.

FIG. 5 shows the first derivatives (gm ') of drain current (I _DS ), transconductance (gm), and transconductance (gm) versus gate source voltage Vgs for mutually complementary active devices. One graph.

6 shows a circuit in which drains of an N-type MOSFET and a P-type MOSFET are connected to each other, and a first derivative of a transconductance of both devices is biased in a region having a maximum value and a minimum value, and a first derivative of both devices of the circuit. Graph showing (gm ') values.

7 is a circuit diagram illustrating a mixer circuit with improved linearity using active elements complementary to each other, in accordance with a preferred embodiment of the present invention.

<Description of the symbols for the main parts of the drawings>

Qn11: first active element of the first type mixer circuit

Qn12: second active element of the first type mixer circuit

Qn21: third active element of the first type mixer circuit

Qn22: fourth active element of the first type mixer circuit

Qp11: first active element of the second type mixer circuit

Qp12: second active element of the second type mixer circuit

Qp21: third active element of the second type mixer circuit

Qp22: fourth active element of the second type mixer circuit

Embodiment of the mixer circuit

3 is a circuit diagram illustrating one embodiment of a mixer circuit with a DC offset cut off in accordance with the present invention.

The mixer circuit according to the present invention uses four active elements Qn1, Qn2, Qn3 and Qn4. Each active element Qn has a gate gn, a source sn and a drain dn. The active element Qn is characterized in that the amount and direction of the current flowing from the source sn to the drain dn or vice versa is determined according to the magnitude and polarity of the voltage applied to the gate gn and the source sn. Has Such active devices include bipolar junction transistors (BJTs), junction field effect transistors (JFETs), metal oxide semiconductor field effect transistors (MOSFETs), and metal semiconductor field effect transistors (MESFETs).

Some active devices have a characteristic of further including a body terminal bn in addition to the gate gn, the source sn, and the drain dn. Depending on the magnitude and polarity of the voltage applied between the gate gn and the body terminal bn, the amount and direction of the current flowing from the source sn to the drain dn or vice versa are determined. Such active devices include metal oxide semiconductor field effect transistors (MOSFETs).

In the following description, the description will focus on the MOSFET. However, the spirit of the present invention is applicable to all active devices that can be used as amplifiers as well as MOSFETs. Therefore, although the description is centered on the MOSFET herein, the concept and scope of the present invention is not limited to the MOSFET.

As shown in FIG. 3, the amplification circuit having improved linearity according to the present invention includes a first mixer circuit including a first active element Qn1 and a second active element Qn2, a third active element Qn3, and And a second mixer circuit comprising a fourth active element Qn4. In FIG. 3, all of the active elements Qn1, Qn2, Qn3, and Qn4 are illustrated as N-type MOSFETs. In the following description, the case of the N-type MOSFETs will be described. However, it will be apparent to those skilled in the art that a circuit complementary to the circuit shown in FIG. 3 can be implemented using an element complementary to the N-type MOSFET, which will be described later.

The first mixer circuit and the second mixer circuit take the structure of a source-coupled pair. That is, in the first mixer circuit, the sources of the first active element Qn1 and the second active element Qn2 are connected to each other and connected to the second power supply through a predetermined source side bias and impedance unit Zsn1. Also in the second mixer circuit, the sources of the third active element Qn1 and the fourth active element Qn2 are connected to each other and to the second power supply through a predetermined source side bias and impedance portion Zsn2. According to a preferred embodiment of the invention, it can be grounded instead of being connected to a second power source.

Gates of the first active element Qn1 and the fourth active element Qn4 are connected to the first high frequency input terminal RF− and the second high frequency input terminal RF +, respectively. Gates of the first active device and the fourth active device are supplied with a first power source through gate side bias and impedance units Zgn1 and Zgn2 to maintain an operating bias voltage, respectively.

In order for the embodiment shown in FIG. 3 to operate as a mixer circuit, it is preferable that a high frequency signal having a phase inverted from each other is input to the first high frequency input terminal RF- and the second high frequency input terminal RF +. The high frequency signals input to the first high frequency input terminal RF- and the second high frequency input terminal RF + are signals in which an information signal is modulated by a carrier wave having a predetermined high frequency. In this specification, the frequency of the carrier wave for modulating the information signal is assumed to be ω _RF .

Gates of the second active element and the third active element are connected to each other and to the LO frequency input terminal LO. The first power is supplied to the gates of the second active device and the third active device through the gate side bias and impedance unit Zgn3 to maintain the operating bias voltage.

In order for the embodiment shown in FIG. 3 to operate as a mixer circuit, it is preferable that the frequency ω _LO of the signal input to the LO frequency input terminal _LO is 1/2 of the carrier frequency ω _RF . The LO frequency signal can be generated via the local oscillator.

As described above, the first power is supplied to the gates of the first to fourth active devices through the gate side bias and impedance units Zgn1, Zgn2, Zgn3, and Zgn4 to maintain the operating bias voltage. This operating bias voltage is appropriately set according to the type of the first to fourth active elements. For example, in FIG. 3, when the first to fourth active elements are N-type MOSFETs, DC voltages between the gate sources of the N-type MOSFETs are maintained so that each active element can operate in a desired operating region. Be sure to In this specification, this is referred to as an N-type MOSFET bias voltage (NMOS_BIAS).

The source voltage Vsn and the body voltage Vbn are applied to the source terminal and the body terminal of each of the active elements Qn1, Qn2, Qn3, and Qn4. According to a preferred embodiment of the present invention, a bias portion connected to the power supply is connected between the power supply and the source terminal and the body terminal of each active element Qn. Accordingly, the source voltage Vsn and the body voltage Vbn are adjusted from the power supply through the bias portion. In this specification, a bias portion connected between a power supply, a source terminal, and a body terminal is referred to as an operating point bias portion.

The output terminals of the first mixer and the second mixer are cross-connected with each other. That is, the drains of the first active element and the third active element are connected to each other and to the first output terminal IF−. The drains of the second active element and the fourth active element are connected to each other and to the second output terminal IF +. The final output may be obtained by differentially separating the signals of the first output terminal IF− and the second output terminal IF + from each other.

The connection point of the drain of the first active element and the third active element is connected to the first power supply through a predetermined drain side bias and impedance portion Zdn1. The connection point of the drain of the second active element and the fourth active element is connected to the first power supply through a predetermined drain side bias and impedance portion Zdn2. In this specification, the bias portion connected between the drain and the output stage is referred to as an output side bias portion.

As described above, the high frequency signals RF- and RF + having inverted phases are input to the first mixer circuit and the second mixer circuit. The same LO signal LO is input to the first mixer circuit and the second mixer circuit. It is preferable that the frequency ω _LO of the signal input to the LO frequency input terminal _LO is substantially 1/2 of the carrier frequency ω _RF . At this time, the output of the entire circuit, that is, the differential signal of the first output terminal IF- and the second output terminal IF + has the form of a stream of pulses having a narrow width. At this time, the width of the pulse stream is proportional to the amplitude of the RF signal.

According to the circuit shown in Fig. 3, the output signal of the entire circuit is in the form of a pulse width modulated signal modulated with a width proportional to the amplitude of the RF signal. Thus, the output signal contains only the desired baseband signal contained in the frequency signal modulated with the carrier signal having a frequency of ω _RF , and substantially no unwanted LO signal components. This means that the DC offset is improved.

In addition, when the first mixer circuit and the second mixer circuit have substantially the same scale and structure, the LO signal component hardly leaks to the first high frequency input terminal RF- and the second high frequency input terminal RF +. In particular, this effect can be achieved by forming both active elements constituting the first mixer circuit and the second mixer circuit on the same layer on the same substrate.

FIG. 4 shows a circuit complementary to the embodiment shown in FIG. 3 using a P-type MOSFET having characteristics complementary to that of the N-type MOSFET.

Since the circuit illustrated in FIG. 4 is complementary to the circuit illustrated in FIG. 3, the above description of FIG. 3 may be applied as it is.

Also in the embodiment shown in FIG. 4, the gates of the first to fourth active elements are supplied with first power through the gate side bias and impedance parts Zgp1, Zgp2, Zgp3, and Zgp4 to maintain the operating bias voltage. Be sure to This operating bias voltage is appropriately set according to the type of the first to fourth active elements. For example, in FIG. 4, when the first to fourth active elements are P-type MOSFETs, DC voltages between the gate sources of the P-type MOSFETs are maintained so that each active element can operate in a desired operating region. Be sure to In the present specification, this is referred to as a P-type MOSFET bias voltage (PMOS_BIAS).

In addition, in the embodiment shown in Fig. 3, in the first mixer circuit, the sources of the first active element Qn1 and the second active element Qn2 are connected to each other so that a predetermined source side bias and impedance portion Zsn1 is provided. Is connected to the second power supply, and in the second mixer circuit, the sources of the third active element Qn1 and the fourth active element Qn2 are connected to each other through a predetermined source side bias and impedance unit Zsn2. The connection with the second power source has been described. In Fig. 4, in the first mixer circuit, the sources of the first active element Qp1 and the second active element Qp2 are connected to each other so that the first power source and the first power supply are connected through a predetermined source side bias and impedance unit Zsp1. In the second mixer circuit, the sources of the third active element Qp1 and the fourth active element Qp2 are connected to each other and connected to the first power source through a predetermined source side bias and impedance unit Zsp2. It is preferable.

3, the connection point of the drain of the 1st active element Qn1 and the 3rd active element Qn3 is connected with the 1st power supply through the predetermined | prescribed drain side bias and impedance part Zdn1, and the 2nd active element The connection point of the drain of the element Qn2 and the fourth active element Qn4 is connected to the first power supply through a predetermined drain side bias and impedance portion Zdn2. In FIG. 4, the connection point of the drain of the 1st active element Qp1 and the 3rd active element Qp3 is connected with the 2nd power supply through the predetermined drain side bias and impedance part Zdp1, and the 2nd active element ( The connection point of the drain of Qp2) and the fourth active element Qp4 is connected to the second power supply via a predetermined drain side bias and impedance portion Zdp2.

In this embodiment and throughout this specification, the first power source is, for example, a + power source. According to a preferred embodiment of the present invention, the + power supply is a power supply capable of supplying a standardized amount of voltage, such as +3 V, +5 V. The second power supply is, for example, a-power supply. According to a preferred embodiment of the present invention, the power source is a power supply capable of supplying a standardized amount of voltage, such as -3 V, -5 V. In some cases, it is also possible to set either one of the first power supply or the second power supply to ground and the other to the + or-power supply. Such modifications do not reduce the concept of the present invention.

Embodiment of the mixer circuit with improved IMD2

In the embodiments shown in Figures 3 and 4, the main nonlinearity of the overall circuit may be due to the nonlinearity of the transconductance (gm) of the active device.

When an input signal having two frequency components (f1, f2) is applied to a general nonlinear circuit, 2 * f1, 2 * f2, f1-f2, f1 + f2, 3 * in addition to the frequency applied to the input by the nonlinearity of the circuit itself Frequency components such as f1, 3 * f2, 2 * f1-f2, 2 * f2-f1, 2 * f1 + f2, and 2 * f2 + f1 are generated.

Frequency components due to such nonlinearity are usually removed by a filter around the desired frequency to be obtained from the output.

In applications where the input frequencies f1 and f2 are approximately equal, and the desired frequency is set to baseband during output, the components of f1-f2 that are nearly equal to the baseband frequency among the frequency components due to nonlinearity are almost never removed by the filter. Do not. These components appear to interfere with each other between channels having a small frequency difference, or the signals in the signal band may be distorted by mutual interference. Such f1-f2 components are referred to as 2nd order intermodulation distortion (IMD2). The relationship between the amount of IMD2 and the amount of amplified input frequency can indicate the linearity of the circuit. The value representing the linearity of such a circuit is called a second order intercept point (IP2).

3 and 4, the drain current of the active device may be expressed as having a relationship between the gate source voltage Vgs and the transconductance gm as shown in Equation 1 below.

In Equation 1, the coefficient of the product of the gate-to-gate voltage (v _gs ² ), that is, the first derivative of gm of the gate-to-gate source voltage of the active element, gm 'is the second order intermodulation distortion (IMD2) and It is known to greatly affect the secondary intercept point (IP2).

FIG. 5 shows the first derivatives (gm ') of drain current (I _DS ), transconductance (gm), and transconductance (gm) versus gate source voltage Vgs for mutually complementary active devices. One graph. Although FIG. 1 shows graphs for P-type and N-type MOSFETs, a graph similar to that of FIG. 1 can be obtained for any active device in which the drain current characteristics of the gate-source voltages are similar to those shown in FIG.

As can be seen from FIG. 5, active elements complementary to each other have a characteristic in which the drain current I _DS , the transconductance gm, and the first derivative of the transconductance gm are substantially symmetrical to each other. Has In addition, the first derivative (gm ') of the transconductance (gm') of the N-type MOSFET has a maximum value in a region where the gate-to-gate voltage has a positive predetermined voltage value (V _GSN ), and the transconductance of the P-type MOSFET The first derivative (gm ') of (gm) has a minimum value in the region where the gate-to-gate voltage has a negative predetermined voltage value (V _GSP ). In a practical embodiment of the present invention, a voltage obtained by subtracting the threshold voltage (V _TH ) from the gate source voltage (V _GSN ) where the first derivative (gm ') of the transconductance (gm') of the N-type MOSFET has a maximum value ( V _GSN -V _TH ) was approximately 0.3 V, and the first derivative (gm ') of the transconductance (gm') of the P-type MOSFET was obtained by subtracting the threshold voltage (V _TH ) from the voltage (V _GSP ) having a minimum value ( V _GSP -V _TH ) was approximately -0.2 V. As such, the N-type MOSFET and the P-type MOSFET may exhibit a predetermined characteristic difference from each other.

In order to obtain a sufficient RF gain that is substantially the same as that obtained in the saturation region while consuming a small amount of DC power for the active element, a voltage value obtained by subtracting the threshold voltage from the gate-to-gate source voltage in FIG. It is preferable to operate the active element in the range where Vth) is, for example, 0.2V to 0.3V. However, as described above, in this region, the first derivative gm 'of the transconductance has a local maximum or local minimum. In other words, the first derivative (gm ') of the transconductance has a maximum value or a minimum value in the operating region that consumes a small amount of DC power for the active device and secures sufficient RF gain, thereby maximizing nonlinearity. will be.

Therefore, if the drains of the active device of the first type and the active device of the second type complementary to each other are connected to each other, the bias voltage between the gate sources is appropriately set, and the same input signal is applied to the gate, the active device of the first type is provided. And regions where the first derivative gm 'of the transconductance of the active element of the second type has a maximum value and a minimum value coincide with each other. According to a preferred embodiment of the present invention, the bias voltage between gate sources of the first type active device is set to a region V _{GSN where} the first derivative (gm ') of the transconductance has a maximum value, and the second type active device The gate-to-gate bias voltage of is set to a region (V _GSP ) where the first derivative (gm ') of the transconductance has a minimum value, so that a region where the first derivative of the transconductance of both active devices has a maximum value and a minimum value You can match them. By doing so, it is possible to offset that the first derivative gm 'of both active elements has a local maximum or local minimum. Fig. 6 is a circuit in which the drains of the N-type MOSFET and the P-type MOSFET are connected to each other, and the first derivative of the transconductance of both devices is biased in a region having a maximum value and a minimum value, and the primary of both devices of the circuit. It is a graph showing derivative (gm ') values.

That is, when the first type active element Qn is biased to a predetermined gate source voltage Vgs, the second type active element Qp is set to the gate source voltage Vgs of the first type active element. By allowing the reverse voltage to be biased between the gate sources, as described above, the first derivative (gm ') of the transconductance of the second type active element Qp is used to determine the transconductance of the first type active element Qn. The first derivative (gm ') can be offset by having a local maximum.

7 is a circuit diagram illustrating a mixer circuit having improved linearity using active elements complementary to each other, according to a preferred embodiment of the present invention.

As shown in FIG. 7, the amplification circuit having improved linearity using the complementary device according to the present invention is implemented as a first type mixer circuit part implemented as a first type active element and a second type active element complementary to the first type. And a second type mixer circuit portion.

The complementary elements of the first type and the second type have gates Ng and Pg, sources Ns and Ps, and drains Nd and Pd, respectively. In the first type complementary device, the magnitude and direction of the current flowing from the source to the drain are determined according to the voltage applied to the gate. The size and direction of the current flowing from the source to the drain is determined according to the voltage applied to the gate, but is complementary to the type 1 complementary device.

That is, when the first type complementary element varies in magnitude from the drain to source in proportion to the magnitude of the gate-to-gate voltage, the second type complementary element is drained from source to drain in proportion to the magnitude of the source-to-gate voltage. The magnitude of the current is variable. In addition, the bias and impedance circuits of the first type mixer circuit and the second type mixer circuit, which will be described later, may be substantially activated by only the first type active element or substantially only the second type active element depending on the polarity of the input signal. An operating point of the first type active element and the second type active element is determined to be activated. In the following description, the first type complementary element is an N-type MOSFET and the second type complementary element is a P-type MOSFET. It is apparent to those skilled in the art that the spirit of the present invention is not limited thereto.

As shown in FIG. 5, the first type mixer circuit has the same structure as the mixer circuit using the N-type MOSFET as described above with reference to FIG. In addition, the second type mixer circuit has the same structure as the mixer circuit using the P-type MOSFET as described above with reference to FIG.

The first type mixer circuit includes a first mixer circuit including a first active element Qn11 and a second active element Qn12 of the first type, and a third active element Qn21 and a fourth active element Qn22. A second mixer circuit is included. The second type mixer circuit includes a first mixer circuit including a first active element Qp11 and a second active element Qp12 of the second type, and a third active element Qp21 and a fourth active element Qp22. A second mixer circuit is included.

In the first type and second type mixer circuit sections, the first mixer circuit and the second mixer circuit take the structure of a source-coupled pair. That is, in the first mixer circuit portion, the sources of the first active element Qn11 and the second active element Qn12 of the first mixer circuit are connected to each other, and the second through the predetermined source side bias and impedance portion Zsn1. The source of the third active element Qn21 and the fourth active element Qn22 of the second mixer circuit are connected to each other and connected to the second power source through a predetermined source side bias and impedance unit Zsn2. . According to a preferred embodiment of the invention, it can be grounded instead of being connected to a second power source.

On the other hand, in the second type mixer circuit portion, the sources of the first active element Qp11 and the second active element Qp12 of the first mixer circuit are connected to each other and are formed through a predetermined source side bias and impedance portion Zsp1. Connected to the first power source, and the sources of the third active element Qp21 and the fourth active element Qp22 of the second mixer circuit are connected to each other and connected to the first power source through a predetermined source side bias and impedance unit Zsp2. do.

The gates of the first active element Qn11 of the first type mixer circuit portion and the first active element Qp11 of the second type mixer circuit portion are connected to the first high frequency input terminal RF−. Further, the gates of the fourth active element Qn22 of the first type mixer circuit portion and the fourth active element Qp22 of the second type mixer circuit portion are connected to the second high frequency input terminal RF +. Gates of the first active device and the fourth active device are supplied with first power through gate side bias and impedance units Zgn1, Zgn2, Zgp1, and Zgp2 to maintain an operating bias voltage, respectively.

In the embodiment shown in FIG. 7, the gate side bias and impedance portions Zgn1, Zgn2, Zgn3, Zgn4, and Zgp1 are provided on the gates of the first to fourth active elements of the first type mixer circuit portion and the second type mixer circuit portion. , Zgp2, Zgp3, Zgp4) is supplied with a first power source to maintain the operating bias voltage. This operating bias voltage is appropriately set according to the type of the first to fourth active elements, that is, the first type or the second type. For example, in the case where the active element constituting the first type mixer circuit portion in FIG. 7 is an N type MOSFET, the N type bias voltage as described above with reference to FIG. 3 is maintained, and the second type mixer circuit portion is maintained. In the case where the constituent active element is a P-type MOSFET, the P-type bias voltage as described above with reference to FIG. 4 is maintained. According to a preferred embodiment of the present invention, the bias voltage between the gate sources of the N-type MOSFET is set to a region V _{GSN where} the first derivative (gm ') of the transconductance has a maximum value, and the gate source between the gate sources of the P-type MOSFET. The bias voltage is set to a region (V _GSP ) where the first derivative (gm ') of the transconductance has a minimum value so that the region having the maximum and minimum value of the transconductance of both active elements coincides with each other. Can be. By doing so, it is possible to offset that the first derivative gm 'of both active elements has a local maximum or local minimum.

In order that the embodiment shown in FIG. 7 operates as a mixer circuit, it is preferable that a high frequency signal having a phase inverted from each other is input to the first high frequency input terminal RF- and the second high frequency input terminal RF +. The high frequency signals input to the first high frequency input terminal RF- and the second high frequency input terminal RF + are signals in which an information signal is modulated by a carrier wave having a predetermined high frequency. In this specification, the frequency of the carrier wave for modulating the information signal is assumed to be ω _RF .

The gates of the second active element Qn12 and the third active element Qn21 of the first type mixer circuit portion are connected to each other and to the LO frequency input terminal LO. Also in the second type mixer circuit section, the gates of the second active element Qp12 and the third active element Qp21 are connected to each other and to the LO frequency input terminal LO. The gates of the second active element Qn12 and the third active element Qn21 of the first type mixer circuit portion and the gates of the second active element Qp12 and the third active element Qp21 of the second type mixer circuit portion are respectively gated. The first power is supplied through the side bias and impedance portions Zgn3 and Zgp3 to maintain the operating bias voltage.

In order for the embodiment shown in FIG. 7 to operate as a mixer circuit, the frequency ω _LO of the signal input to the LO frequency input terminal LO is preferably 1/2 of the carrier frequency ω _RF .

In the embodiment and related description related to FIG. 7, the signals RF + and RF− that are inverted in phase with the carrier frequency ω _RF are respectively input to the gates of the first active element and the fourth active element, and the second Although an LO signal is input to the gates of the active and third active devices, the LO signal is input to the gates of the first and fourth active devices. The LO signal may be input to the gates of the second active element and the third active element. This embodiment is particularly advantageous when it is not easy to obtain the signals RF + and RF- that are inverted in phase from each other with a signal having a carrier frequency ω _RF . It is obvious that the concept of the present invention can be applied to the latter as it is.

The source voltage Vsn and the body voltage Vbn are applied to the source terminal and the body terminal of each active element. According to a preferred embodiment of the present invention, a bias portion connected to the power supply is connected between the power supply and the source terminal and the body terminal of each active element Qn. Accordingly, the source voltage Vsn and the body voltage Vbn are adjusted from the power supply through the bias portion. In this specification, a bias portion connected between a power supply, a source terminal, and a body terminal is referred to as an operating point bias portion.

In the first type mixer circuit section and the second type mixer circuit section, output terminals of the first mixer and the second mixer are cross-connected with each other. That is, the drains of the first active element and the third active element are connected to each other and to the first output terminal IF−. The drains of the second active element and the fourth active element are connected to each other and to the second output terminal IF +. The final output may be obtained by differentially separating the signals of the first output terminal IF− and the second output terminal IF + from each other.

Further, the drains of the corresponding active elements of the first type mixer circuit portion and the second type mixer circuit portion are interconnected. That is, the drains of the first to fourth active elements of the first type mixer circuit portion are connected to the drains of the first to fourth active elements of the second type mixer circuit portion, respectively. As such, each complementary pair of active elements forms a complementary pair as shown in FIG. 6.

In the first type mixer circuit portion and the second type mixer circuit portion, the connection points of the drains of the first active element and the third active element are connected to the first power supply through predetermined drain side bias and impedance portions Zdn1, Zdp1. The connection point of the drain of the second active element and the fourth active element is connected to the first power supply through the predetermined drain side bias and impedance portions Zdn2 and Zdp2. In this specification, the bias portion connected between the drain and the output stage is referred to as an output side bias portion.

High-frequency signals RF- and RF + having inverted phases are input to the gates of the first mixer circuit and the second mixer circuit of the first type mixer circuit portion and the second type mixer circuit portion. The same LO signal LO is input to the other gates of the first mixer circuit and the second mixer circuit. It is preferable that the frequency ω _LO of the signal input to the LO frequency input terminal _LO is substantially 1/2 of the carrier frequency ω _RF . At this time, the output of the entire circuit, that is, the differential signal of the first output terminal IF- and the second output terminal IF + has the form of a stream of pulses having a narrow width. At this time, the width of the pulse stream is proportional to the amplitude of the RF signal.

According to the circuit shown in Fig. 7, the output signal of the entire circuit is in the form of a pulse width modulated signal modulated with a width proportional to the amplitude of the RF signal. Thus, the output signal contains only the desired baseband signal contained in the frequency signal modulated with the carrier signal having a frequency of ω _RF , and substantially no unwanted LO signal components. This means that the DC offset is improved. In addition, when the first mixer circuit and the second mixer circuit have substantially the same scale and structure, the LO signal component hardly leaks to the first high frequency input terminal RF- and the second high frequency input terminal RF +. This is the same effect that can be obtained in the embodiment related to FIGS. 3 and 4 as described above.

In the circuit shown in FIG. 7, as described above, the drains of the first active elements and the fourth active elements of the first type mixer circuit portion are respectively the drains of the first active elements and the fourth active elements of the second type mixer circuit portion. By being connected, each complementary active element pair forms a complementary pair as shown in FIG. Accordingly, as described with reference to FIG. 6, the first derivative of the first type active element Qn is obtained by using the first derivative gm 'of the transconductance of the second type active element Qp among the nonlinearities of all the active elements. The first derivative (gm ') of the transconductance can be offset by having a local maximum. The reverse is also possible.

This means that the circuit shown in Fig. 7 has an improved IMD2. Thus, the circuit shown in FIG. 7 enjoys the effect that the even function nonlinearity is significantly improved.

According to the present invention, in a mixing circuit for mixing a high frequency signal modulated by a high frequency carrier wave and an LO frequency signal, only a desired baseband signal included in a frequency signal modulated with a carrier signal is included in the output signal, LO signal components that do not have substantially no inclusion. In other words, the DC offset problem is significantly improved.

In addition, the use of a circuit having excellent symmetry, such as a MOSFET, has an effect that the LO signal component hardly leaks to the high frequency input terminal side.

Among the nonlinearities of the active devices, those having a maximum value of the first derivative (gm ') of the transconductance may be canceled by using complementary active devices. This means that IMD2 is improved. Thus, according to the present invention, even function nonlinearity enjoys a significantly improved effect.

Claims (23)

(delete) (delete) (delete) (delete) (delete) (delete) (delete) (delete) (delete) (delete) (delete) And a magnitude and direction of a current flowing from the second terminal to the third terminal based on the magnitude of the voltage applied between the first terminal and the second terminal. A first type circuit portion including a first circuit including a first type first active element and a second active element that are varied, and a second circuit including a first type third active element and a fourth active element; First circuit and second type third active element and fourth active element including second type first active element and second active element having complementary characteristics with the first to fourth active elements of the first type circuit portion A second type circuit portion including a second circuit including an element, The second terminal of the first type first active element and the second active element of the first type circuit portion are connected to each other and to the second power supply through the first bias and impedance portion of the first type second terminal side, and The second terminal of the first type third active element and the fourth active element of the first type circuit portion is connected to each other and is connected to the second power supply through the second bias and impedance portion of the first type second terminal side, The second type first active element and the second terminal of the second active element of the second type circuit portion are connected to each other and connected to a first power source through a first bias and impedance portion of the second type second terminal side, The second terminal of the second type third active element and the fourth active element of the second type circuit portion is connected to each other and is connected to the second power source through the second bias and impedance portion of the second type second terminal side; Connection points of the first terminals of the first active elements of the first and second types and connection points of the first terminals of the fourth active elements of the first and second types are respectively a first high frequency input terminal and a second high frequency input terminal. And first terminals of the second active element and the third active element of the first type and the second type are connected to each other and to the local oscillator (LO) signal input terminal, The first terminals of the first type and the second type first active element to the fourth active element are each of the first bias and impedance unit to the fourth bias and impedance unit and the second type first terminal on the first type first terminal side, respectively. A predetermined operating bias voltage is maintained by being connected to the first voltage through the side first bias and impedance sections through the fourth bias and impedance sections, The connection points of the third terminals of the first and second type first active elements and the third active elements are connected to a first power source through a first output terminal and a first output side bias and impedance unit, and the first type and second type. The connection point of the third terminal of the second active element and the fourth active element is connected to the first power supply via a second output terminal and a second output side bias and impedance unit. Mixer circuit. The method of claim 12, Wherein the first power supply is a voltage power supply supplying a predetermined amount of voltage and the second power supply is ground. The method of claim 12, Wherein the first power supply is ground and the second power supply is a voltage power supply for supplying a predetermined negative voltage. 13. The signal of claim 12, wherein a signal obtained by modulating an information signal by a predetermined high frequency carrier is input to the first high frequency input terminal and the second high frequency input terminal, and a frequency of 1/2 of the frequency of the high frequency carrier is input to the LO signal input terminal. Mixer circuit to which the LO signal is input. The method of claim 12, The first type and second type first to fourth active elements each further include a fourth terminal, and the fourth terminal is connected to the first power supply through a predetermined bias and impedance circuit to maintain an operating bias voltage. Mixer circuit. The method of claim 12, In the first type first to fourth active elements, the first derivative value of the transconductance of the current flowing from the third terminal to the second terminal with respect to the voltage between the first terminal and the second terminal has a maximum value, In the first to fourth active elements, the first derivative value of the transconductance of the current flowing from the third terminal to the second terminal with respect to the voltage between the first terminal and the second terminal has a minimum value, and the first bias and impedance circuit includes the first The local maxima of the first to fourth active elements of the first type and the local maxima of the first to fourth active elements of the first type are respectively canceled. Mixer circuit. The method according to any one of claims 12 to 15, And the first type and second type first to fourth active elements are MOSFETs, and the first terminal, the second terminal, and the third terminal are a gate, a source, and a drain, respectively. The method of claim 18, Wherein the first type first to fourth active elements are N-type MOSFETs, and the second type first to fourth active elements are P-type MOSFETs. The method of claim 16, Wherein the first to fourth active elements are MOSFETs, and wherein the first terminal, second terminal, third terminal, and fourth terminal are gate, source, drain, and body terminals, respectively. The method of claim 20, Wherein the first type first to fourth active elements are N-type MOSFETs, and the second type first to fourth active elements are P-type MOSFETs. The method of claim 12, In the first type first to fourth active elements and the second type first to fourth active elements corresponding thereto, only one of them is substantially activated according to the polarity of the input signal. Mixer circuit. The method of claim 12, And the first type and second type first to fourth elements are formed on the same substrate and on the same layer.