KR100388564B1 - High performance ball grid array substrate and method for preparing the same - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high performance business substrate and a method for manufacturing the same. The present invention relates to a high performance business substrate and a method of manufacturing the same. The present invention relates to a high-performance ball grid array (hereinafter referred to as HP-BGA) substrate manufactured by adjusting the thickness of a two-layer substrate and the thickness of an adhesive for laminating each substrate, and a method of manufacturing the same. The substrates manufactured according to the present invention can prevent scratches caused by routers used to form the cavity of the outermost layer that is finally removed to protect the internal cavity, thereby reducing the incidence of failure of the bonding pads and Tolerance of the total thickness deviation generated can be made easy to manufacture HP-BGA.

Description

High performance ball grid substrate and its manufacturing method {High performance ball grid array substrate and method for preparing the same}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high performance business substrate and a method for manufacturing the same. The present invention relates to a high performance business substrate and a method of manufacturing the same. The present invention relates to a high-performance ball grid array (hereinafter referred to as HP-BGA) substrate manufactured by adjusting the thickness of a two-layer substrate and the thickness of an adhesive for laminating each substrate, and a method of manufacturing the same.

Due to the continuous development of the electronic industry, the electronic component industry, which is attributable to it, is also developed. Accordingly, a denser substrate is required because the electronic component has a very dense cohesion. As described above, the board of a multilayer printed circuit is responsible for miniaturization and high performance of electronic components.

In the multilayer printed circuit board, a conductor circuit is formed on a plurality of substrates constituting the substrate in advance, and the substrates are bonded to each other to cope with mounting of highly integrated electronic components. Such multilayer printed circuit boards have various forms and are manufactured by various methods.

For example, Japanese Patent Laid-Open No. 5-183272 prepares a multilayer board by joining the lowermost substrate on which an electronic component mounting portion and a conductor pattern are formed, and an upper layer substrate having an adhesive layer and an opening to prepare a multilayer board, and through-holes are punched through the multilayer board. After that, the sheet-like mask that can cover the openings is thermally compressed on the uppermost layer, and copper plating is applied to the entire surface of the multilayer plate. Subsequently, the upper and lower plates are subjected to an etching process to form a conductor pattern on the upper and lower plates, and then the mask is removed and the multilayer is removed. The manufacturing method of the board | substrate for electronic component mounting is described.

In addition, Japanese Patent Application Laid-open No. Hei 7-106769 describes a method for manufacturing a multilayer board for mounting electronic components, wherein wiring patterns and mounting holes for mounting electronic components are formed on a plurality of insulating substrates, and electroless plating is performed on surfaces such as bonding pads. Applying Ni / Au plating film and laminating the plurality of insulating substrates to obtain a laminate, then through-holes in the laminate, copper plating on all surfaces, etching unnecessary portions of the copper plating portion, and exposing the Ni / Au plating film and copper plating film A method of coating a Ni / Au plated film on the surface by an electroless plating method is described.

However, since the substrate manufactured by the above method does not effectively prevent the slowdown of the electric signal due to the large amount of heat generated by the number of IOs in the semiconductor chip and the generated heat, the IC chip of high speed and high power There is a problem that can not perform properly.

Therefore, since it is difficult to cope with such a conventional substrate, a substrate having high multi-layer and excellent thermal performance has been studied to further satisfy this problem. In such a substrate, a semiconductor chip is cascaded to a bonding pad of the substrate, and the chip itself is bonded onto a heat sink to solve the problems caused as described above. As a method of manufacturing such a substrate, the IC mounting multilayer manufactured in Japanese Patent Laid-Open No. 10-116933 can be fixed to the laminate by soldering strongly, and the IC is strongly fixed to the heat sink using a resin adhesive. A printed wiring board is described. However, openings are provided in advance in each substrate, including the outermost substrates, stacked and drilled through them, metal plating is formed on the inner surface of the through-holes and the outer surface of the substrate, and the conductor circuit is formed by the outermost substrate. have. Formation of the conductor circuit to the outermost layer substrate is performed by etching the metal plating film formed on the surface of the outermost layer substrate as described above with an etching solution. However, in the case of the above method, at the time of the metal plating of the through-holes and the formation of the conductor circuit to the outermost layer substrate, the plating solution of the metal plating and the conductor circuit are formed on the surface of the opening and the mounting portion of the multilayer printed circuit board. The etching liquid infiltrates in. For this reason, there existed a bad influence that the said opening part and the mounting part were polluted. In addition, since the bonding pads of the inner layer circuits provided in the substrates are formed in the openings, adverse effects due to the contamination cannot be avoided.

In addition, in order to protect the bonding pad of the inner layer circuit, the inside of the opened mounting portion is covered with a plating resist film in advance, and subsequently, a conductor circuit is formed by metal plating and etching, and then the plating resist film is removed. 1, or as shown in FIG. 1, by protecting the bonding pad of the internal circuit by covering the cavity using a substrate of the outermost layer where a mask or a circuit is not formed, and then using a device such as a router bit. The method of forming a cavity in the outermost layer by removing the machining portion A is used.

In more detail, as shown in FIG. 1, in order to manufacture a multilayer circuit board, the substrates 2, 3, 4, and 5 on which circuits and cavities are formed are formed at the same thickness, respectively, and above and below the cavity. After placing unused substrates 1 and 6 and laminating them using an adhesive 7 to fabricate a multilayer printed circuit board, router processing areas A are removed using equipment such as a router to form a cavity. Done. Generally, the thickness of each board | substrate 1-6 is used within 0.3 mm, and the thing of 0.1 mm is used normally. In addition, the substrate is copper (copper) is laminated on both sides, the thickness of the copper is laminated on both sides is approximately 17 ~ 19㎛ and usually used as 18㎛. The thickness of the adhesive for bonding the substrates is generally 0.11 to 0.13 mm and is usually used at a thickness of 0.12 mm. However, at this time, there is a problem in that defects occur due to scratches or the like on the bonding pads B in which the conductor circuit is already formed due to the thickness variation of the substrate and the processing tolerance of the equipment.

Accordingly, an object of the present invention is to reduce the defect rate generated in the bonding pads when forming the cavity of the outermost layer and to allow a tolerance for the total thickness deviation generated in the entire substrate, thereby facilitating the fabrication of HP-BGA. The purpose is to provide a high performance substrate.

Another object of the present invention is to provide a method for producing the above-described high performance substrate.

In order to achieve the above object, a high performance business substrate according to the present invention includes a plurality of substrates on which a conductor pattern is electrically connected to an electronic component including a chip, and comprises a multilayer printed circuit board (BGA) which forms a cavity. In the substrate, the thickness of the second layer substrate is formed three to four times thicker than the thickness of the remaining substrate from the upper layer, and the thickness of the adhesive for laminating the respective substrates is 50 to 70 m.

According to another aspect of the present invention, there is provided a method of manufacturing a high performance business substrate, including a plurality of substrates on which a conductor pattern is electrically connected to an electronic component including a chip, and including a plurality of substrates on which a cavity is formed. A method of manufacturing a BGA substrate in which a plated through hole is formed, a pattern is formed by an outer layer process including exposure, development, and etching, and a heat sink which is positioned below and mounts the chip and suppresses heat generation. The method of claim 1, wherein the thicknesses of the remaining layers except for the second layer are the same from the top, and the thickness of the second layer is 3 to 4 times thicker than the thickness of the remaining substrates to prepare each substrate to form a multilayer structure; And stacking the prepared substrates with an adhesive having a thickness of 50 to 70 µm.

1 is a side cross-sectional view schematically showing the structure of a typical BGA substrate,

2 is a side cross-sectional view schematically showing the structure of an HP-BGA substrate manufactured according to an embodiment of the present invention,

3 is a side cross-sectional view schematically showing the structure of an HP-BGA substrate manufactured according to another embodiment of the present invention.

* Brief Description of Drawings *

1, 10: uppermost substrate, 2. 20: second layer substrate

3, 30: 3rd layer substrate, 4, 40: 4th layer substrate

5, 50: fifth layer substrate, 6, 60: sixth layer substrate

70: adhesive, A: router processing part

B: expected area of failure

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings, but is not limited thereto.

Figure 2 is a side cross-sectional view of a six-layer HP-BGA substrate according to an embodiment of the present invention, Figure 3 is a side cross-sectional view of a five-layer HP-BGA substrate according to another embodiment of the present invention.

In the present invention, a substrate having excellent thermal performance and capable of responding to high speed and high power has to have lamination of several layers because the wire bonding area must be at least two parts. To cope with pinning, the number of floors should be 4 or more. In this invention, the thing using a 6-layer board | substrate and a 5-layer board | substrate is illustrated concretely.

First, referring to FIG. 2, the HP-BGA according to the present invention includes a multilayer printed circuit board having a six-layer structure including a plurality of substrates on which a conductor pattern is electrically connected to an electronic component including a chip, and forming a cavity. In the BGA substrate, the necessary circuits are formed for each layer 10, 20, 30, 40, 50, and 60, or a cavity suitable for each layer is mechanically completed. Then, the prepared plurality of substrates are adhesively processed using an adhesive 70 including prepreg.

In this case, the substrate usable in the present invention may be a glass epoxy resin, a glass bis merimide triazine resin, a glass polyimide resin, a polyethylene terephthalate, polyphenylsulfone, polyimide, and the like, and in particular, a glass epoxy resin is preferable. However, it is not limited thereto. As the adhesive used in the present invention, a film adhesive sheet obtained by mixing a prepreg and an epoxy resin with a rubber such as NBR, an acrylic resin, a polyvinyl butyral resin, a phenol resin, and the like and forming a film into a film can be used. The film adhesive by mix | blending a polyvinyl butyral resin, an acrylic resin, and a phenol resin with little property is preferable. In addition, the adhesive is preferably made of the same material as the substrate. For example, a prepreg in which glass epoxy is deposited on the glass epoxy resin plate is preferable.

As described above, in general, the thickness of each substrate 1 to 6 is generally used within 0.3 mm and usually 0.1 mm, and copper laminated on both sides has a thickness of approximately 17 to 19 μm and is typically used. It has been used with a thickness of 18 μm, and the thickness of the adhesive for bonding the substrates is generally 0.11 to 0.13 mm and usually 0.12 mm. For example, in FIG. 1, when the thickness of the first to sixth layers is 0.1 mm, the laminated copper thickness of both surfaces is 18 µm, and the adhesive is 0.12 mm, the thickness of the entire circuit board is 1.416 mm. Becomes

On the other hand, in view of the circuit board according to the present invention, the lower substrate in contact with the uppermost substrate, that is, the second layer substrate in order to protect the circuit forming layers in the plurality of layers to form a layer is not formed, The thickness of each board | substrate 10, 30, 40, 50, and 60 is a board | substrate within 0.3 mm normally, Preferably it is 0.1 mm, The copper laminated | stacked on both surfaces is about 17-19 micrometers in thickness. It is preferably used in a thickness of 18㎛, the thickness of the second layer 20 from the top is prepared by forming 3 to 4 times thicker than the thickness of the remaining substrate, preferably 4 times the thickness of the remaining substrate is suitable Do. In addition, the prepared substrates are laminated with an adhesive having a thickness of 50 to 70 μm, preferably 60 μm. Within this range, it is possible to prevent defects caused by the router device which is a conventional problem without changing the thickness of the entire circuit board significantly from the thickness of the conventional whole circuit board. For example, in FIG. 2, the thicknesses of the first layer 10, the third layer 30, the fourth layer 40, the fifth layer 50, and the sixth layer 60 are 0.1 mm. When the thickness of the second layer 20 is 0.4 mm, the laminated copper thickness of both surfaces is 18 μm, and the adhesive is 60 μm, the thickness of the entire circuit board is 1.416 mm. If the thickness of the second layer is less than three times the thickness of the remaining substrate, the effect of the present invention to prevent scratches is insufficient, and if the thickness of the second layer exceeds four times, there is a problem of exceeding the limited thickness. In addition, if the thickness of the adhesive is less than 50㎛ the step of tangling with each other when the semiconductor chip is mounted, the problem is entangled with each other, if the thickness exceeds 70㎛ causes a problem of lowering the electrical performance of the circuit.

Therefore, as in the present invention, by forming the thickness of the second layer without a circuit 3 to 4 times thicker than the thickness of the remaining substrate, but by reducing the thickness of the adhesive, router processing using a router while maintaining the overall thickness constant When the part A is removed, a scratch or the like is not generated on the bonding pads B on which the conductor circuits are formed, thereby reducing the defective occurrence rate. In addition, when the tolerance for the overall thickness variation is increased, it becomes difficult to control various variables in the semiconductor mounting, but the tolerance of the thickness variation is reduced by the method according to the present invention.

In addition, the steps after lamination and cavity formation of the multilayer printed circuit board are the same as those of a general HP-BGA manufacturing method, and a description thereof will be omitted. In addition, as shown in Figure 3, the application method in the case of a multilayer printed circuit board composed of five layers is as described above.

The BG substrate manufactured according to the present invention can prevent scratches by the router when forming the cavity of the outermost layer that is finally removed to protect the internal cavity, thereby reducing the incidence of failure of the bonding pads and the overall thickness generated on the entire substrate. Tolerances to deviations can be afforded to facilitate the fabrication of HP-BGA.

All simple modifications and variations of the present invention fall within the scope of the present invention, and the specific scope of the present invention will be apparent from the appended claims.

Claims (5)

In a BGA substrate comprising a multi-layer printed circuit board which includes a plurality of substrates having a conductor pattern electrically connected to an electronic component including a chip, and forms a cavity, A thick substrate having a thickness of the second layer substrate formed from 3 to 4 times the thickness of the remaining substrates from the upper layer, and having a thickness of 50 to 70 µm for the adhesives for laminating the respective substrates. 2. The high performance visual substrate of claim 1, wherein the thickness of the second layer substrate is 0.3 to 0.4 mm. Forming a plated through-hole in a multi-layer printed circuit board including a plurality of substrates having a conductor pattern electrically connected to an electronic component including a chip and forming a cavity, and forming a pattern by an outer layer process including exposure, development, and etching. In the manufacturing method of the BGA substrate to be mounted on the bottom and the heat sink that can mount the chip and suppress heat generation, Preparing each substrate to form a multi-layer structure by forming the thickness of the remaining layers except the second layer from the top and the thickness of the second layer is 3 to 4 times thicker than the thickness of the remaining substrate; And A method of manufacturing a high performance visual substrate, comprising the step of laminating each prepared substrate with an adhesive having a thickness of 50 ~ 70㎛. The method of manufacturing a high performance visual substrate according to claim 3, wherein the thickness of the second layer substrate is 0.3 to 0.4 mm. 4. The method of claim 3, wherein the second layer substrate in contact with the top substrate to protect the circuit forming layers in the plurality of layers is a layer in which no circuit is formed.