KR100347376B1 - Method for attaching semiconductor chip - Google Patents
Method for attaching semiconductor chip Download PDFInfo
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- KR100347376B1 KR100347376B1 KR1019990048637A KR19990048637A KR100347376B1 KR 100347376 B1 KR100347376 B1 KR 100347376B1 KR 1019990048637 A KR1019990048637 A KR 1019990048637A KR 19990048637 A KR19990048637 A KR 19990048637A KR 100347376 B1 KR100347376 B1 KR 100347376B1
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- semiconductor chip
- sealing means
- chip
- attaching
- high pressure
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/832—Applying energy for connecting
- H01L2224/83201—Compression bonding
- H01L2224/83203—Thermocompression bonding, e.g. diffusion bonding, pressure joining, thermocompression welding or solid-state welding
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Wire Bonding (AREA)
Abstract
본 발명은 반도체 칩 부착 방법에 관한 것으로서, 특히 다수의 칩이 전혀 손상없이 회로필름과 플레시블한 인쇄회로기판과 같은 부재에 고른 접착력으로 견고하게 부착시킬 수 있는 방법에 관한 것으로서, 상기 칩탑재영역에 도포된 접착수단에 반도체 칩이 올려진 스트립 형태의 부재를 받침블럭에 배치하는 단계와, 받침블럭에 올려진 상기 스트립형태의 부재를 밀폐수단으로 밀폐시키는 단계와, 상기 밀폐수단의 상면 중앙에 형성된 공기 공급구로 고압의 공기를 공급하는 단계와, 상기 밀폐수단의 내부로 공급된 고압의 공기에 의하여 상기 다수의 반도체 칩이 동시에 가압되어 부재상에 견고히 부착되는 단계로 달성된 반도체 칩 부착 방법을 제공하고자 한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for attaching a semiconductor chip, and more particularly, to a method in which a plurality of chips can be firmly attached to a member such as a circuit film and a flexible printed circuit board without any damage. Arranging the strip-shaped member on which the semiconductor chip is mounted on the supporting block, and sealing the strip-shaped member mounted on the supporting block with a sealing means in the center of the upper surface of the sealing means. The method of attaching a semiconductor chip achieved by supplying a high-pressure air to the formed air supply port, and the plurality of semiconductor chips are simultaneously pressurized by the high-pressure air supplied into the sealing means to be firmly attached to the member. It is intended to provide.
Description
본 발명은 반도체 칩 부착 방법에 관한 것으로서, 더욱 상세하게는 반도체 패키지를 제조함에 있어서 부재의 칩탑재영역에 접착수단으로 부착되는 칩을 고온고압의 공기를 사용하여 고르게 가압시겨줌으로써, 칩이 부재상에 평행을 유지하며 용이하게 부착되도록 한 반도체 칩 부착 방법에 관한 것이다.The present invention relates to a method for attaching a semiconductor chip, and more particularly, in the manufacture of a semiconductor package, by pressing the chip attached to the chip mounting region of the member by an adhesive means evenly using high temperature and high pressure air, the chip is a member. A method of attaching a semiconductor chip, which is easily attached while keeping parallel to the phase.
통상적으로 전자기기의 집약적 발달과 소형화 경향으로 인하여 고집적화, 소형화, 고기능화의 추세에 병행하여, 상기 다이패드의 저면이 외부로 노출되어 열방출효과를 극대화시킨 구조의 EPP(Exposed pad package) 반도체 패키지, 볼 그리드 어레이(Ball Grid Array) 반도체 패키지, 회로필름을 이용한 반도체 패키지등 다양한 종류의 반도체 패키지가 경박단소화로 개발되어 왔고, 개발중에 있다.In general, due to the intensive development and miniaturization of electronic devices, in parallel to the trend of high integration, miniaturization, and high functionality, the bottom surface of the die pad is exposed to the outside to maximize the heat dissipation effect. Various types of semiconductor packages, such as ball grid array semiconductor packages and semiconductor packages using circuit films, have been developed in a light and small size and are under development.
상기 나열한 패키지중에 회로필름과 같은 부재를 이용한 반도체 패키지는 첨부한 도 2에 도시한 바와 같이, 칩탑재영역이 좌우 등간격으로 형성되어 있는 스트립 형태의 필름(34)과, 이 필름(34)상에 식각처리되어 부착된 전도성패턴(24)과, 상기 전도성패턴(24)을 포함하는 필름(34)상면에 도포된 커버코트(30)와, 상기 접지용 패턴을 포함하는 필름(34)상에 접착수단(32)으로 실장되는 반도체 칩(10)과, 이 반도체 칩(10)과 상기 전도성 패턴(24)의 본딩영역간에 연결된 와이어(26)와, 상기 칩(10)과 와이어(26)와 전도성패턴(24)등을 보호하기 위해 몰딩된 수지(28)로 구성되어 있다.Among the packages listed above, a semiconductor package using a member such as a circuit film has a strip-shaped film 34 in which chip-mounted regions are formed at right and left equal intervals, as shown in FIG. 2, and on the film 34. On the film 34 including the conductive pattern 24, which is etched on and attached to the top surface, the cover coat 30 applied to the upper surface of the film 34 including the conductive pattern 24, and the grounding pattern The semiconductor chip 10 mounted by the bonding means 32, the wire 26 connected between the semiconductor chip 10 and the bonding region of the conductive pattern 24, the chip 10 and the wire 26 and It is composed of a molded resin 28 to protect the conductive pattern 24 and the like.
또한, 상기 필름(34)의 저면에는 상기 전도성패턴(전원용, 접지용, 신호전달용)이 노출되어 형성된 랜드에 반도체 칩(10)의 입출력단자의 역할을 하도록 인출단자가 부착되어진다.In addition, a drawing terminal is attached to a bottom surface of the film 34 to serve as an input / output terminal of the semiconductor chip 10 in a land formed by exposing the conductive pattern (for power, ground, and signal transmission).
상기와 같은 구조로 이루어진 반도체 패키지의 제조 공정중에 칩을 접착수단으로 필름상에 부착시키는 공정에 있어서, 필름상에 형성된 다수의 칩탑재영역에 접착수단을 도포하는 동시에 이곳에 반도체 칩을 실장한 후, 첨부한 도 3에 도시한 바와 같이 프레스의 받침블럭(14)에 올려놓고, 고온고압 상태의 가압프레스(22)를 밑으로 이동시키게 된다.In the process of attaching the chip to the film by the adhesive means during the manufacturing process of the semiconductor package having the above structure, after applying the adhesive means to a plurality of chip mounting region formed on the film and mounting the semiconductor chip there As shown in FIG. 3, the press block 22 is placed on the support block 14 of the press, and the pressure press 22 in a high temperature and high pressure state is moved downward.
상기와 동시에, 상기 칩(10)이 가압프레스(22)에 의하여 가압됨에 따라, 칩탑재영역에 도포된 접착수단(32)이 압착되면서 칩(10)은 필름(34)상에 견고히 부착되어진다.Simultaneously with this, as the chip 10 is pressed by the press press 22, the chip 10 is firmly attached onto the film 34 while the adhesive means 32 applied to the chip mounting area is compressed. .
그러나, 상기 고온고압의 가압프레스가 다수의 칩 표면에 직접 접촉하기 때문에, 가압프레스에 이물질이 묻어 있는 경우에는 이물질에 의하여 칩에 손상이 입혀지게 되고, 또한 고온고압의 가압프레스가 열변형으로 첨부한 도 3에 도시한 바와 같이 만곡되어 변형 돌출되는 부분(도면에서 "L")이 발생할 수 있는데, 이 부분과 닿게 되는 해당 칩에 응력집중이 되어 칩이 소손되는 문제점이 있었다.However, since the high temperature and high pressure presses are in direct contact with a plurality of chip surfaces, when foreign substances are stuck on the press, the chips are damaged by foreign matters, and the high temperature and high pressure presses are attached by thermal deformation. As shown in FIG. 3, a curved and deformed protruding portion (“L” in the drawing) may occur, which causes stress concentration on the chip that is in contact with the portion, causing the chip to burn out.
따라서, 본 발명은 상기와 같은 문제점을 해결하기 위하여, 칩에 직접 접촉됨 없이 고온고압의 공기를 사용하여 회로필름 또는 플렉시블(Flexible)한 인쇄회로기판과 같은 스트립 형태의 부재상에 실장된 다수의 칩에 고른 가압력을 제공함으로써, 다수의 칩이 부재상에 고른 접착력으로 부착되도록 한 반도체 칩 부착 방법을 제공하는데 그 목적이 있다.Therefore, in order to solve the above problems, the present invention uses a plurality of high temperature and high pressure air without direct contact with a chip, and is mounted on a strip-like member such as a circuit film or a flexible printed circuit board. It is an object of the present invention to provide a method for attaching a semiconductor chip in which a plurality of chips are attached with an even adhesion on a member by providing an even pressing force on the chip.
도 1은 본 발명에 따른 반도체 칩 부착 방법을 설명하기 위한 도면,1 is a view for explaining a method for attaching a semiconductor chip according to the present invention;
도 2는 본 발명에 적용되는 반도체 패키지를 나타내는 단면도,2 is a cross-sectional view showing a semiconductor package applied to the present invention;
도 3은 종래에 반도체 칩을 부착하는 방법을 나타내는 단면도.3 is a cross-sectional view showing a conventional method for attaching a semiconductor chip.
<도면의 주요 부분에 대한 부호의 설명><Explanation of symbols for the main parts of the drawings>
10 : 반도체 칩 12 : 부재10 semiconductor chip 12 member
14 : 받침블럭 16 : 밀폐수단14: support block 16: sealing means
18 : 공기압 저항수단 20 : 공기공급구18: air pressure resistance means 20: air supply port
22 : 가압프레스 24 : 전도성 패턴22: pressurized press 24: conductive pattern
26 : 와이어 28 : 수지26: wire 28: resin
30 : 커버코트 32 : 접착수단30: cover coat 32: adhesive means
34 : 필름34: film
이하, 첨부도면을 참조로 본 발명을 상세하게 설명하면 다음과 같다.Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.
본 발명은 반도체 칩(10)을 접착수단이 도포된 부재(12)상의 칩탑재영역에 올려서 가압하여 이루어지는 반도체 칩 부착 방법에 있어서, 상기 칩탑재영역에 도포된 접착수단(32)에 반도체 칩(12)이 올려진 스트립(strip) 형태의 부재(12)를 받침블럭(14)에 배치하는 단계와, 상기 받침블럭(14)에 올려진 상기 스트립형태의 부재(12)를 밀폐수단(16)으로 밀폐시키는 단계와, 상기 밀폐수단(16)의 상면 중앙에 형성된 공기 공급구(20)로 고압의 공기를 공급하는 단계와, 상기 밀폐수단(16)의 내부로 공급된 고압의 공기에 의하여 상기 다수의 반도체 칩(10)이 동시에 가압되어 접착수단(32)에 압착되어 부재(12)상에 견고히 부착되는 단계로 달성된다.The present invention provides a method for attaching a semiconductor chip by pressing the semiconductor chip 10 onto the chip mounting region on the member 12 to which the bonding means is applied, wherein the semiconductor chip 10 is attached to the bonding means 32 applied to the chip mounting region. 12, placing the strip-shaped member 12 on which the support block 14 is mounted, and the strip-shaped member 12 mounted on the support block 14 to seal the means 16. Sealing the air, supplying high pressure air to the air supply port 20 formed at the center of the upper surface of the sealing means 16, and by the high pressure air supplied into the sealing means 16. A plurality of semiconductor chips 10 are simultaneously pressed to be pressed onto the bonding means 32 and firmly attached onto the member 12.
특히, 상기 밀폐수단(16)의 내부로 공기가 공급될 때, 공급된 고압의 공기 힘에 의하여 밀폐수단(16)이 들려지지 않도록 밀폐수단(16)의 상면을 공기압 저항수단(18)이 가압하는 단계가 동시에 진행되어진다.In particular, when air is supplied into the sealing means 16, the pneumatic resistance means 18 presses the upper surface of the sealing means 16 so that the sealing means 16 is not lifted by the supplied high pressure air force. The steps are carried out simultaneously.
또한, 상기 공기 공급구(20)로 공급되는 고압의 공기는 고온상태이다.In addition, the high pressure air supplied to the air supply port 20 is a high temperature state.
여기서 본 발명을 실시예로서, 첨부한 도 1 내지 도 2를 참조로 더욱 상세하게 설명하면 다음과 같다.Herein, the present invention will be described in more detail with reference to the attached drawings 1 to 2 as examples.
본 발명의 방법이 적용되는 반도체 패키지는 회로필름과 얇은 수지층을 포함하는 인쇄회로기판과 같이 플렉시블한 성질을 갖는 부재를 이용한 반도체 패키지로서, 특히 회로필름과 같은 부재를 이용한 반도체 패키지에 적용된다.The semiconductor package to which the method of the present invention is applied is a semiconductor package using a member having a flexible property such as a printed circuit board including a circuit film and a thin resin layer, and is particularly applied to a semiconductor package using a member such as a circuit film.
상기 회로필름을 이용한 반도체 패키지는 첨부한 도 2에 도시한 바와 같이, 다수의 칩탑재영역이 좌우 등간격으로 형성되어 있고 필름과 전도성패턴과 커버코트등으로 구성된 스트립 형태의 부재(12)를 이용한 것으로서, 부재(12)의 필름(34)상에 전도성패턴(24)이 식각 처리되어 부착되어 있고, 전도성패턴(24)을 포함하는 필름(34)상면에 커버코트(30)가 부착되어 있으며, 또한 상기 접지용 패턴을 포함하는 필름(34)상의 칩탑재영역에 접착수단(32)에 의해 반도체 칩(10)이 실장되어 있으며, 상기 반도체 칩과 전도성 패턴의 본딩영역간에 와이어(26)가 연결되어 있고, 상기 칩과 와이어와 전도성패턴등이 수지(28)로 몰딩되어 이루어진 구조를 보여주고 있다.In the semiconductor package using the circuit film, as shown in FIG. 2, a plurality of chip mounting regions are formed at right and left equal intervals, and using a strip-shaped member 12 composed of a film, a conductive pattern, a cover coat, and the like. As the conductive pattern 24 is etched and attached on the film 34 of the member 12, the cover coat 30 is attached to the upper surface of the film 34 including the conductive pattern 24. In addition, the semiconductor chip 10 is mounted on the chip mounting region on the film 34 including the grounding pattern by the adhesive means 32, and a wire 26 is connected between the semiconductor chip and the bonding region of the conductive pattern. The chip, the wire, the conductive pattern, and the like are molded with a resin 28.
상기와 같이 이루어진 반도체 패키지 제조공정중에 상기 부재(12)상에 형성된 다수의 칩탑재영역에 각각의 반도체 칩(10)이 접착수단(32)으로 올려지는 동시에 가압되어 부착되는 공정이 진행되는 바, 이때 상기 다수의 반도체 칩(10)은 고른 가압력을 받아서 견고히 부착되어야 한다.During the semiconductor package manufacturing process as described above, a process in which each of the semiconductor chips 10 is pushed and attached to the plurality of chip mounting regions formed on the member 12 while being pressed by the bonding means 32 is performed. At this time, the plurality of semiconductor chips 10 should be firmly attached under an even pressure.
따라서, 본 발명에 따른 반도체 칩 부착 방법에서 최초 공정은 첨부한 도 1에 도시한 바와 같이, 상기 칩탑재영역에 도포된 접착수단에 반도체 칩(10)이 올려진 스트립 형태의 부재(12)를 받침블럭(14)에 올려 배치하게 된다.Therefore, in the method of attaching a semiconductor chip according to the present invention, as shown in FIG. 1, the first step is to form a strip-shaped member 12 on which the semiconductor chip 10 is mounted on an adhesive means applied to the chip mounting region. It is placed on the supporting block 14 and placed.
다음으로, 상기 받침블럭(14)에 올려진 상기 스트립형태의 부재(12)를 밀폐수단(16)으로 밀폐시키는 단계가 진행되는데, 이 단계에서 사용되는 밀폐수단(16)은 저부에 일정공간을 갖는 하우징 형태로서, 하단끝부분은 패킹재등으로 마감되어 밀폐력을 증대시킬 수 있도록 한다.Next, the step of sealing the strip-shaped member 12 mounted on the support block 14 with the sealing means 16 is in progress, and the sealing means 16 used in this step has a predetermined space at the bottom. As having a housing form, the lower end is finished with a packing material, etc. to increase the sealing force.
한편, 상기 밀폐수단(16)의 상면 일정부위에는 고온고압의 공기가 공급되는 공기공급구(20)가 형성되어진다.On the other hand, a certain portion of the upper surface of the sealing means 16 is formed with an air supply port 20 for supplying air of high temperature and high pressure.
다음으로, 상기 밀폐수단(16)의 상면 중앙에 형성된 공기공급구(20)로 고온고압의 공기를 공급하는 단계가 진행되는 바, 공기공급구(20)와 결착되는 공기공급수단(미도시됨)으로부터 고온고압의 공기가 공급되어진다.Next, the step of supplying high-temperature, high-pressure air to the air supply port 20 formed in the center of the upper surface of the sealing means 16 is progressed, the air supply means that is bound to the air supply port 20 (not shown) ) Is supplied with high temperature and high pressure air.
이어서, 상기 밀폐수단(16)의 내부로 공급된 고온고압의 공기에 의하여 상기 다수의 반도체 칩(10)이 동시에 가압되어 부재(12)상에 견고히 부착되는 단계가 진행되는데, 상기 공기공급구(20)로 공급된 고온고압의 공기는 상기 다수의 반도체 칩(10)에 균일한 가압력으로 작용을 하게 됨에 따라, 상기 반도체 칩(10)은 접착수단(32)을 압착하며 부재(12)상에 견고하게 부착되어진다.Subsequently, the plurality of semiconductor chips 10 are simultaneously pressed by the high temperature and high pressure air supplied into the sealing means 16 and firmly attached onto the member 12. As the high temperature and high pressure air supplied to 20 acts as a uniform pressing force on the plurality of semiconductor chips 10, the semiconductor chips 10 compress the bonding means 32 and onto the member 12. It is firmly attached.
한편, 상기 밀폐수단(16)의 공기공급구(20)를 거쳐 내부로 고온고압의 공기가 공급될 때, 공급된 고온고압의 공기 힘에 의하여 상기 부재(12)를 밀폐하고 있는 밀폐수단(16)이 들려질 수 있게 된다.On the other hand, when the high temperature and high pressure air is supplied to the inside through the air supply port 20 of the sealing means 16, the sealing means 16 for sealing the member 12 by the supplied high temperature and high pressure air force ) Can be heard.
이에, 공기의 힘에 의하여 밀폐수단(16)이 들려지지 않도록 밀폐수단(16)의 상면을 공기압 저항수단(18)이 가압을 하게 되고, 물론 공기압의 힘보다 큰 힘으로누르게 된다.Accordingly, the pneumatic resistance means 18 presses the upper surface of the sealing means 16 so that the sealing means 16 is not lifted by the force of air, and of course, the air pressure resistance means 18 is pressed by a force greater than the force of the air pressure.
이에따라, 상기와 같은 방법으로 반도체 칩(10)이 부재(12)상에 견고하게 부착되면, 밀폐수단(16)을 들어올리고 받침블럭(14)에서 부재(12)를 분리하여 다른 공정으로 이송시키게 된다.Accordingly, when the semiconductor chip 10 is firmly attached to the member 12 in the above manner, the sealing means 16 is lifted and the member 12 is separated from the support block 14 to be transferred to another process. do.
이상에서 본 바와 같이, 본 발명에 따른 반도체 칩 부착 방법에 의하면, 칩에 직접 접촉됨 없이 고온고압의 공기를 사용하여 회로필름 또는 플렉시블한 인쇄회로기판과 같은 스트립 형태의 부재상에 실장된 다수의 칩에 고른 가압력을 제공함으로써, 다수의 칩이 전혀 손상없이 부재상에 고른 접착력으로 견고하게 부착되는 장점이 있다.As described above, according to the method for attaching a semiconductor chip according to the present invention, a plurality of members mounted on a strip-shaped member such as a circuit film or a flexible printed circuit board using high temperature and high pressure air without directly contacting the chip. By providing an even pressing force on the chip, a number of chips have the advantage of being firmly attached to the member with even adhesion without any damage at all.
Claims (3)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019990048637A KR100347376B1 (en) | 1999-11-04 | 1999-11-04 | Method for attaching semiconductor chip |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019990048637A KR100347376B1 (en) | 1999-11-04 | 1999-11-04 | Method for attaching semiconductor chip |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR20010045372A KR20010045372A (en) | 2001-06-05 |
| KR100347376B1 true KR100347376B1 (en) | 2002-08-03 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1019990048637A KR100347376B1 (en) | 1999-11-04 | 1999-11-04 | Method for attaching semiconductor chip |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10930613B2 (en) | 2018-09-21 | 2021-02-23 | Samsung Electronics Co., Ltd. | Semiconductor package having recessed adhesive layer between stacked chips |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03169029A (en) * | 1989-11-28 | 1991-07-22 | Mitsubishi Electric Corp | Mounting of semiconductor device |
| JPH04223345A (en) * | 1990-12-25 | 1992-08-13 | Sumitomo Electric Ind Ltd | Die bonding device |
| KR970011202U (en) * | 1995-08-22 | 1997-03-29 | LOC Package Chip Attachment Device |
-
1999
- 1999-11-04 KR KR1019990048637A patent/KR100347376B1/en not_active IP Right Cessation
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03169029A (en) * | 1989-11-28 | 1991-07-22 | Mitsubishi Electric Corp | Mounting of semiconductor device |
| JPH04223345A (en) * | 1990-12-25 | 1992-08-13 | Sumitomo Electric Ind Ltd | Die bonding device |
| KR970011202U (en) * | 1995-08-22 | 1997-03-29 | LOC Package Chip Attachment Device |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10930613B2 (en) | 2018-09-21 | 2021-02-23 | Samsung Electronics Co., Ltd. | Semiconductor package having recessed adhesive layer between stacked chips |
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| Publication number | Publication date |
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| KR20010045372A (en) | 2001-06-05 |
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