KR100319277B1 - HB drive circuit for motor drive - Google Patents

Abstract

1. TECHNICAL FIELD The invention described in the claims pertains to a technique for controlling a bidirectional rotation of a motor using an H bridge circuit.

2. Technical problem to be solved by the invention: H bridge driving circuit which prevents abnormal rotation of motor and burnout of circuit in H bridge generated by controlling motor bidirectional rotation control by using PWM to apply motor driving signal to H bridge. To serve.

3. Summary of the Invention Solution: Between the PWM generator and the H bridge, a switching circuit and a drive circuit for generating a motor drive signal by PWM pulses for forward and reverse rotation control output from the PWM generator. Add. A signal combiner is connected between the PWM and the switching circuit to separate the signals by photoelectric-optical conversion of the PWM pulses.

4. Significant use of the invention: electronic devices, machine tools, etc. requiring rotation control of the motor

Description

H bridge driving circuit for motor driving

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a motor drive circuit, and more particularly, to an H-bridge drive circuit for driving a motor efficiently driving an H-bridge used for forward / reverse rotational driving of a motor.

Typically, a circuit called an H bridge is widely used to rotate the motor forward or reverse by control commands provided from the outside. The configuration of the H bridge is as shown in FIG.

1 is a circuit diagram of an H-bridge for general motor driving, and one terminal of the motor M, which is rotated forward / backward by the input of the motor driving signals G1 to G4, is connected between the power supply voltage Vcc and the ground GND. It is connected to the connection node of the 1st forward / reverse rotation drive transistor PQ1 (PQ3) connected in series with the 1st path | route of. Further, another terminal of the motor M is connected to the connection node of the second reverse / forward rotation driving transistor PQ2 and PQ4 connected in series with the second path having a parallel state with the first path. In this case, the first forward rotation transistor PQ1 and the second reverse rotation transistor PQ2 are P-channel unipolar transistors (field effect transistors), and the first reverse rotation driving transistor PQ3 and the second forward rotation driving transistor ( PQ4) is an N-channel unipolar transistor.

First, the relationship in which the motor M is driven in forward / reverse rotation will be described with reference to FIG.

When motor drive signals G1 to G4 input from the outside are input as shown in Table 1 below, the motor M is driven to rotate forward or reverse depending on the state of the input signal.

When the motor driving signals G1 to G4 as in the first state shown in Table 1 are input, the first forward rotation driving transistor PQ1 and the second forward rotation driving transistor PQ4 are " on " At this time, the second reverse rotation driving transistor PQ2 and the first reverse rotation driving transistor PQ3 are “off”. Therefore, the power supply voltage Vcc flows to the ground through the first forward rotation driving transistor PQ1 → the terminal F of the motor M and the second forward rotation driving transistor PQ4. At this time, the motor (M) is driven to rotate in the forward rotation (CW) direction.

If the same motor driving signals G1 to G4 are input to the second state of Table 1, the first forward rotation driving transistor PQ1 and the second forward rotation driving transistor PQ4 are turned off in contrast to the above. ", And the second reverse rotation driving transistor PQ2 and the first reverse rotation driving transistor PQ3 are" on "driven. Therefore, the power supply voltage flows to the ground through the second reverse rotation driving transistor PQ2 → the terminal R of the motor M and (F) → the second reverse rotation driving transistor PQ3. That is, the current flows in the opposite direction to the forward rotation direction, so that the motor M is rotated reversely (CCW).

Usually, generation of the motor drive signals G1 to G4 as described above is mostly performed using the output of the PWM generator using the pulse width modulator PWM. The PWM signal output from the PWM generator is supplied directly to the H bridge circuit. However, in the conventional circuit using the PWM signal output from the PWM generator directly as a drive signal of an H bridge configured as shown in FIG. 1, the motor M is controlled in an arbitrary direction, that is, desired by a failure of the PWM generator. It does not rotate in the direction, but causes the problem of rotating in any direction.

In addition, the conventional motor driving method as described above causes a problem that components in the H bridge are damaged by directly supplying the output of the PWM generator to the H bridge. For example, if a PWM generator fails, overcurrent flows through the unipolar transistors in the H bridge circuit using high power, resulting in damage.

Accordingly, an object of the present invention is to provide an H bridge driving circuit which can prevent abnormal rotation of the motor when the PWM signal does not generate a prescribed output corresponding to the motor rotation direction due to a failure of the PWM generator.

Another object of the present invention is to provide a circuit for coupling the output of the PWM generator to an H bridge as an isolated state.

According to an aspect of the present invention, there is provided an H bridge including a first forward / reverse rotation driving transistor and a second reverse / forward rotation driving transistor connected in series with a first path and a second path between a power supply voltage and ground, respectively. An H-bridge drive circuit having a motor connected between a first connection node of the first forward / reverse drive transistor and a second connection node of a second reverse / forward drive transistor, wherein the H bridge driver circuit responds to an input of a drive command. And a pulse width modulator for alternately outputting the first and second output signals whose phases are exclusive as the first state and the second state, and the first and second output signals output from the pulse width modulator as the first state. Outputting drive signals of the first forward rotation driving transistor and the second forward rotation driving transistor of the H bridge in response to the output; and the first and second output signals responding at the output as a second state output. And an H bridge driver circuit for outputting driving signals of the first reverse driving transistor and the second reverse driving transistor of the H bridge.

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

2 is a driving circuit diagram of an H bridge according to the present invention, which describes motor driving signals G1 to G4 for forward / reverse rotation of the motor M in response to an input of a forward / reverse rotation drive command CM. Enter in Figure 1. Its configuration and operation is as follows. 2, reference number 12 is a pulse width modulator (hereinafter referred to as " PWM "), 14 is a signal combiner, 16 is a power supply circuit, 18 is a first switching part, 20 is a first driving part, 22 is a second switching part , 24 is the second driving unit.

Now, when the power supply voltage Vcc is supplied to the circuit as shown in FIG. 2, the transistor Q1 in the power supply circuit 1 is " on " switched by the constant voltage by the resistor 14 and the zener diode D3. Therefore, the transistor Q1 supplies the signal combiner 14 connected to the emitter as an operating power source with the power supply voltage Vcc input to the collector as a constant first power source corresponding to the constant voltage input to the base. In this state, when the forward or reverse rotation driving command CM is input to the PWM 12, the PWM 12 corresponds to the first and second output terminals A and B in response to the driving command CM. ) Outputs the PWM pulse signal of the first state or the second state as shown in Table 2 below.

In Table 2, the order is a state signal output from the output terminal (A) (B) of the PWM (12). That is, sequence number 1 is a first state signal and sequence number 2 is a second state signal. HB means H bridge.

When the first state signal or the second state signal as shown in Table 1 is output from the PWM 12, this is the anode of the diodes D1 and D2 connected to the output terminals A and B of the PWM 12, respectively. supplied to each anode. The diodes D1 and D2 are switched as shown in Table 2 above. Therefore, the light emitting diodes LED1 and LED2 in the signal combiner 14 connected to the output terminals of the diodes D1 and D2 are turned on and off depending on the output states of the diodes D1 and D2.

As an example, when the first state signal is output from the PWM 12, the diode D1 is "on" switched. When the diode D1 is "on" switched and the PWM pulse (logical "high") output from the output terminal A of the PWM 12 is supplied to the light emitting diode LED1 in the signal combiner 14, the photo transistor. P1 is driven "on". In contrast, when the second state signal is output from the PWM 12, the diode D2 is " on " switched. When the diode D2 is switched "on" and the PWM pulse (logical "high") output from the output terminal B of the PWM 12 is supplied to the light emitting diode LED2 in the signal combiner 14, the photo transistor. P2 is driven "on". Here, the diodes D1 and D2 are used to protect the signal combiner 14 at this time since the output of the PWM pulse swings from positive to negative voltage when the PWM 12 operates by receiving a bidirectional power source. It can be seen that the signal combiner 14 inverts and outputs the signal output from the output terminals A and B of the PWM 12. In this case, it can be seen that the signal outputted from the signal combiner 14 by inputting the first power supplied from the power supply circuit 16 is insulated from the above-described output power of the PWM 12.

When a logic "high" and "low" first state signal is output from the output terminals A and B of the PWM 12, the photo transistor P1 in the signal combiner 14 is "on" and the port transistor is turned on. P2 is switched "off". When the signal combiner 14 outputs a signal as described above, the transistor Q2 in the first switching unit 18 connected thereto is switched "off" as shown in Table 2 above. When the transistor Q2 is " off, " the voltage of the resistor R17 is supplied as a switching signal to the base of the transistor Q4 in the first drive section 20 connected to the collector thereof, so that the transistor Q4 is also " turned on " Are off "**

do. At this time, the transistor Q5 having the base connected to the emitter of the transistor Q2 is turned off so that the voltage divided by the resistors R19 and R21 is supplied to the base of the transistor Q3. Therefore, when the first state signals of logic "high" and "low" are output from the output terminals A and B of the PWM 12, each of the transistors Q4 and Q3 in the first driver 20 is &Quot; Off " and " on " to output motor drive signals G1 and G3 in a state of "low", respectively. Accordingly, it can be seen that the transistors PQ1 and PQ3 of the H bridge having the configuration as shown in FIG. 1 are switched on / off.

On the other hand, the transistor Q8 in the second switching unit 20 whose base is connected to the collector of the photo transistor P2 of the signal combiner 14 is "on" switched as shown in Table 2 above. When the transistor Q8 is switched "on", the switching signal of the "low" state is output to the base of the transistor Q7 through the resistor R24 connected to the collector and at the same time the transistor Q9 of the transistor Q9 connected to the emitter. Outputs a "high" switching signal to the base. At this time, the transistor Q9 is "turned on" and passes the voltage divided by the resistors R25 and R28 to the emitter and outputs the logic in a "low" state. By the above operation, the transistor Q7 in the second driving unit 24 connected to the second switching unit 22 is " off " to the switching signal output from the second switching unit 20 in the " low " state. Then, the "low" motor drive signal G2 is input to the gate of the transistor PQ2 of the H bridge. Then, the transistor Q6 in the second driving means 22 is "off" to the switching signal output from the second switching unit 20 in the "low" state to hit the "high" motor drive signal G4. It is input to the gate of the transistor PQ4 of the bridge. Thus, it can be seen that the transistors PQ2 and PQ4 in the H bridge are switched "off" / "on", respectively.

Therefore, when the signal in the first state is output from the PWM 12, only the transistors PQ1 and PQ4 in the H bridge are " on " so that the current of the motor M shown in FIG. 1 is supplied to the power supply voltage Vcc terminal, It flows through the transistor PQ1, the terminals F, R of the motor M, and the transistor PQ4, and rotates forward.

On the other hand, when the second state signal of Table 2 described above is output from the PWM 12, the operations of all the transistors in the first and second switching units 28 and 20 are switched as described above. Therefore, the operations of all the transistors in the first and second drivers 22 and 24 are also operated in the opposite manner as described above, so that the rotation drive in the H bridge is driven to reverse rotation.

If the PWM 12 outputs the same signal as the third state or the fourth state of Table 2 described above due to a failure or the like, the transistor PQ1 (PQ2) connected to the first path in the H bridge or By simultaneously driving the transistors PQ3 and PQ4 connected to the second path, the path of the rotational drive current of the motor M can not be formed. Therefore, when the same signal as the third or fourth state is output from the PWM 12 due to an abnormal circuit or the like, it can be seen that the motor M is not rotated.

As described above, the present invention can prevent abnormal rotation of the motor by preventing the motor from being driven against the abnormality of the PWM pulse generated by the failure of the PWM generation circuit in the circuit for driving the motor using the PWM generator. It is possible to protect the circuitry in the H bridge from overcurrent.

1 is a circuit diagram of a typical H-bridge for driving a motor.

2 is a driving circuit diagram of an H bridge according to the present invention.

Claims (5)

An H-bridge including a first forward / reverse rotation driving transistor and a second reverse / forward driving transistor connected in series to a first path and a second path between a power supply voltage and ground, and the first forward / reverse rotation driving transistor. An H bridge driver circuit having a motor connected between a first connection node and a second connection node of a second reverse / forward driving transistor, A pulse width modulator for alternately outputting first and second output signals whose phases are exclusive in response to an input of a driving command as a first state and a second state; Outputting driving signals of the first forward rotation driving transistor and the second forward rotation driving transistor of the H bridge in response to the first and second output signals output from the pulse width modulator in a first state; And an H bridge driver circuit for outputting a drive signal of the first reverse drive transistor and the second reverse drive transistor of the H bridge in response to the second output signal being output in the second state. H-bridge driver for motor drive. The H bridge driving circuit of claim 1, wherein Response switching when the first output signal output from the pulse width modulator is in a first state to output a first forward rotation switching signal; and response switching when the first output signal is in a second state to provide a first reverse rotation switching signal. A first switching unit to output; Response switching when the second output signal output from the pulse width modulator is in a first state to output a second forward rotation switching signal, and response switching when the second output signal is in a second state to generate a second reverse rotation switching signal A second switching unit for outputting the; Driving the first forward rotation driving transistor in response to a first forward rotation switching signal output from the first switching unit, and driving the first reverse rotation driving transistor in response to a first reverse rotation switching signal. 1 drive unit, Driving the second forward rotation driving transistor in response to a second forward rotation switching signal output from the second switching unit, and driving the second reverse rotation driving transistor in response to a second reverse rotation switching signal. H-bridge driver, characterized in that composed of two drives. The H-bridge driver according to claim 1 or 2, wherein each of the first forward / reverse drive transistor and the second reverse / forward drive transistor is a unipolar transistor. An H-bridge comprising a first forward / reverse rotation driving transistor and a second reverse / forward rotation driving transistor connected in series between the first and second paths between a power supply voltage and ground, respectively, and the first forward / reverse rotation driving transistor. An H-bridge driving circuit having a motor connected between a first connection node of a second node and a second connection node of a second reverse / forward driving transistor, A pulse width modulator for alternately outputting first and second output signals whose phases are exclusively in response to an input of a driving command, as signals in a first state and a second state; A signal separator which is operated by an input of a first power source and insulates the first and second output signals output from the pulse width modulator as the level of the first power source; A power supply circuit which stabilizes a power supply voltage to a first power supply having a predetermined level and supplies the same to the signal separator; The first and second driving transistors of the first bridge and the second forward driving transistor of the H bridge are driven in response to the first and second output signals of the first state which are operated at an input of the first power source and are output through the signal separator. An H bridge driver circuit which outputs a drive signal and is driven in response to a first output signal and a second output signal in a second state to output drive signals of the first reverse driving transistor and the second reverse driving transistor of the H bridge; H-bridge driver for motor driving, characterized in that the configuration. The H bridge driving circuit of claim 4, wherein Response switching when the first output signal output from the pulse width modulator is in a first state to output a first forward rotation switching signal, and response switching when the first output signal is in a second state to generate a first reverse rotation switching signal A first switching unit for outputting the, Response switching when the second output signal output from the pulse width modulator is in a first state to output a second forward rotation switching signal, and response switching when the second output signal is in a second state to generate a second reverse rotation switching signal A second switching unit for outputting the; Driving the first forward rotation driving transistor in response to a first forward rotation switching signal output from the first switching unit, and driving the first reverse rotation driving transistor in response to a first reverse rotation switching signal. 1 drive unit, Driving the second forward rotation driving transistor in response to a second forward rotation switching signal output from the second switching unit, and driving the second reverse rotation driving transistor in response to a second reverse rotation switching signal. H-bridge driver, characterized in that composed of two drives.