KR100316736B1 - Synchronous and asynchronous complex receiver - Google Patents

Abstract

PURPOSE: A synchronous and asynchronous complex receiver is provided to prevent performance lowering according to channel phase variation by adapting an asynchronous manner and a synchronous manner in the receiver. CONSTITUTION: A voltage controlled oscillator means(102) oscillates according to an input voltage to vary an output signal. A phase shifter(103) shifts a phase of an output signal of the voltage controlled oscillator means(102) by phi/2. The first mixer(100) mixes an output signal of the voltage controlled oscillator means(102) and a signal received via an input terminal(IN). The second mixer(101) mixes a phase shifted oscillation signal in the phase shifter(103) with the received signal. The first and second low pass filters(104,105) filter output signals of the first and second mixers(100,101), respectively. The first and the second ADC(106,107) converts a signal comprising a phase error of a demodulation sub-carrier and output signals from the low pass filters, into digital signals. A channel property detection means(110) detects a channel property in response to a signal from an automatic gain controller. A phase error detection and data restoration means(108) determines a receive signal point using digital signals from the ADC(106,107), detects a phase error between a correct signal point and a received point, and outputs an error compensation signal when a phase error arises. A DAC(109) converts the error compensation signal into an analog signal to control the voltage controlled oscillator means(102).

Description

Synchronous and asynchronous composite receiver.

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a synchronous and asynchronous hybrid receiver, and more particularly, to a synchronous and asynchronous hybrid receiver for receiving performance degradation due to phase change in accordance with a channel characteristic or in a synchronous or asynchronous manner of a user.

In general, a receiver must recover a carrier to demodulate data.

There are various carrier recovery methods, such as a method using a phase locked loop (PLL), a method using a M-difference device, and a decision feedback phase locked loop method.

Both of these methods derive analog phase error values for phase correction.

As an example, a receiver using a phase-locked loop scheme as shown in FIG. In this case, the received signal r (t) = s (t) + n (t) input to the input terminal IN of the receiver is received.

In the received signal, n (t) becomes a noise for the pure signal, and this received signal r (t) is mixed with the output signal of the voltage controlled oscillator 4 in the first and second mixing sections 1 and 2. And output.

That is, the first mixing unit 1 mixes the received signal r (t) received from the input terminal IN and the oscillation signal cosr (2πf _o t + Φ) output from the voltage controlled oscillator 4 and outputs the mixed signal. Done.

That is, when the output signal of the first mixing unit 1 is y _o (t),

remind

Frequency component.

In the same manner as described above, the second mixing unit 2 phases the phase change unit 3 which changes the phase of the received signal r (t) received from the input terminal IN and the signal output from the suppression control oscillator 4. The mixed signal sin (2 π f _o t + Φ) is mixed and output.

That is, if the output signal of the second mixing section 2 is y _s (t), Frequency component.

here (t)

In order to remove the 2f _o frequency component, low pass filtering is performed through the first and third low pass filter units 5 and 7 and mixed by the third mixing unit 8 to output the phase error signal e (t). do.

The phase error signal e (t) output from the third mixing section 8 is as follows.

Phase error signal to be.

The phase error signal e (t) through the third mixing section 8 is driven by the second low pass filter section 6 to drive the voltage controlled oscillation section 4, thereby performing phase recovery of the carrier wave.

In addition, other phase synchronization schemes basically derive the phase error signal e (t) to drive the voltage controlled oscillator 4 as described above.

On the other hand, in case of rapid change of transport channel, asynchronous demodulation method is used.

That is, as shown in FIG. 2, the asynchronous demodulation method does not require phase recovery of the carrier, and the received signal r (t) received through the input terminal IN is transmitted through the time delay unit 10. After delaying by T), the received signal is multiplied by the mixing unit 11 to recover the received signal.

In this asynchronous method, the input data must be differentially encoded to transmit the correct data upon reception.

As an example, a noise free signal In other words, the delayed signal interval (T) Becomes

The product of the received signal r (t) and the delayed received signal r (tT) Is as follows.

Becomes

If it is determined through the integrator 12 that the 2w _o component is "0" and w _o T = 2π, Becomes

here to be.

That is, the phase difference between the received signal before the one symbol interval and the current received signal is obtained, thereby recovering the data.

However, such a conventional receiver is made of either a synchronous method or an asynchronous method to recover received data.

The synchronous scheme is generally superior to the asynchronous scheme, but in the case of a padding channel in which the channel changes rapidly, the performance of the asynchronous scheme is much better.

That is, there is a problem that the performance of the receiver changes with each other according to the channel characteristics.

Accordingly, an object of the present invention is to adopt a synchronous and asynchronous method in the receiver to receive in accordance with the channel characteristics or the user's arbitrarily synchronous or asynchronous method to prevent the performance degradation of the receiver according to the channel phase change to receive a combination of synchronous and asynchronous In providing a device.

Means for achieving the object of the present invention is the first and second to receive the phase difference between the received signal and the demodulated carrier obtained from the product of the input received signal and the signal oscillated by the voltage deceleration means first and second respectively 2 The received signal point is determined by the analog / digital converting means and the digital signals obtained through the first and second analog / digital converting means, the correct signal point is found therefrom, and the phase difference between the correct signal point and the received point is determined. Phase error determination and data recovery means for outputting a phase error compensation signal when a phase difference is detected and converting the phase error compensation signal obtained from the phase error determination and data recovery means into an analog signal to control the voltage controlled oscillation means. It is achieved by the digital / analog conversion means to be described below, to the accompanying drawings of the present invention If it's described in detail below.

3 is a system configuration diagram of a synchronous and asynchronous hybrid receiver according to the present invention. As shown therein, a voltage controlled oscillation means 102 for oscillating according to an input voltage and outputting a variable output signal, and the voltage controlled oscillation means ( Phase shifting means 103 for phase shifting the output signal of 102 to π / 2, and a signal output from the voltage controlled oscillation means 102 and a received signal received through the input terminal IN for output. The first mixing means 100 and the second mixing means 101 for mixing and outputting the oscillation signal phase-shifted in the phase conversion means 103 and the received signal received through the input terminal IN, and the first First and second low pass filter means 104 and 105 for low pass filtering the mixed signal from the first and second mixing means 100 and 101, and the first and second low pass filter means 104 ( 105) receives a signal including the phase difference between the received signal and the demodulated carrier First and second analog / digital converting means (106) (107) for converting into de-signals, channel characteristic detecting means (110) for detecting channel characteristics in accordance with a signal input from an automatic gain control means, and said channel The received signal point is determined by the digital signal converted from the first and second analog / digital converting means 106 and 107 according to the channel characteristic detected by the characteristic detecting means 110, and the correct signal point is determined therefrom. The phase error determination and data recovery means 108 for detecting a phase difference between the correct signal point and the reception point and outputting a phase error compensation signal when the phase difference is generated; and the phase error determination and data recovery means 108 And digital / analog conversion means (109) for converting the phase error compensation signal obtained from the analog signal to the analog signal to control the voltage controlled oscillation means (102).

The phase error determination and data recovery means 108 is a reception point determining means for determining a signal point of a progressive signal from the data converted from the first and second analog / digital conversion means 106 and 107 ( 108a and the first, second, third, and fourth switching members which are switched in accordance with the control signal of the channel characteristic detecting means 110 to block and pass the receiving point signal determined by the receiving point determining means 108a. 108b, 108c, 108f, 108h, delay means 108d for delaying output of the reception point signal through the first switching member 108b for a predetermined time, and through the second switching member 108c. A signal point determining means 108e for determining a received signal point from the received signal, and a signal point of the signal point determining means 108e via the third switching member 108f and the reception determined by the receiving point determining means 108a. When the phase difference occurs by detecting the phase difference with the received signal through the point and delay means 108d, Phase difference detecting means 108g for inputting a phase difference signal to the digital / analog converting means 109 through the fourth switching member 108h, and phase difference and signal point determining means 108e detected by the phase difference detecting means 108g. And data determination means 108i for determining and outputting the transmission data based on the signal point determined in "

Thus, the operation and effect of the present invention configured as described with reference to FIGS. 3 to 6 as follows.

First, the channel characteristic detecting means 110 detects whether the power level of the signal output from the automatic gain control means is greatly changed, as in the sixth degree from the received input signal.

Such a research method includes a method of measuring the number of times of detecting an arbitrary level, a padding period, or the like.

6 shows an example of the level crossing ratio.

In this way, as a result of detection by the channel characteristic detecting means 110, a signal for selecting a synchronous demodulation method or an asynchronous demodulation method is sent according to the degree of padding, and accordingly, the switch in the demodulation unit performs demodulation in a determined manner.

With reference to this, the detailed description when the synchronization method is first determined is as follows.

As shown in FIG. 3, the received signal received through the input terminal IN and the oscillation signal output from the voltage controlled oscillation means 102 are mixed through the first mixing means 100, and the mixed signal is Through the first low pass filter means 104, a value including [ Delta ] [ theta] , which is the phase difference between the received signal and the demodulated carrier, is represented by cosΔ [phi] and is input to the first analog / digital converting means 106. FIG.

On the other hand, the signal oscillated by the voltage controlled oscillation means 102 is phase shifted to π / 2 through the phase shifting means 103 and mixed with the signal received by the second mixing means 101, and the mixed signal is Through the low pass filter means 105, a value including Δ θ , which is a phase difference between the received signal and the demodulated carrier, is represented by sin ΔΦ and is input to the second analog / digital conversion means 107.

The signals filtered by the first and second low pass filter means 104 and 105 are converted into digital signals and output through the first and second analog / digital conversion means 106 and 107, respectively.

The digital signal converted by the first and second analog / digital conversion means 106 and 17 is received as shown in FIG. 5 by the reception point determining means 108a of the phase error determination and data recovery means 108. The signal point is determined and from this the signal point determining means 108e finds the correct signal point.

Next, the phase difference between the correct signal point and the received signal point is detected by the phase difference detecting means 108g, and when the phase difference occurs, it may be said that the phase phase synchronization is wrong, so that the fourth switching member 108h is used to compensate for the phase error. The phase error correction signal is converted into an analog signal by the digital / analog converting means 109 to control the voltage controlled oscillation means 102.

In the above data discrimination, data is determined and output from the phase difference detected by the phase difference detecting means 108g and the signal point determined by the signal point determining means 108e.

On the other hand, in the case of detecting in an asynchronous manner, in this case, the first switching member 108b of the phase error determination and data recovery means 108 is turned on and the second switching member 108c of the channel characteristic detecting means 110 is used. Since it is turned off by the control signal, the voltage controlled oscillation means 102 has a constant frequency.

That is, the voltage controlled oscillation means 102 may be configured so that the free running frequency is set to f _o .

Input signal The output of the voltage controlled oscillation means 102 In the case of the U side, the signal passing through the first low pass filter means 104 And the output of the second low pass filter means 105 on the V side Becomes

This is converted into a digital signal through the first and second analog / digital conversion means 106 and 107 and input to the phase error determination and data recovery means 108.

The signal point of the received signal from the data converted from the first and second analog / digital converting means 106 and 107 is determined through the receiving point determining means 108a and the signal point determining means 108e. ,

As an example, assuming that the signal point B1 of FIG. 5 is determined in this manner, the delay means 108d delays the symbol section T and the received signal point is determined again as before. Point B2 is created.

In this way, when successive reception signal points B1, B2 and B3 are determined, the respective phase differences, that is, the phase difference B1 and the phase difference ΔΦ between B2 are determined from the phase difference detecting means 108g.

From this phase difference, the data of the transmission signal is judged by the data determination means 108i.

In the asynchronous method, the input data is differentially encoded so that the absolute phase is not the information but the phase difference is the information, so the data can be effectively used even if the phase recovery is not perfect.

In order to use such a synchronous and asynchronous combined receiver, data must be differentially encoded and transmitted at the time of transmission.

As described in detail above, according to the present invention, the synchronous reception and the asynchronous reception can be configured as one system, and the user can receive in a synchronous or asynchronous manner according to channel characteristics.

Accordingly, an appropriate demodulation method is used according to channel characteristics, and thus, there is a suitable effect in the case where a lot of channel changes occur.

1 is a block diagram of a receiver using a conventional PLL method.

2 is a simplified block diagram of another embodiment receiver using a conventional differential demodulation method.

3 is a block diagram of a synchronous and asynchronous composite receiver of the present invention.

4 is a configuration diagram showing in detail the phase error determination and data recovery means of FIG.

FIG. 5 is an explanatory diagram showing correct data judgment about the signal reception point of FIG.

6 is an explanatory diagram showing a level crossing ratio for channel characteristic detection of FIG.

**** Explanation of symbols for the main parts of the drawing ****

100, 101: first and second mixing means 102: voltage controlled oscillation means

103: phase shift means 104, 105: first and second low pass filter means

108: daily error determination and data recovery means

Claims (2)

First and second analog / digital conversion means for receiving a phase difference between the received signal and the demodulated carrier obtained from the product of the input received signal and the signal oscillated by the voltage controlled oscillation means, and converting them into digital signals, respectively; Channel characteristic detection means for detecting channel characteristics in accordance with an output signal of the automatic gain control means; According to the channel characteristic of the channel characteristic detecting means, the received signal point is determined by the digital signal obtained through the first and second analog / digital converting means, and the correct signal point is found therefrom. Phase error determination and data recovery means for detecting a phase difference and outputting a phase error compensation signal when a phase difference is generated; And digital / analog conversion means for converting the phase error compensation signal obtained from the phase error determination and data recovery means into an analog signal to control the voltage controlled oscillation means. 2. The apparatus of claim 1, wherein the phase error determination and data recovery means comprises: reception point determination means for determining a signal point of a received signal from data converted from the first and second analog / digital conversion means; First, second, third and fourth switching members which are switched in accordance with the control signal of the channel characteristic detecting means to block and pass the receiving point signal determined by the receiving point determining means; Delay means for delaying outputting a reception point signal through the first switching member for a predetermined time; Signal point determining means for determining a received signal point from the received signal through the second switching member; Detecting the phase difference between the signal point of the signal point determination means through the third switching member and the reception point determined by the reception point determination means and the reception signal through the delay means, the phase difference signal is transmitted through the fourth switching member when a phase difference occurs. Phase difference detecting means input to the digital / analog converting means, And data determination means for determining and outputting transmission data based on the phase difference detected by the phase difference detecting means and the signal point determined by the signal point determining means.