KR100316584B1 - Flash Memory To Share With Booting And Main Operation Program In System And Upgrade Method In That Memory - Google Patents

Abstract

The present invention divides and uses a single flash memory into a bootable program area and an updateable execution program area, thereby reducing the size of the system and simultaneously reducing the system price. The present invention relates to a memory updating method. In the conventional system, boot memory and flash memory are implemented separately to store corresponding programs, and thus, the system price increases due to the implementation of separate boot memory and flash memory, and the size of the corresponding system. There was a big downside.

Therefore, the present invention does not use a separate boot memory for storing a booting program, and divides the flash memory so that the booting program is shared with the flash memory in which the executing program is stored, thereby reducing the number of memory chips, thereby reducing the size of the system. The system price can be reduced, and the system price can be lowered, thereby allowing the design of the system to be beautifully designed.

In addition, the present invention by moving the flash memory erase and write routine in the boot program area to the DRAM (Dynamic Random Access Memory) when updating the execution program of the flash memory sharing the boot program and the execution program, thereby performing the corresponding boot program Only protected programs can be updated while protected.

Description

Flash memory to share with booting and main operation program in system and upgrade method in that memory}

The present invention relates to a flash memory sharing a booting and executing program in a system, and a method of updating the memory thereof. In particular, by using one flash memory divided into a bootable program area and an updateable execution program area, The present invention relates to a flash memory and a method of updating the memory that share a booting and executing program in a system so that the system price can be lowered at the same time.

In general, various systems performing a predetermined function according to electronic control are a main operating program for performing a predetermined function by controlling and processing all operations, and initial booting and rebooting according to updating and updating of the executing program. Booting program for the (Booting Program) is required, and these execution programs and booting programs are stored in separate memory.

This will be described in detail with reference to FIG. 1, the system includes a central processing unit 11 for controlling and processing all operations, a boot memory 12 for storing a boot program, and a program for storing Flash memory 13 and a DRAM (Dynamic Random Access Memory) 14 required to execute the execution program stored in the flash memory 13, the boot memory 12 and the flash memory ( 13 is implemented with nonvolatile memory, and the corresponding DRAM 14 is implemented with volatile memory.

In this case, the boot memory 12 is rarely upgraded after the system is mass-produced. Therefore, a programmable read only memory (PROM) that is not rewritable or erasable and PROM that can be electrically erased and rewritten. ), Which is used for the initial power supply, the flash memory access function for updating the execution program of the flash memory 13, and the boot program for performing the reboot function according to the update of the execution program. Include the program.

The flash memory 13 stores an execution program executed in the DRAM 14 and is implemented as a memory that can be erased by a command and a programmable memory so that the execution program can be updated.

When the initial power is supplied in the system configured as described above, the CPU 11 reads a booting program stored in the boot memory 12 as an initial operation and performs booting. In this case, the booting stored in the boot memory 12 is performed. By moving the program and the diagnostic program to the DRAM 14 and simultaneously moving the execution program stored in the flash memory 13 to the DRAM 14, the link pointer is moved to the DRAM 14 so that the execution program can be executed. The booting is completed with the system operating normally.

In this case, referring to a boot memory and a flash memory structure of FIG. 2 attached to a flash memory by a boot program of a boot memory in a corresponding system, a boot memory (ROM Writer) may be used by a ROM writer during system mass production. 12) Only the boot program is fused, and the corresponding flash memory 13 is empty. Therefore, when the hardware test for the corresponding system is completed, the execution program to be stored in the flash memory 13 is downloaded from the external system through a predetermined interface. Will receive.

In this case, the downloaded execution program is temporarily stored in the DRAM 14 by the central processing unit 11, and the central processing unit 11 executes a boot program of the boot memory 12 to execute the flash memory 13. After the deletion, the execution program stored in the DRAM 14 is recorded in the corresponding flash memory 13 in bytes or words, and when the recording is completed, the relevant system is rebooted to the downloaded execution program. It will operate normally.

After the system is installed in the actual field, if there is a need to update the execution program, the execution program to be updated is downloaded by using the boot program in the same manner as the above-described operation, and the current execution of the flash memory 13 is performed. After the program is deleted, the execution program to be updated is recorded in the flash memory 13, and the system is rebooted to operate normally with the updated execution program.

On the other hand, in the conventional system that can update the execution program as described above, since the boot memory and the flash memory are implemented separately to store the corresponding programs, the system price increases due to the implementation of a separate boot memory and the flash memory. However, the size of the system was a big disadvantage.

The present invention has been made to solve the above-mentioned problems, and an object thereof is not to use a separate boot memory for storing a booting program, but to share the corresponding flash memory so that the booting program is shared with the flash memory in which the execution program is stored. By dividing, the number of memory chips can be reduced to reduce the size of the system and at the same time reduce the price of the system, thereby allowing the design of the system to be beautifully designed.

Another object of the present invention is to move the flash memory erase and write routines present in the boot program area to the DRAM when updating the execution program of the flash memory sharing the boot program and the execution program to the DRAM, thereby protecting the boot program. It is to be able to update only the execution program.

1 is a schematic structural block diagram of a system for storing a booting program and an executing program in separate memories.

FIG. 2 is a diagram illustrating a memory structure for explaining a flash memory access procedure by a boot program of a boot memory in FIG. 1; FIG.

3 is a schematic structural block diagram of a system having a flash memory sharing a bootable program and an updateable executable program according to the present invention;

FIG. 4 is a diagram showing the detailed structure of a flash memory in FIG.

5 is a flowchart of a program executing operation of a flash memory in the system according to the present invention.

6 is a flowchart of a program performing operation for writing a flash memory in a system according to the present invention.

7 is a schematic structural block diagram of a router having a flash memory sharing a bootable program and an updateable executable program according to the present invention.

Explanation of symbols on the main parts of the drawings

31: central processing unit 32: flash memory

33: DRAM

A feature of the present invention for solving the above object is divided into a boot program area for storing boot and diagnostic programs and an updateable execution program area based on a predetermined number of sectors, and the boot program area is to be updated. It includes a part that downloads the execution program, a part that calls the flash access function to record the downloaded execution program, a flash access function programmed by the assembly code, and a part that is moved to the DRAM to perform flash memory erase and write routines. In the system, characterized in that for implementing a flash memory sharing boot and execution program.

Another aspect of the invention, the process of downloading the execution program to be updated from the external system; Moving the flash memory erase and write routines existing in the boot program area of the flash memory to the DRAM using the assembly code; Booting and executing a program in the system, wherein the erase and write operation is performed on the execution program area of the flash memory and the corresponding execution program is updated according to the flash memory erase and write routine moved to the DRAM. The present invention provides a method of updating a shared flash memory.

The method may further include storing an address where the link pointer returns to the booting program area after deleting and writing the execution program before moving the flash memory erasing and writing routine to the DRAM.

Furthermore, moving the link pointer to a start address of the flash memory erase and write routine moved to the DRAM to update a performance program corresponding to the flash memory erase and write routine moved to the DRAM; And returning a link pointer to the booting program area after updating the execution program.

The updating of the execution program of the flash memory may include deleting the execution program area in sector units according to a flash memory erase routine moved to the DRAM; According to the flash memory write routine moved to the DRAM, characterized in that it further comprises the step of recording the execution program downloaded to the execution program area by byte unit.

The deleting of the execution program area in sector units may include: issuing a sector delete command of the execution program area according to the flash memory erasing routine; Checking whether the sector deletion is completed by using a data polling method; And if the sector deletion is completed, selecting the next sector and repeating sector deletion until the last sector of the execution program area is deleted. The execution program downloaded to the execution program area is recorded in byte units. The method may include: issuing a byte write command of an execution program according to the flash memory write routine; Checking whether the byte write is completed using a data polling method; And if the byte recording is completed, selecting the next address area in units of bytes and repeating the byte recording of the execution program until the last address of the execution program area is recorded.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

The system according to the present invention, that is, a system having a flash memory sharing an updatable execution program and a bootable program, includes a central processing unit 31 for controlling and processing all operations, as shown in FIG. A flash memory 32 for sharing a program and an execution program, and a DRAM 33 necessary for executing the execution program stored in the flash memory 32 or performing an update function for the execution program. That is, instead of using a separate boot memory, a part of the flash memory 32 is used as a boot program area.

In this case, the flash memory 32 sharing the booting program and the execution program is divided into a booting program area and an execution program area based on a predetermined number of sectors, as shown in FIG. 4.

For example, in the case of the flash memory 32 having a size of 2 Mbyte, each sector includes a total of 32 sectors having a size of 64 Kbyte, and eight sectors up to the corresponding sector '0 to 7' are used as the booting program areas. The 24 sectors of the sectors '8 to 31' are used as execution program areas.

At this time, the address map for the flash memory has a address starting with hexadecimal '0x20000000'.

Meanwhile, the booting program area includes a booting and diagnostic program, and includes a part for downloading an execution program to be updated, a part for calling a flash access function that records the downloaded execution program in the flash memory 32, and , A flash access function programmed with assembly code, and a portion which is moved to the actual DRAM 33 to perform a flash memory erase and write routine.

A flash memory update method, that is, a method of dividing and using a bootable program area and an updateable execution program area in a system according to the present invention configured as described above is as follows. The solution to the problems that may occur when sharing to (32) and the size of the printed circuit board (PCB) by reducing the size of the printed circuit board (PCB) by not using a separate boot memory to store the boot program, The discussion focuses on reducing system size.

When the execution program is updated at the time of mass production of the system or later, the execution program downloaded from the external system cannot be directly recorded in the flash memory 32, and the deletion of the execution program previously stored in the flash memory 32 must be preceded. This is because the routine for deleting and writing the corresponding flash memory 32 exists in the boot program area of the flash memory 32, and after the CPU 31 issues the delete command to the flash memory 32, This is because the code for performing the next command cannot be read in the boot program area of the memory 32.

In addition, even when the downloaded execution program is actually recorded in the flash memory 32 after the execution program previously stored in the flash memory 32 is deleted, the command cannot be executed.

Therefore, in order to update the execution program of the flash memory 32 sharing the booting and execution program in the system according to the present invention, the DRAM 33 deletes and writes the flash memory erasing and writing routine existing in the boot program of the flash memory 32. The execution program deleting and writing operations of the corresponding flash memory 32 are performed by moving to. First, the execution program deleting operation stored in the flash memory 32 in the corresponding system will be described with reference to FIG. 5. Same as

When the central processing unit 31 of the corresponding system receives the execution program to be updated from the external system (step S51), it deletes the execution program stored in advance in order to record it in the flash memory 32. When the deletion of the execution program of the memory 32 ends, the link pointer of the central processing unit 31 stores the address to be returned to the original boot program area on the stack (step S52), and then the flash memory. The flash memory erasing routine existing in the boot program area of 32 is moved to the DRAM 33 (step S53).

Then, the link pointer of the central processing unit 31 is moved from the current flash memory 32 to the start address of the flash memory erase routine of the DRAM 33 so that the next command can be read and executed by the DRAM 33. (Step S54).

At this time, in order to move the link pointer of the CPU 31, the stack for temporarily storing the link pointer must be controlled. Therefore, in the C language, implementation is difficult, and coding is performed using assembly code.

Then, all interrupts of the central processing unit 31 are disabled before the flash memory deletion is performed. The reason for this is that an interrupt is generated to the central processing unit 31 after the corresponding flash memory deletion command is issued. This is because the CPU 31 performs an incorrect command to read the interrupt vector table of the booting program area in order to service the interrupt. That is, after the corresponding flash memory erase command is issued, the read command cannot be performed except for data polling.

Here, data polling refers to a method of determining whether the corresponding flash memory is erased or written by reading a specific data bit indicating whether the corresponding erase or write is completed after the flash memory erase or write command.

On the other hand, as the link pointer of the central processing unit 31 is moved to the start address of the flash memory erasing routine moved to the DRAM 33 in step S54, the flash memory erasing routine is performed by the DRAM 33.

Therefore, in the state where the boot program area of the flash memory 32 is protected, the CPU 31 issues a sector delete command of the execution program area according to the flash memory erase routine (step S55), and then executes the data polling method. It periodically checks whether or not the corresponding sector deletion is completed (steps S56 and S57).

At this time, when the sector deletion is completed, the CPU 31 determines whether the deletion of all sectors included in the execution program area of the flash memory 32 is completed, that is, whether the currently deleted sector is the last sector of the execution program area. (Step S58), if the currently deleted sector is not the last sector in the execution program area, the sector number is increased by '1' to select the next sector (step S59), and the corresponding sector delete command is executed. By returning to step S55 to perform the repetitive operation, all sectors included in the execution program area of the flash memory 32 can be deleted in sequence.

On the other hand, when the sector currently deleted in step S58 is the last sector of the execution program area, that is, when all sectors included in the execution program area of the flash memory 32 are deleted, the flash memory erasing routine in the DRAM 33 is performed. Then, the link pointer of the central processing unit 31 returns to the original boot program area (step S60).

When the execution program deleting operation of the flash memory 32 is completed by the above-described operation, the CPU 31 writes the downloaded execution program to the corresponding flash memory 32 in byte units. The execution program recording operation of 32) will be described in detail with reference to FIG. 6 as follows.

After the CPU 31 deletes the execution program of the flash memory 32, the flash memory writing routine for writing the execution program downloaded from the external system to the flash memory 32 in byte units ends. If the link pointer of the central processing unit 31 stores the address to be returned to the original boot program area on the stack (step S61), the link pointer of the central processing unit 31 exists in the boot program area of the corresponding flash memory 32. The flash memory writing routine is moved to the DRAM 33 (step S62).

Then, the link pointer of the central processing unit 31 is moved from the current flash memory 32 to the start address of the flash memory write routine of the DRAM 33 so that the next command can be read and executed by the DRAM 33. (Step S63).

After that, all interrupts of the central processing unit 31 are disabled before performing the flash memory write so that the read command cannot be performed except for data polling after the flash memory write command is issued.

On the other hand, as the link pointer of the central processing unit 31 is moved to the start address of the flash memory write routine moved to the DRAM 33 in step S63, the flash memory write routine is executed by the DRAM 33.

Therefore, in a state in which the boot program area of the flash memory 32 is protected, the CPU 31 issues a byte write command to write the downloaded program in bytes according to the flash memory write routine (step). In step S64), it is periodically checked whether the corresponding byte recording is completed by using the data polling method (steps S65 and S66).

At this time, when the byte recording is completed, the CPU 31 checks whether all the byte recording corresponding to the size of the execution program area of the flash memory 32 have been completed, that is, the address where the current byte is written is the last address of the execution program area. If the address written in the current byte is not the last address of the execution program area, the address value of the corresponding byte unit is increased by '1' to select the next address area (step S68). By performing a repetitive operation by returning to step S64 for giving a corresponding byte write command, the execution program downloaded to the flash memory 32 can be sequentially recorded and updated in byte units.

On the other hand, when the address written in the current byte in step S67 is the last address of the execution program area, that is, when all the byte writing corresponding to the execution program area size of the corresponding flash memory 32 is completed, the flash memory in the DRAM 33 is completed. The recording routine is terminated, and the link pointer of the central processing unit 31 returns to the original boot program area (step S69), whereby the system can be rebooted to execute the updated execution program.

As shown in FIG. 7, a router according to another embodiment of the present invention includes a central processing unit 71 for controlling and processing all operations, a flash memory 72 sharing a booting and executing program, A configuration memory 73 for storing setup information, statistical information, and configuration information for a router for performing various protocols in the central processing unit 71, a power supply unit 74 for supplying driving power, and a personal computer (PC). A console unit 75 connected to a monitor such as a display unit for displaying messages and management information required by a user or an administrator, a LAN interface unit 76 connected to a local area network (LAN) to transmit and receive data, and an external communication network. Wide area network (WAN) interface unit 77 for transmitting and receiving data, input / output interface unit 78 used when other necessary input and output functions are required, and flash memory 72. Executing a program operation, and is achieved by having the DRAM (79) for temporarily storing data received via a respective interface unit (76 ~ 78).

In this case, when the flash memory 72 has a size of 2 Mbytes, the address map for the flash memory 72 may be 16 as shown in Table 1 below. It has address starting with '0x20000000' and contains 32 sectors each with 64Kbyte size, 8 sectors up to sector '0 ~ 7' are used as boot program area, and sector '8 ~' 24 sectors up to 31 'are used as the execution program area.

Start address device Explanation 0x00000000 DRAM For running executable programs 0x10000000 Configuration memory For storing configuration and statistical information 0x20000000 Flash memory For storing boot and executable programs 0x90000000 System identifier For storing information about the system and board Reserved Reserved Reserved

In addition, the boot program area of the flash memory 72 includes a booting and diagnostic program, a part for activating each interface unit to download an execution program, and a part for calling a flash access function for writing to the flash memory after downloading. A flash access function programmed in assembly code, and a portion which is moved to a real DRAM to perform flash memory erase and write routines.

On the other hand, the router receives the execution program through the LAN interface unit 76 or the WAN interface unit 77 when the execution program is updated, and subsequently deletes the execution program of the flash memory 72 for updating the execution program. And the recording operation is performed in the same manner as the above-described operation.

In this case, when the execution program of the flash memory 72 is deleted, the sectors 0 to 7 stored in the boot program of the flash memory 72 are deleted to the sectors 8 to 31 in a protected state, and the downloaded execution program is deleted. The flash memory erase and write operations are performed by the DRAM 79 to write to the flash memory 72 in units of bytes.

In addition, the embodiments according to the present invention are not limited to the above-described embodiments, and various alternatives, modifications, and changes can be made within the scope apparent to those skilled in the art.

As described above, the present invention does not use a separate boot memory for storing a boot program, and divides the flash memory so that the boot program is shared with the flash memory where the execution program is stored, thereby reducing the number of memory chips. The size of the system can be reduced and the price of the system can be lowered, thereby allowing the design of the system to be beautifully designed.

In addition, the present invention is performed by moving the flash memory erase and write routines present in the boot program area to the DRAM when updating the execution program of the flash memory sharing the boot program and the execution program to the DRAM, thereby protecting the execution program in the state of protecting the boot program Only update is possible.

Claims (7)

Based on a predetermined number of sectors, a booting program area for storing booting and diagnostic programs and an updateable execution program area are divided, and the booting program area records a part for downloading the execution program to be updated and a downloaded execution program. A flash sharing function, comprising: calling a flash access function; a flash access function programmed in assembly code; and a part moved to DRAM to perform flash memory erase and write routines. Memory. Downloading a performance program to be updated from an external system; Moving the flash memory erase and write routines existing in the boot program area of the flash memory to the DRAM using the assembly code; Booting and executing a program in the system, wherein the erase and write operation is performed on the execution program area of the flash memory and the corresponding execution program is updated according to the flash memory erase and write routine moved to the DRAM. How to update a shared flash memory. The method of claim 2, And storing the address where the link pointer is returned to the boot program area after deleting and writing the execution program before moving the flash memory deletion and writing routine to the DRAM. How to update flash memory. The method of claim 2, Moving a link pointer to a start address of a flash memory erase and write routine moved to the DRAM to update a corresponding execution program according to the flash memory erase and write routine moved to the DRAM; And returning a link pointer to the booting program area after updating the execution program. The method of claim 2, The updating of the execution program of the flash memory may include deleting the execution program area in sector units according to a flash memory erase routine moved to the DRAM; And writing a downloaded execution program in the unit of byte in the execution program area according to a flash memory write routine moved to the DRAM in a unit of byte. The method of claim 5, The deleting of the execution program area by sector may include: issuing a sector delete command of the execution program area according to the flash memory erasing routine; Checking whether the sector deletion is completed by using a data polling method; And if the sector deletion is completed, selecting a next sector and repeating sector deletion until the last sector of the execution program area is deleted. The method of claim 5, The recording of the execution program downloaded in the execution area by the byte unit may include: issuing a byte write command of the execution program according to the flash memory write routine; Checking whether the byte write is completed using a data polling method; Selecting a next address area in bytes and repeating the byte recording of the execution program until the last address of the execution program area is recorded when the byte recording is completed. How to update a shared flash memory.