KR100311228B1 - Cell/Packet Switching System With Multiple Plane Operation - Google Patents

Abstract

The present invention relates to a cell / packet switching system for switching a large-capacity crosspoint / crossbar switch that is matched with serial bit stream input / output at high speed. In order to provide a cell / packet switching system composed of four planes, a cell / packet switching system composed of a plurality of planes implementing a large-capacity switch that switches cells or packets at high speed into an asynchronous crosspoint or crossbar switch. Input / output buffering means for storing and waiting for the inputted cell / packet; Cross-pointer / crossbar switching means composed of a plurality of planes for matching and switching to the input / output buffering means and a high speed serial bit stream input / output; Performs an arbitration function for output control of the cells / packets stored in the input / output buffering means, outputs shape change information to the crosspointer / crossbar switching means, and sequentially activates the plurality of crosspointer / crossbar switching means Cell arbitration means for outputting shape change information for use in a high speed cell / packet switching system.

Description

Cell / Packet Switching System With Multiple Plane Operation

The present invention relates to a cell / packet switching system composed of a plurality of crosspoint / crossbar switches for switching high-capacity crosspoint / crossbar switches that are matched with serial bit stream input / output at high speed (in cell or packet units).

At present, due to the explosive demand of the Internet, communication services requiring high transmission bandwidth are increasing. Accordingly, Fiber Channel or Gigabit Ethernet interfaces have emerged one after another to provide a user with a gigabit interface.

Switch capacities are also increasing to dozens of gigabits or terabits. It is generally accepted that a crosspoint / crossbar switch structure having a serial bit stream input / output matching structure is most suitable for implementing such a high-capacity high-speed switch.

Commercial device manufacturers are responding to these demands by building and supplying devices for low-cost fiber channels and gigabit serial interfaces, and crosspoint / crossbar switches with serial bitstream inputs and outputs. The serial interface speed of these devices and the serial input / output speed and capacity of crosspoint / crossbar switches are also increasing. Therefore, when constructing a system using such a commercial element, it is possible to construct a low-cost and economical system.

Meanwhile, the Broadband Telecommunication Network (B-IDSN), which accommodates various services such as teleconference, distance education, home shopping, and online games, is also rapidly developing. As an optimal transmission method to accommodate this, Asynchronous Transfer Mode (hereinafter referred to as 'ATM') has been adopted as the next-generation standard transmission method.

Compared to packet-level switching such as the Internet, ATM guarantees the quality of service according to the characteristics of transport traffic, and ultimately, all transmission methods will be integrated into ATM method. In the ATM transmission method, input data is divided into ATM cells having a size of 53 bytes and transmitted. In this ATM transmission method, an ATM switch is essential. Therefore, there is a need to construct a large-capacity ATM switch network that accommodates interfaces such as Gigabit Ethernet and Fiber Channel.

In order to construct an interface compatible and economical system for constructing such a large-capacity ATM switch network, a commercially available gigabit Ethernet and fiber channel interface element and a crosspoint / crossbar switch element with serial bit stream input and output are generally used. have.

The structure of the crosspoint / crossbar switch is divided into synchronous and asynchronous, and the synchronous crosspoint / crossbar switch has a limitation in increasing the parallel or serial input / output operation speed due to its internal structure. In contrast, asynchronous crosspoint / crossbar switches are mechanically switched, so the serial input / output operation speed continues to increase.

When the switch configuration using the crosspoint / crossbar according to the prior art is largely divided into three, first, the technology to configure and operate the ATM switch in a double plane to improve the reliability, second, to improve the capacity of the switch network In order to reduce the impact on the switch due to an error, the ATM switch is composed of a plurality of planes to perform parallel switching. Finally, the ATM switch is composed of a plurality of crosspoint planes. Looking at the following three prior art as an example.

1 is a block diagram of an embodiment of an ATM switching system constructed and operated in a dual plane according to the prior art. With reference to this, a technique for improving switching reliability will be described.

A method for configuring and operating an ATM switch in dual planes (Patent Number: 5,436,886, ATM switch in dual switch plane operation, 1995.7.25) is shown in FIG. 1, as shown in FIG. 121).

The switching planes 131 and 132 are dually configured for reliability. In addition, the line card 111 is also configured as a dual, and the multiplexer 121 performs a fully double connection control function with the duplicated line card 111 or the switching planes 131 and 132. However, when switching 53 octets of short size cells such as ATM at high speed, any failure or failure can occur, and a large amount of cells are lost. In this case, the reliability of the switching service system, in particular, the exchange, is low, and can be fatal for a large number of subscribers who have been served by the exchange. Accordingly, the present invention relates to a technique of improving reliability by putting a separate alarm bit in a cell to be switched and performing redundant switching as soon as an abnormality on each component and a double connection line is found. In particular, the output from the multiplexer 121 may select and output data of the same line card 111 or switch planes 131 and 132, and in the case of failure or failure, different line cards 111 or switch planes 131 and 132, respectively. Select and output the input data of).

FIG. 2 is a block diagram of an exemplary embodiment of a switching system for performing configuration parallel switching with multiple planes according to the prior art. The technique of improving the capacity of the switch network will be described with reference to this.

(Patent Number: US 5,832,303, Large Scale Interconnecting Switch Using Communication Controller Groups With Multiple Input-To-One Output Signal Lines and Adaptable Crossbar Unit Using Plurality Of Selector) In order to increase the capacity of the switch network, as shown in FIG. 2, the data processing unit 211 to 214, the communication control unit 221 to 224, the switch mediation unit 231, and the plurality of crossbar switches 241 to 244 are configured.

When the capacity of the switch network is increased, the number of communication control units 221 to 223 and data processing units 211 to 214 increases. However, the switch arbitration unit 231 is a means for controlling a data collision of the switch. As the communication control units 221 to 224 increase, the switch arbitration unit 231 needs to have more signal lines to interface with, and the implementation becomes complicated.

In order to overcome this limitation, the communication control units 221 to 222, 223 to 224 are grouped into four units, and only one communication control unit 221 to 222, 223 to 224 for each group outputs routing request information to the switch mediation unit 231. Doing. For this purpose, routing request information for each group is transmitted and received on a bus, and one of four communication controllers 221 to 224 operates as a master for arbitration of the bus. For example, the communication control units 221 and 223 having the serial number at the forefront perform the bus arbitration function. That is, when data is inputted from the data processing units 211 to 214 to the communication control units 221 to 224, the remaining three slave communication controllers ˜222 and 224 respectively request master information for bus arbitration. It transmits to the control part 221,223. Each master communication controller 221, 223 receiving the arbitration request performs bus arbitration for the four communication controllers 221 to 222 and 223 to 224 to permit the use of the bus for any of the communication controllers 221 to 224. .

The communication control units 221 to 224 that have received the bus usage permission from the respective master communication control units 221 and 223 transmit the routing request information to the switch arbitration unit 231 and receive the routing permission information. The communication controllers 221 to 224 output corresponding data to the crossbars 241 to 244 according to the routing permission information. The crossbars 241 to 244 simultaneously switch a plurality of data output from the communication control units 221 to 224 in parallel and then output them to the communication control units 221 to 224. The communication controllers 221 to 224 convert the input parallel data and output the same to the data processor 211 to 214.

3 is a block diagram of an exemplary embodiment of a high-capacity fault tolerance switch system using a plurality of magnetic path crosspoint planes according to the prior art. With reference to this, a description will be given of a technique for reducing the effect of an error occurrence on the switching system.

Large Fault Tolerant Packet Switch Particularly Suited for ATM Communication uses a plurality of magnetic path crosspoint planes (Input Numbers 311 to 313) and Multiple Magnetic Path Cross Pointer planes (321 to 323, the output buffers 331 ˜ 333, and the connection mediation unit 341.

The input buffers 311 to 313 store the input cells / packets in the buffer and output the group routing request information to the connection arbitration unit 341. Upon receiving the routing grant information from the connection arbitration unit 341, the input buffers 311 to 313 output cells / packets to the plurality of cross-pointer planes 321 to 323.

The plurality of cross-pointer planes 321 ˜ 323 output K to the output buffers 331 ˜ 333 after performing K group switching functions on the input cells / packets.

The output buffers 331 ˜ 333 receive the group cells / packets inputted from the plurality of magnetic path cross-pointer planes 321 ˜ 323, and perform a separate routing function to output the same.

On the other hand, the magnetic path cross-pointer plane (321 to 323) does not have a function of directly matching with the connection mediation unit 341 for the shape change. Instead, the shape change function is performed using the routing address of the input cell / packet. Since the shape change of the cross pointer planes 321 to 323 must be made before the cell / packet is input, the input cell / packet is input with the shape information of the cell / packet to be input next. Therefore, the cross-pointer planes 321 to 323 change the shape for switching the next cell / packet using the received shape information at the end of the switching of the input cell / packet. In this case, the input buffers 311 to 313 add a routing address of a cell / packet to be output next to an invalid cell / packet when initialization or power is supplied.

As another feature, the plurality of cross-pointer planes 321 to 323 are sequentially operated at predetermined time intervals. This is due to the arbitration time (tc) used by the connection arbitration unit 341 to arbitrate one cross-pointer plane and requires time of n * tc to perform arbitration on n cross-pointer planes. Accordingly, the connection mediator 341 sequentially outputs the arbitration information, and the plurality of self-path cross-pointer planes 321 to 323 also operate with the cell time interval at the interval of tc. That is, when the first self-path cross-pointer plane 321 starts transmitting the cell, the second self-path cross-pointer plane 322 starts transmitting the cell after the arbitration time (tc) and the K-th self after the cell time interval. The path crosspointer plane 323 begins to transmit the cell.

In addition, since it is composed of a plurality of magnetic path cross-pointer planes (321 to 323) and group switching, there is almost no effect on the overall performance even if a failure occurs in any line.

However, as described above, when using an asynchronous crosspoint / crossbar switch, bit synchronization and word synchronization are lost due to internal path delay deviation during shape change, so that the switched output data cannot be temporarily guaranteed. Therefore, the asynchronous crosspoint / crossbar switch needs to perform bit synchronization and word synchronization again for each output port, and requires an acquisition time for this. Additional time for this can be added to the cell or packet by increasing the operating speed of the I / O data of the crosspoint / crossbar switch. However, unlike a packet with a relatively large size, the size of an ATM cell is 53 octets, and when the transmission rate of 53 octets is converted based on STM-4c, the cell time is about 700ns and STM-16c. Based on this, it is about 175ns.

As described above, the large-capacity crosspoint / crossbar switch matched with serial input / output bit stream input / output has a problem in that bit and word synchronization are lost during switching.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems. The present invention provides the same operation by sequentially configuring and activating multiple planes to compensate for separate time intervals for bit and word synchronization of the output data of the asynchronous crosspoint / crossbar switch. It is an object of the present invention to provide a cell / packet switching system composed of a plurality of planes switching at an input / output operation speed.

1 is a block diagram of an embodiment of an ATM switching system constructed and operated in a dual plane according to the prior art.

2 is a block diagram of one embodiment of a switching system for performing parallel switching in multiple planes according to the prior art;

3 is a block diagram of an embodiment of a large capacity fault tolerant switch system using a plurality of magnetic path crosspoint planes according to the prior art;

4 is a block diagram of an embodiment of a fast cell / packet switching system comprised of a plurality of plane crosspoints / crossbars in accordance with the present invention;

5 is a block diagram of an embodiment of the input / output buffer of FIG. 4 in accordance with the present invention.

6 is a detailed timing diagram for outputting data in FIGS. 4 to 5 according to the present invention;

Explanation of symbols on the main parts of the drawings

4100,4200,4300: I / O buffer 4500: Cell / packet arbitration unit

4410, 4420, 4430: Cross Pointer / Crossbar Switches

5110: line interface 5120: input buffer

5140,5150,5160: Switch Interface

5130: multiplexer

The present invention for achieving the above object, in the cell / packet switching system consisting of a plurality of planes to implement a large-capacity switch for switching a cell or packet at high speed as an asynchronous crosspoint or crossbar switch,

Input / output buffering means for storing and waiting for the cell / packet inputted at high speed;

Cross-pointer / crossbar switching means composed of a plurality of planes for matching and switching to the input / output buffering means and a high speed serial bit stream input / output; Performs an arbitration function for output control of the cells / packets stored in the input / output buffering means, outputs shape change information to the crosspointer / crossbar switching means, and sequentially activates the plurality of crosspointer / crossbar switching means Cell arbitration means for outputting shape change information.

Hereinafter, with reference to the accompanying drawings will be described an embodiment of the present invention;

4 is a block diagram of an embodiment of a fast cell / packet switching system composed of a plurality of plane crosspoints / crossbars in accordance with the present invention. 4, a high speed cell / packet switching system of the present invention will be described in detail.

The switching system of the present invention includes a plurality of input / output buffers 4100, 4200 and 4300 having a plurality of high speed cell / packet matching functions, and a plurality of plane asynchronous high speed crosspoint / crossbar switches 4410, 4420 and 4430 having a high speed serial bit stream matching function. And a cell / packet arbiter 4500 that arbitrates the output for the input cells / packets.

The input / output buffers 4100, 4200, and 4300 store a cell / packet input at a high speed in a buffer and perform a function of waiting. The high-speed serial bit stream is transmitted to the plurality of plane asynchronous crosspoint / crossbar switches 4410, 4420, and 4430 to be matched with the input / output.

The cross-pointer / crossbar switches 4410, 4420, and 4430 may perform bit synchronization and word synchronization functions during periods in which the serial bit streams received from the plurality of input / output buffers 4100, 4200, and 4300 are inactive. Next, the cross-pointer / crossbar switches 4410, 4420, and 4430 perform a function of outputting the received cell / packet data during the active period.

The plurality of plane asynchronous crosspoint / crossbar switches 4410 to 4430 match high-speed serial bit streams output from the input / output buffers 4100, 4200, and 4300 to input / output. In addition, a plurality of plane cross-pointers are configured to configure the asynchronous cross-pointer / crossbar switches 4410 to 4430 to perform the switching function, and to compensate for data acquisition time due to the loss of bit sync and word sync caused when the shape change necessary in the asynchronous switching scheme. After the / crossbar switch (4410 ~ 4430) is configured to operate sequentially.

The plurality of plane asynchronous cross-pointer / crossbar switches 4410 to 4430 are subjected to shape change control by the cell / packet arbitration unit 4500.

The cell / packet arbitration unit 4500 performs an arbitration function for output control of cells / packets stored in the buffers of the input / output buffers 4100, 4200, and 4300. Then, the shape change information is output to the plurality of plane crosspoint / crossbar switches 4410 to 4430. In particular, the plurality of plane cross-pointer / crossbar switches 4410 to 4430 are sequentially activated to output shape change information.

5 is a configuration diagram of an input / output buffer of FIG. 4 according to the present invention. 4 to 5, the configuration and operation of the input / output buffer of the present invention will be described in detail.

The input / output buffers 4100, 4200, and 4300 include a line interface 5110, an input buffer 5120, a multiplexer 5130, and a switch interface 5140 to 5160 as shown in FIG. 5.

High-speed cells / packets 4101, 4201, and 4301 are input to the input / output buffers 4100, 4200, and 4300. The serial clock is found from the data received from the receiver of the line interface 5110 of FIG. 5 (4101, 4201, 4301), and bit synchronization and word synchronization are performed using a predetermined pattern. After word synchronization, the data is outputted to the input buffer 5120 (5111). The input buffer 5120 stores the data 5111 input from the line interface 5110 in an internal buffer, waits, and outputs the routing request information to the cell / packet arbitration unit 4500 (4511, 4512, and 4513).

The cell / packet arbitrator 4500 cross-points / crossbar switches 4410 to 4430 from the plurality of input / output buffers 4100, 4200, and 4300 using the routing request information 4511 to 4513 received from the input buffer 5120. After performing the arbitration function on the output of the furnace, routing permission information 4511 to 4513 is output to each input buffer 5120.

The input buffer 5120, which has received the routing permission information 4511 to 4513 from the cell / packet arbitration unit 4500, outputs the cell / packet data that is waiting to the switch interfaces 5140, 5150, and 5160 (5121). In this case, the input buffer 5120 simultaneously inputs cell / packet data to the plurality of switch interfaces 5140, 5150, and 5160 for matching with the crosspointer / crossbar switches 4410 ˜ 4430 that operate with a plurality of planes.

The transmitter of the switch interfaces 5140, 5150, and 5160 converts the inputted cell / packet data 5121 into parallel / serial conversion and outputs them to the cross-pointer / crossbar switches 5410, 5520, 5430 in the form of a high speed serial bit stream. (4141, 4151,4161).

Meanwhile, the cell / packet arbitration unit 4500 performs the arbitration function on the input buffer 5120 and then outputs shape change information 4531 to 4533 to the crosspointer / crossbar switches 4410 to 4430. At this time, the shape change information is not simultaneously output to the plurality of crosspoint / crossbar switches 4410 to 4430, and the plurality of plane crosspoint / crossbar switches 4410 to 4430 are sequentially activated. In addition, information about the activated plane (4521,4522,4523) is output to the input and output buffers (4100 ~ 4300).

The plurality of cross-pointer / crossbar switches 4410, 4420, 4430 may include high-speed serial bit stream data 4141, 4151, 441, 4241, 4241, 441, 4435, 4361 is switched to output 4414, 4200, 4300 to output 4414, 4222, 4422, 4422, 4422, 4422, 4432, 4432, 4362. At this time, the shape change information 4531 to 4533 of the cross-pointer / crossbar switches 4410, 4420, and 4430 are controlled by the cell / packet arbitration unit 4500.

The cell / packet arbitration unit 4500 outputs shape change information only for the selected active plane of the plurality of planes. The cross-pointer / crossbar switches 4410 to 4430 activated by receiving the shape change information transition to the inactive plane immediately after switching cells / packets to perform the shape change function. This is so that the crosspointer / crossbar switches 4410 to 4430 prepare to switch fast cells / packets to be input during the next active cycle.

Due to the asynchronous nature, the bit synchronization and word synchronization for the high speed serial bit stream are lost. Thus, the inactive plane is not active for time for lost bit sync and word sync acquisition. That is, the plurality of plane crosspoint / crossbar switches 4410 to 4430 are sequentially activated by the cell / packet arbitrator 4500 to operate.

On the other hand, the number (m) of cross-pointer / crossbar switches 4410 to 4430 is variable depending on the bit synch and word synch acquiring time t _WA and the cell / packet time t _S and m = (t _WA / t _S ) to be.

As an example, when the cell / packet time t _S = 200 ns and the bit synch and word sync acquisition time t _WA = 900 ns, the number of planes m = 5. Therefore, a short size high-speed cell / packet can be switched to a serial bit stream by the plane variable of the asynchronous crosspoint / crossbar switches 4410 to 4430.

On the other hand, the input buffer 5120 does not immediately output the cells waiting in the buffer after receiving the routing permission information from the cell / packet arbitration unit 4500, and m times the cells by the operation of the cross-pointer / crossbar means as described above. Print after a packet time interval.

The receivers of the switch interfaces 5140, 5150, and 5160 provide high-speed serial bit streams 4414, 4422, 4422, 4242, 4422, 4422, 4432, 4302, 4320, 4320, 4302, 4302, 4302, 4302, 4302, 4320, 4302, 4302, 4302, 4302, 4320, 4320, 4302, 4222, 4402, 4432 4362). And the information about the active / inactive plane 4452 is received from the cell / packet arbitration unit 4500.

If the switch interfaces 5140, 5150, and 5160 input data from the active plane using the active / inactive plane information 4452, the switch interfaces 5140, 5150, and 5160 output the data input to the multiplexer 5130, 5131 to 5133. In the inactive plane mode, the bit synchronization and the word synchronization are lost according to the shape change of the cross-pointer / crossbar switches 4410 to 4430 to convert to the synchronous mode. Therefore, when initializing or initially supplying power, the crosspointer / crossbar switches 4410 to 4430 change the shape, and the switch interfaces 5140, 5150, and 5160 are converted to synchronous through bit sync and word sync accordingly. The input / output buffers 4100, 4200, and 4300 output invalid cells / packets to the cross-point switches 4410 to 4430.

The multiplexer 5130 performs multiplexing on the data 5131, 5152, 5133 inputted from the switch interfaces 5140, 5150, and 5160. That is, among the data input from the plurality of plane crosspoint / crossbar switches 4410 to 4430 that are sequentially activated and operated, data of the active plane is sequentially selected and output to the line interface 5110. The data is processed and output by the transmitter of the line interface 5110 (4102).

6 is a detailed timing diagram for outputting data in FIGS. 4 to 5 according to the present invention. Referring to FIG. 6, the output data of the plurality of plane crosspoint / crossbar switches 4410 to 4430 which are sequentially activated and operated in FIGS. 4 to 5 may be output by the multiplexer 5130 of the input / output buffers 4100, 4200, and 4300. The timing of outputting data until output is described in detail.

When the cell / packet data (4142,4152,4162) of A, B, C, D, ... are sequentially output from the plurality of plane crosspoint / crossbar switches 4410 to 4430, the switch interface (4140, 4150, 4160). The cell / packet received from the active plane is synchronized and outputs (5131 to 5133) A, B, C, D .... to the multiplexing means 5130. That is, the output data A cell / packet of the line 4414 outputs through the switch interface 5140 during the t _S period. During the t _WA period, synchronous mode conversion is performed through bit synchronization and word synchronization according to the shape change of the crosspoint / crossbar switches 4410 to 4430 from the active plane to the inactive plane.

Next, switch interface 5140 becomes an active mode and outputs a D cell / packet. As such, the cells / packets of A, B, C, D, and E... Output from the switch interfaces 5140, 5150, and 5160 are multiplexed by the multiplexer and output to the line 5112.

The multiplexer 5130 sequentially selects and outputs output cells / packets of the active mode.

The present invention described above is capable of various substitutions, modifications, and changes without departing from the spirit of the present invention for those skilled in the art to which the present invention pertains, and the above-described embodiments and accompanying It is not limited to the drawing.

As described above, the present invention performs a plurality of plane switching in constructing a high-capacity, high-capacity, high-speed cell or packet switch network using a high-speed asynchronous crosspoint switch. Switching is effectively performed at the same operation speed without increasing the input / output speed.

Claims (3)

A cell / packet switching system comprising a plurality of planes that implement a large capacity switch that switches cells or packets at high speed as an asynchronous crosspoint or crossbar switch, Input / output buffering means for storing and waiting for the cell / packet inputted at high speed; Cross-pointer / crossbar switching means composed of a plurality of planes for matching and switching to the input / output buffering means and a high speed serial bit stream input / output; Performs an arbitration function for output control of the cells / packets stored in the input / output buffering means, outputs shape change information to the crosspointer / crossbar switching means, and sequentially activates the plurality of crosspointer / crossbar switching means Cell mediation means for outputting shape change information Cell / packet switching system comprising a. The method of claim 1, The input and output buffering means, Receives serial bit stream output from the plurality of cross-pointer / crossbar switching means and information on an active plane to perform bit synchronization and word synchronization during the period in which the crosspointer / crossbar switching means is inactive, and converts to synchronous. And outputting the cell / packet received during the active period. The method according to claim 1 or 2, And said crosspoint / crossbar switching means is realized in an asynchronous transmission mode (ATM) system.