KR100302586B1 - Method for switching powerdown and sleep mode of pc card ata card - Google Patents

Abstract

PURPOSE: A power down and sleep mode conversion method is provided to directly monitor if an ATA(AT Attachment) command is input from a host computer and to be converted into a power down mode by a program routine embedded in a PC card ATA cars in the case that the ATA command is not input for a set time so that it can regulate a mode conversion time which can be different in each host computer. CONSTITUTION: The method comprises steps of a controller maintaining an operation until an interrupt demanded by a program is input, and determining if an interrupt demanded by the program is input(ST1), the controller starting to count by using a timer embedded in a microprocessor of a card at the time when the final ATA command occurs in the case that an interrupt or an ATA command is not input(ST2), the controller determining if a set time has passed, and then changing a memory control register within the microprocessor in the case that a set time has passed(ST3), and the controller entering into a power down mode by setting the 22th bit, a power down mode set bit, of a memory control register(ST4).

Description

METHOD FOR SWITCHING POWERDOWN AND SLEEP MODE OF PC CARD ATA CARD}

The present invention relates to power down and sleep mode implementation of a PC CARD AT Attachment (ATA) card. In particular, when no action is taken from the host computer, a timer in the card itself is counted. The present invention relates to a power-down and sleep mode switching method of a PC-Card AT card that allows a power-down and sleep mode to be reduced after a predetermined time, thereby reducing the time required for mode switching.

FIG. 1 is a block diagram of a general PC Card AT card. The memory unit 20 stores data or programs related thereto according to operating characteristics of the card, as shown therein; And a control unit 10 for controlling the overall operation of the memory unit 20 and the card. The control unit 10 further includes an interface unit 10a for receiving control signals such as addresses and data between the host computer and the card; A task file register unit (10b) for storing the AT command code of the host computer inputted through the interface unit (10a); A buffer unit 10e for storing data relating to an address, etc. of the AT command; A function register unit (10c) configured to receive and set environment setting and function data of a card input through the interface unit (10a); A memory controller (10d) which receives the memory unit (20) and various data and control signals and corrects errors; It consists of the microprocessor 10f which receives all the said register parts 10a-10e and a control signal, determines a state, and controls the operation | movement in a control part accordingly.

In the PC card A card configured as described above, a conventional operation of switching the mode of the card by generating a power down command will be described with reference to the flowchart of FIG.

After a certain period of time (here, the predetermined time varies depending on the operating system) without outputting any command from the host computer to the task file register section 10b via the interface section 10a, a power-down command occurs and the task When the busy bit is set in the status register of the file register section 10b, the microprocessor 10f is interrupted accordingly, and the microprocessor 10f uses the interrupt operation routine to turn the PC card AID card into a power down mode. Switch to

Here, the sleep mode is to turn off the clock in order to reduce the power consumption more than the power down mode, and like the power down mode, it checks for a certain time by a timer and always goes through the power down mode. Only wake up to active mode.

However, in the conventional method, since all the power-down related commands are output from the host computer, the timing of the PC card AT card varies from the active mode to the power-down mode every time according to the operating system of the host computer. The PC Card AT card that receives the power down command has a process that must be recognized by the microprocessor inside the card after setting the command code in the task file register, causing a large delay time when switching modes.

Therefore, the present invention has been created to solve the above-mentioned conventional problems. If there is no AT command input to the PC Card AT card, an interrupt is generated when a predetermined time has elapsed by a timer built in the microprocessor itself. The purpose of the present invention is to provide a power-down and sleep-mode switching method of the PC Card AT card, which reduces the delay time by quickly switching to the power-down mode.

1 is a block diagram of a general PC Card AT card.

Fig. 2 is an operation flowchart of a power down and sleep mode switching method of a conventional PC card AT card.

Figure 3 is a flow chart of the operation of the power down and sleep mode switching method of the present invention.

In order to achieve the above object, in the power down and sleep mode switching methods of the present invention, the PC Card AT card maintains the operation of the control unit until the interrupt required by the program is input, and the interrupt required by the program is input. Determining a first step; A second step of starting counting when a last AT command is generated when there is no interrupt or AT command in the first step; A third step of starting counting in the second step to determine whether a predetermined time has elapsed and changing a memory control register inside the microprocessor if the predetermined time has elapsed; When the memory control register is changed in the third step, it is achieved by the fourth step of switching to the power down mode. An embodiment according to the present invention will be described in detail with reference to the accompanying drawings.

FIG. 3 is a flowchart illustrating a method for switching a power down and sleep mode of the present invention, a PC card AAA card. As shown in FIG. 3, the control unit maintains the operation until the interrupt required by the program is input. It is determined whether a request interrupt is input (ST1).

Next, when there is no interrupt or AI command in step ST1, counting is started by a timer embedded in a microprocessor inside the card at the time when the last AI command is generated (ST2).

In other words, if an interrupt or an AT command occurs, counting starts from the time at which point, and the AT command must be input before the time elapses.

Accordingly, as described above, counting starts at the same time as every instruction input and determines whether a predetermined time has elapsed, and when a predetermined time has elapsed, the memory control register inside the microprocessor is changed (ST3).

Next, when the memory control register is changed in the step ST3, the power control mode is switched (ST4).

In other words, the timer inside the microprocessor 10f counts when the PC Card A / C card does not take any action, and if a certain time passes, the 22nd bit of the memory control register (MCR) (power Down mode setting bit), and the microprocessor enters the power down mode when the bit is set.

Then, in order to switch back to the active state from the power-down mode, it wakes up by an interrupt by a data request or the like.

As described above, in the method of switching the power down and sleep modes of the present invention, the PC card AT card does not receive a power down signal from the host computer, and monitors whether the command is directly inputted so that the command is not input for a predetermined time. In this case, by switching to the power-down mode by the PC Card AT card's own program routine, the mode switching time, which may be different for each host computer, becomes constant, eliminating delay time, improving the stability of the card, and saving energy. It works.

Claims (1)

Maintaining the operation of the control unit until an interrupt requested by the program is input and determining whether an interrupt requested by the program is input; A second step of performing counting by an internal timer until the next command is input after the interrupt or the A command is input in the first step; A third step of starting counting in the second step to determine whether a predetermined time has elapsed and changing a memory control register inside the microprocessor if the predetermined time has elapsed; And a fourth step of switching to a power down mode when the memory control register is changed in the third step.