KR100300843B1 - Apparatus for capability of multi protocol in exchanger - Google Patents

Abstract

The present invention is to provide a multi-protocol functional device of the exchange, the present invention is connected to the multi-protocol processing unit and subscriber matching unit, the interconnection unit for matching the subscriber to the multi-protocol; A multi-protocol processor connected to the interconnection unit to simultaneously accommodate No. 7 protocol, V5.2 protocol, ISDN PRI protocol, and frame relay protocol in an E1 physical layer and process the corresponding protocol; The subscriber matching unit is configured to perform an interface between the interconnect unit and the subscriber so that the subscriber can use the multi-protocol function, so that four protocols can be processed on the same hardware, and the hardware can be simplified.

Description

Apparatus for capability of multi protocol in exchanger

The present invention relates to a protocol function device of an exchange, and in particular, in a PSTN exchange, a V5.2 protocol, an ISDN (Integrated Services Digital Network) PRI (Primary Rate Access Interface, Primary Group Speed Interface, 2.048Mbps) protocol, No .7 relates to multiprotocol functional devices in an exchange which simultaneously accept protocols, frame relay protocols.

Fig. 1 is a schematic configuration diagram of a conventional PSTN exchanger. In the related art, there is hardware dedicated to protocol processing for each protocol in order to process the V5.2 protocol, the ISDN PRI protocol, the No.7 protocol, and the frame relay protocol. Is composed of three layers. Layer 1 means a relay line, Layer 2 is a data link based on HDLC (High-level Data Link Control), and Layer 3 means a network. So to handle each protocol, interconnect subsystem (1), No.7 protocol function subsystem (2), ISDN PRI protocol function subsystem (3), V5.2 protocol function subsystem (4), frame relay Protocol function subsystem (5), E1 physical layer function subsystem (6), and subscriber matching function subsystem (7) were required. However, the V5.2 protocol and frame relay were required. There is no conventional embodiment of this protocol, and in the No.7 protocol, a signal message is received from a relay line and delivered to a hardware device that processes only the No.7 signal message via a time switch-space switch-time switch inside the exchange, In order to transmit a signaling message from this device to the exchange of powers, the operation is performed in the opposite direction to the receiving. In the ISDN primary group speed protocol processing, layer 1 receives through a relay line hardware device and forwards it to different hardware devices. In hardware that processes only the protocol of Layer 2, it transfers to Layer 3 after the protocol processing. To send an ISDN primary group speed protocol message, send in the opposite direction of the above path.

As described above, the conventional PSTN exchanger cannot process No.7, ISDN, V5.2, and frame relay protocols in one hardware system, but processes each hardware with dedicated protocols. Therefore, hardware implementation is complicated and hardware implementation costs are high. There was a problem.

Accordingly, the present invention has been proposed to solve various problems that occur when processing a plurality of protocols in the conventional PSTN exchange as described above, and an object of the present invention is the V5.2 protocol, ISDN PRI protocol, No. 7 protocol, A multi-protocol functional apparatus of an exchange capable of simultaneously accommodating a frame relay protocol is provided. In order to achieve the above object, a multi-protocol functional apparatus of an exchange according to the present invention includes a multi-protocol in a PSTN exchange. An interconnection unit for interconnecting subscribers and multiple protocols to access each other; connected to the interconnection unit and connected to No.7 protocol, V5.2 protocol, and Integrated Services Digital Network (ISDN) primary rate access (PRI) of the E1 physical layer; Interface) protocol and frame relay protocol at the same time, correspondence when the subscriber is connected Is a multi-protocol processing unit that provides a protocol; characterized in that configured to include a subscriber Subscriber Line that matching to be able to use the multi-protocol to perform an interface between the interconnection with the subscriber.

1 is a schematic configuration diagram of a conventional PSTN exchanger,

Figure 2 is a table showing the functions of No. 7, ISDN, V5.2, frame relay protocol in the general physical layer,

3 is a schematic structural diagram of a multi-protocol functional apparatus of an exchange according to the present invention;

4 is a block diagram illustrating a multi-protocol processor of the exchange in FIG.

<Explanation of symbols for the main parts of the drawings>

10: interconnection unit 20: multi-protocol processing unit

21: central processing unit 22: clock generation circuit

23: memory unit 24: address translation unit

25: internal time division switching unit 26: multi-channel HDLC processing unit

27: external time division switch matching unit 28 to 31: E1 framer and line matching unit

40: subscriber matching unit

Hereinafter, an embodiment according to the technical spirit of the multi-protocol functional apparatus of the present invention as described above will be described in detail with reference to the accompanying drawings. The present invention is slightly implemented when implementing hardware capable of supporting four protocols. The hardware is implemented to support all the different hardware, and then the software is implemented to selectively use only the hardware resources required to perform each protocol. FIG. 2 shows No. 7, ISDN, and V5 in the general physical layer. .2, the table shows the functions of the frame relay protocol.The four protocols describe the functions performed by the physical layer as follows: In case of No.7 protocol, 16 channels are used by default and the 1st to 31st are selected. In case of ISDN PRI protocol, only the 16th channel of each E1 physical layer is used. In case of 15th, 16th, 31st channel of each E1 physical layer, in case of frame relay protocol, 31 channels of 64Kbps can be used for each channel of each E1 or 6 channels can be grouped together. 31 channels can be combined into one unit.

3 is a schematic configuration diagram of a multi-protocol functional apparatus of an exchange according to the present invention. As shown in FIG. An interconnect 10; A multi-protocol processing unit 20 connected to the interconnection unit 10 to simultaneously accommodate No. 7 protocol, V5.2 protocol, ISDN PRI protocol, and frame relay protocol of the E1 physical layer; And a subscriber matching unit 40 which performs an interface between the interconnect unit 10 and the subscriber so as to match the subscriber to use the multi-protocol function. FIG. 4 is a block diagram of the multi-protocol processing unit of the exchange in FIG. As shown therein, a central processing unit 21 for controlling program execution of the multi-protocol processing unit 20 and controlling interrupts when accessing each block therein or when an interrupt occurs in each block; A clock generation circuit section 22 for supplying a clock to the central processing unit section 21; A memory unit 23 for storing data of the multi-protocol processor 20; An address translation unit 24 for translating the addresses of the blocks to be accessed by the CPU 21 to access each block without errors; Each E1 frame of the first to fourth E1 framers and circuit matching units 28 to 31 is switched to switch the channel to process the protocol of each E1 frame to the CPU 21, and external to the voice channel. A time division switch matching section and an internal time division switch section 25 for transmitting / receiving; A multi-channel HDLC processor 26 for extracting or synthesizing a channel to process the HDLC protocol in each E1 frame of the internal time division switch unit 25 and transmitting the extracted channel to the CPU 21; Receiving a frame synchronizing signal from an external time division switch and supplying a clock and frame synchronizing signal to the internal time division switch unit 25 and the first to fourth E1 framers and line matching units 28 to 31; An external time division switch matching section 27 matching for each E1 relay line and voice channel; And a first to fourth E1 framers and line matching units 28 to 31 for generating an E1 frame, dividing the received frame, and transmitting at a bipolar signal level to enable long-distance transmission over the E1 link. Motorola's 32-bit MC68MH360 can be used as part 21 to control interrupts when executing programs and accessing each resource, or when an interrupt occurs at each resource. In the clock generation circuit 22, 32.384 MHz A clock is supplied to the central processing unit 21 so that the central processing unit 21 can access each resource. A 20 MHz clock is supplied to the internal time division switch 25 to provide a central processing unit. When the internal time division switch section 25 is approached by the section 21 or the time division switch is used for internal operation, the external time division switch matching section 27 is used for external time division switches. Receiving a 4.096Mhz clock 8Khz frame of the synchronous received from a value to be supplied to each of the E1 framers and the times selected for the engagement (28 to 31). With this clock and the frame synchronizing signal, the E1 framer and line matching units 28 to 31 transmit and receive E1 frames. The memory unit 23 is largely divided into four types. The first is ROM (Read Only Memory), which is 256Kbytes in size, contains codes of various programs to be executed, and the second is local memory, which is a debug program data that can check whether there are any hardware resources. Can be located, and the third one has a dual port memory. The dual port memory has a dual port memory as a method for communication since the communication is performed in the same hardware as the layer 1 and the layer 2 when the protocol is executed, and the communication between the layer 2 and the layer 3 is performed in different hardware. The fourth is a buffer memory and a memory area for storing the program and data of the actual protocol for communication between the layer 1 and the layer 2. The shared memory is also included in the address translator 24. When accessing each memory unit 23 or when accessing the internal time division switch 25 or when accessing the first to fourth E1 framers and line matching units 28 to 31 is performed, By translating each resource without error. Next, in the internal time division switch section 25, the highways of each E1 frame and the external time division switch matching section 27 of each E1 framer and line matching section 28 to 31 are selected. It performs the function of switching and extracting or synthesizing the channel to process the HDLC protocol in each E1 frame. The channel to process the protocol of each E1 frame is switched to the time division multiple (TDM) port of the MC68MH360, which is the central processing unit, through the internal time division switch 25, and to the voice channel to the external time division switch. The time division switch matching unit 27 plays two roles. Firstly, the clock and frame synchronization signals are supplied to the internal time division switch unit 25, the E1 framer and the line matching unit 28 to 31 by receiving a clock signal of 4.096 MHz and a frame synchronization signal of 8 kHz from the external time division switch. It is responsible for matching the external time division switch and each E1 relay line and voice channel. Also, the first to fourth E1 framers and line matching units 28 to 31 are used to generate an E1 frame or to divide a received frame. The E1 link is transmitted at a bipolar signal level so that it can be transmitted over a long distance. Here, the difference between the MC68MH360 and the MC67360 depends on whether the HDLC controller in the central processing unit 21 can be used based on time division. The MC68MH360 has 64 HDLC controllers in total, and there are 32 channels in the E1 physical layer. Therefore, to use HDLC controller for each channel, MC68MH360 should be used. With the MC68360, there are only four HDLC controllers, so the HDLC controller functionality for the 32 of the E1s cannot be fully provided. Therefore, the first to support the ISDN PRI protocol is to support up to four E1s in the hardware and on the protocols. There is a need for an HDLC controller that supports only 16 channels of each E1. Four E1s are input / output to the internal time division switch section 25, and the MC68MH360 requires transmission and reception lines. Therefore, to transmit ISDN PRI protocol data on the E1 line, first control the internal time division switch unit 25 so that the first channel output from the MC68MH360 is the 16th channel of the first E1 and the second channel is the 16th channel of the second E1. The internal time division switch section 25 is initialized to switch to. Conversely, the 16th channel of each E1 input to the MC68MH360 is the opposite of the transmission to E1 above, where the actual data at the time of transmission and reception is written to shared memory so that when the MC68MH360 is initialized, it registers the HDLC controller of the MC68MH360. It stores the address of the shared memory in the memory so that the actual protocol data can be transmitted and received. Secondly, the V5.2 protocol is similar to the ISDN PRI protocol, but there are more channels available than the ISDN PRI protocol. Therefore, to use as V5.2 protocol, each E1 16th channel is the same as ISDN PRI, and protocol data of 15th and 31st channel additionally used in V5.2 protocol are as follows.

First, the fifth channel of the time division port of the MC68MH360 is switched to the 15th channel of the first E1 in the internal time division switch unit 25, the sixth channel is the 15th channel of the second E1, and the seventh channel is the third channel. The MC68MH360 allows the MC68MH360 to switch to the 15th channel, the 8th channel to the 15th channel of the fourth E1, the 9th channel to the 31st channel of the first E1, and the 10th channel to the 31st channel of the second channel. When initialized, the internal time-division switch unit 25 is controlled. In this way, the use of three channels for each E1 is characteristic of the V5.2 protocol physical layer, and thus the time of the MC68MH360 is because there are four E1s per board. The partitioning port uses up to 12 multichannel HDLC processing units 26. The data received by E1 in the V5.2 protocol is the opposite of the case in which it is transmitted. Third, the No.7 protocol uses only four channels per board because higher performance is required to use more channels. This allows the 32-bit MC68MH360 to process the number of processes it can handle. In ISDN PRI or V5.2 protocol, fixed channel is used. In case of No.7 protocol, it is required by software to receive E1 and channel number from software and control the internal time division switch for maximum 4 In the case of the frame relay protocol, each channel of each E1 can be used as a data channel, and 6 channels can be used as one unit or 31 channels. Can transmit data in one unit. In the case of the frame relay protocol, the MC68MH360 is merely used to execute a program, and the protocol data is actually transmitted and received by the multi-channel HDLC processing unit 26 to communicate with the shared memory. As described above, the present invention uses the V5.2 protocol, the ISDN PRI protocol, and the No. .7 protocol and frame relay protocol are simultaneously accommodated. Although the preferred embodiment of the present invention has been described above, the present invention may use various changes, modifications, and equivalents. It is clear that the present invention can be applied in the same manner by appropriately modifying the above embodiments. Accordingly, the above description does not limit the scope of the invention as defined by the limitations of the following claims.

As described above, the multi-protocol functional device of the exchange according to the present invention can be equipped with four protocols of the V5.2 protocol, the ISDN PRI protocol, the No.7 protocol, and the frame relay protocol in the same hardware. By implementing hardware, the whole system can be easily implemented. Since four protocols can be supported by one hardware, it requires less R & D manpower and lower development cost than when implemented with different hardware. In addition, in the aspect of productivity, when implementing different hardware, at least four kinds of hardware should be produced when producing, but in the case of the present invention, since only one production is required, the production cost can be lowered and the economical efficiency is improved. There is an advantage to this.

Claims (6)

In the PSTN exchanger, An interconnecting unit for matching the subscriber and the multiprotocol so that the subscriber can access the multiprotocol; It is connected to the interconnection unit and simultaneously accommodates No.7 protocol, V5.2 protocol, Integrated Services Digital Network (ISDN) Primary Rate Access Interface (PRI) protocol, and frame relay protocol of E1 physical layer, A multi-protocol processor for providing a corresponding protocol; And a subscriber matching unit configured to perform an interface between the interconnection unit and the subscriber so as to match the subscriber to use the multiprotocol. The method of claim 1, wherein the multi-protocol processor, A central processing unit that controls program execution of the multi-protocol processing unit and controls an interrupt when an internal block is accessed or an interrupt occurs in each block; A clock generation circuit unit for supplying a clock to the central processing unit; A memory unit for storing data of the multi-protocol processor; An address translation unit for translating the addresses of blocks to be accessed by the central processing unit to access each block without error; Switching each E1 frame of the first to fourth E1 framer and line matching unit to switch the channel to process the protocol of each E1 frame to the central processing unit, and transmits / receives with the external time division switch matching unit for the voice channel. An internal time division switch unit; A multi-channel HDLC processor which extracts or synthesizes a channel to process the HDLC protocol in each E1 frame of the internal time division switch unit and transmits the channel to the central processing unit; Receives a frame synchronization signal from an external time division switch, and supplies a clock and frame synchronization signal to the internal time division switch unit, the first to fourth E1 framers, and the line matching unit, and supplies an external time division switch, each E1 relay line, and an audio channel. An external time division switch matching unit for matching; And a first to fourth E1 framers and a circuit matcher for generating an E1 frame, dividing a received frame, and transmitting at a bipolar signal level to enable long-distance transmission over the E1 link. The method of claim 2, wherein the central processing unit unit, In order to perform the ISDN PRI protocol, an HDLC controller supporting up to four E1s and supporting 16 channels of each E1 on the protocol is provided, and the four E1s are controlled to be input and output to the internal time division switching unit, and on the E1 line. The internal time division switch unit is controlled to transmit ISDN PRI protocol data so that the first channel output from the central processing unit unit switches to the 16th channel of the first E1 and the second channel to the 16th channel of the second E1. Initializing the internal time division switching unit, and controlling the actual data at the time of transmission and reception to be written to the shared memory area of the memory unit (23). The method of claim 2, wherein the central processing unit unit, In order to perform the V5.2 protocol, the first channel outputted from the central processing unit by controlling the internal time division switch unit is the 16th channel of the first E1, and the second channel is the 16th channel of the second E1. , The fifth channel is the fifteenth of the first E1, the sixth channel is the fifteenth channel of the second E1, the seventh channel is the third fifteenth channel, and the eighth channel is the fifteenth of the fourth E1. And the ninth channel is the 31st channel of the first E1 and the 10th channel is controlled to switch the internal time division switching unit to the 31st channel of the second channel. The method of claim 2, wherein the central processing unit unit, In order to execute the No.7 protocol, the multi-protocol protocol of the switch is controlled to use the maximum of four channels by controlling the internal time-division switch by receiving the E1 and the channel number to be used at the request of the software from the software. Function device. The method of claim 2, wherein the central processing unit unit, In order to perform the frame relay protocol, each channel of each E1 is used as a data channel, and the multi-protocol functional apparatus of the exchange, characterized in that the control is performed so that data transmission and reception are performed in one unit of 6 or 31 channels.