KR100283077B1 - Clipping and bit discarding method, and apparatus and method for processing demodulation - Google Patents

Abstract

1. TECHNICAL FIELD OF THE INVENTION

The present invention relates to a clipping and bit discarding method, a demodulation processing apparatus using the same, a method and a recording medium.

2. The technical problem to be solved by the invention

The present invention relates to the correlation length of the in-phase signal (I) and the quadrature-phase signal (Q) of an active correlator used for synchronous acquisition or data demodulation at a receiving end of a code division multiple access (CDMA) mobile communication system. Accordingly, the present invention provides a clipping and bit discarding method, a demodulation processing apparatus using the same, and a computer readable recording medium recording a program for realizing the same.

3. Summary of Solution to Invention

The present invention correlates the in-phase signal (I) received from the transmitter and the quadrature-phase signal (Q) by using a predetermined pseudo noise (PN) code and a quadrature (Walsh) code, and correlates them according to a predetermined correlation length. A first step of obtaining a correlation value between the phase signal (I) and the quadrature phase signal (Q); A second step of determining a valid bit among bits of the correlation values by clipping and discarding the correlation value of the in-phase signal I and the quadrature phase signal Q according to a predetermined correlation length; And accumulating according to a control signal for determining a predetermined number of non-coherent times for the clipping and bit-off correlation values.

4. Important uses of the invention

The present invention is used for data demodulation in DS / CDMA mobile communication system.

Description

Clipping and bit-cutting method and demodulation processing apparatus using same and method therefor {CLIPPING AND BIT DISCARDING METHOD, AND APPARATUS AND METHOD FOR PROCESSING DEMODULATION}

The present invention relates to the in-phase signal (I) and quadrature-phase signal (Q) correlation values of an active correlator used for synchronous acquisition or data demodulation at a receiving end of a code division multiple access (CDMA) mobile communication system. The present invention relates to a method for clipping and bit discarding, a demodulation processing apparatus using the same, and a computer-readable recording medium recording a program for realizing the same, which reduces the complexity of hardware by clipping and bit discarding according to the correlation length. .

The transmitting end of the DS / CDMA system spreads the input data with a pseudo noise (PN) code, and the receiving end performs a process of demodulating data and synchronizing with the PN code used for the transmitted input data. have. In this case, an active correlator may be used to synchronize PN codes of I and Q data in a quadrature modulated (eg QPSK) system by spreading a digital signal into a PN code. (Coherent Combining).

In general, when the correlator is used, the correlation length is varied in order to obtain optimal performance of the system, and the longer the correlation length, the larger the integral value. These integrals affect the complexity of the square root hardware and accumulators for noncoherent combinations during data demodulation, as the bit length of the coherent combinations calculated when 'non-coherent combining' Will be given.

As such, several or dozens of active correlators are used when performing synchronization acquisition and data demodulation using an active correlator in a DS / CDMA mobile communication system. However, since the hardware complexity during synchronization acquisition or data demodulation increases in proportion to the number of active correlators, it is essential to reduce the hardware complexity by adjusting the coherent coupling result according to the correlation length.

SUMMARY OF THE INVENTION The present invention devised to meet the requirements as described above is orthogonal to the in-phase signal (I) of an active correlator used for synchronous acquisition or data demodulation at a receiving end of a code division multiple access (CDMA) mobile communication system. By clipping and bit-cutting the correlation value of the signal Q according to the correlation length, a clipping and bit-cutting method for reducing hardware complexity, a demodulation processing apparatus using the same, and a method and a program for realizing the program are recorded. The purpose is to provide a readable recording medium.

1 is a configuration diagram of an embodiment of a demodulation processing apparatus according to the present invention.

2 is a flow chart of an embodiment of a demodulation processing method according to the present invention;

3 is a flow diagram of an embodiment of a clipping and bit discarding method in accordance with the present invention.

4 is an exemplary diagram for a bit discarding process used in the present invention.

* Explanation of symbols for the main parts of the drawings

11 to 14 multiplier 15,16 adder

17,18,21: Accumulator 19: Clipping and Bit discarding

20: Square Root Processing Unit

An apparatus of the present invention for achieving the above object is a demodulation device for demodulating a signal received from a transmitting end in a mobile communication system, wherein the received signal is received from the transmitting end using a predetermined pseudo noise (PN) code and a orthogonal (Walsh) code. Correlation value generating means for correlating the in-phase signal (I) with the quadrature phase signal (Q) to obtain a correlation value between the in-phase signal (I) and the quadrature phase signal (Q) correlated according to a predetermined correlation length; Valid bit determining means for determining a valid bit among bits of the correlation values by clipping and bitting the correlation values generated by the correlation value generating means according to the predetermined correlation length; And correlation value processing means for accumulating the correlation values clipped and discarded by the valid bit determining means in accordance with a control signal for determining a predetermined number of non-coherent.

A method of the present invention for achieving the above object is a data demodulation processing method applied to a data demodulation device of a mobile communication system, the method being received from a transmitting end using a predetermined pseudo noise (PN) code and a orthogonal (Walsh) code. A first step of correlating the phase signal (I) with the quadrature phase signal (Q) to obtain a correlation value between the in-phase signal (I) and the quadrature phase signal (Q) correlated according to a predetermined correlation length; A second step of determining a valid bit among bits of the correlation values by clipping and bitting the correlation value of the in-phase signal (I) and the quadrature phase signal (Q) according to the predetermined correlation length; And a third step of accumulating the correlation values that are clipped and discarded according to a control signal that determines a predetermined number of non-coherent times.

In addition, the present invention provides a clipping and bit discard method applied to a data demodulation device of a mobile communication system, wherein the in-phase signal (I) received from a transmitting end using a predetermined pseudo noise (PN) code and a quadrature (Walsh) code. A first step of correlating the quadrature phase signal (Q) with the quadrature phase signal (Q) to obtain a correlation value (N bits) between the in-phase signal I and the quadrature phase signal Q correlated according to a predetermined correlation length; When selecting a first predetermined (M) bit through clipping and bit discarding, if the selected first predetermined bit includes the most significant bit (N-1 th bit) of the correlation value, the most significant bit is included. A second step of selecting the first predetermined bit; And if the first predetermined bit does not include the most significant bit of the correlation value, select a higher bit than the second predetermined (M-1) th bit except for the most significant bit (N-1st bit). And inspecting to convert the second predetermined bit according to a test result, and to select the first predetermined bit consisting of the converted second predetermined bit and the most significant bit.

In addition, the present invention relates to a data demodulation device having a processor, which correlates the in-phase signal I and the quadrature-phase signal Q received from a transmitter using a predetermined pseudo noise (PN) code and a quadrature (Walsh) code. A function of obtaining a correlation value between the in-phase signal I and the quadrature-phase signal Q correlated according to a predetermined correlation length; A function of determining a valid bit among bits of the correlation values by clipping and bitting a correlation value of the in-phase signal (I) and a quadrature phase signal (Q) according to the predetermined correlation length; And a computer-readable recording medium having recorded thereon a program for realizing a function of accumulating the clipping and bit discarded correlation values according to a control signal for determining a predetermined number of non-coherent.

In addition, the present invention relates to an in-phase signal I and an orthogonal phase signal Q received from a transmitter using a predetermined pseudo noise (PN) code and a quadrature (Walsh) code in a bit discard apparatus having a processor. A first function for obtaining a correlation value (N bits) between the in-phase signal I and the quadrature-phase signal Q correlated according to a predetermined correlation length; When selecting a first predetermined (M) bit through clipping and bit discarding, if the selected first predetermined bit includes the most significant bit (N-1 th bit) of the correlation value, the most significant bit is included. A second function of selecting the first predetermined bit; And if the first predetermined bit does not include the most significant bit of the correlation value, select a higher bit than the second predetermined (M-1) th bit except for the most significant bit (N-1st bit). And a computer for recording a program for converting the second predetermined bit according to a test result, and for realizing a third function of selecting the first predetermined bit consisting of the converted second predetermined bit and the most significant bit. Provide a readable recording medium.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 is a configuration diagram of an embodiment of a demodulation processing apparatus according to the present invention.

Quadrature modulated I and Q data at the transmitter in a DS / CDMA system are generally oversampled. Therefore, the receiver uses the I and Q data by deciding.

In the present invention, the correlation value of I and Q is obtained by using the active correlator as input of the decoded data. If the correlation value is clipped and bit truncated according to the correlation length, the output of the correlator may have the same range of values according to the correlation length. This reduces hardware complexity when combining noncoherence.

As shown in FIG. 1, the demodulation processing apparatus using clipping and bit discarding according to the present invention is a pseudo noise (PN) code orthogonal to a demodulation apparatus for demodulating a signal received from a transmitting end in a mobile communication system. Correlation between the in-phase signal (I) received from the transmitter and the quadrature signal (Q), and the correlation of the in-phase signal (I) and the quadrature signal (Q) correlated according to the correlation length (t _corr ). Clipping and bit-cutting unit for determining valid bits among bits of correlation values by clipping and bit-off a correlator for obtaining a value and correlation values (I-correlation value and Q-correlation value) generated by the correlator according to the correlation length (19) and a square root that accumulates a square root of the correlation values clipped and discarded by the clipping and bit discarding unit 19 by a non-coherent number of times (t _stop ). ) Including the processing unit 20 and the accumulator 21 .

Here, the reason for taking the square root is that the phase shift occurs due to the frequency error of the input signal and the local signal. Therefore, in order to obtain a correlation value with a desired correlation period, a coherent is required until such a phenomenon occurs. Coherent Combining should be performed and the magnitude of correlation value should be accumulated for square root.

The correlator is a first multiplier for multiplying an in-phase signal Iin, which is first input data, by a first pseudo-noise code PNi, which is a pseudo-noise PN code, and an orthogonal code, Wal, of the in-phase signal I. (11), a second multiplier 12 for multiplying the first pseudo-noise code PNi and the quadrature code Wal by the quadrature phase signal Qin which is the second input data, and the quadrature phase signal Q; The third pseudo multiplier 13 for multiplying the second pseudo noise code PNq, which is a pseudo noise code of the quadrature phase signal Q, by the quadrature code W, and the second pseudo signal to the in-phase signal I The fourth multiplier 14 for multiplying the inversion value (-PNq × Wal) of the noise code PNq and the orthogonal code Wal, the output value Iin × PNi × Wal and the third of the first multiplier 11 Output values of the first adder 15 for adding the output value Qin × PNq × Wal of the multiplier 13 and the output values Qin × PNi × Wal and the fourth multiplier 14 of the second multiplier 12 ( The second adder 16 for adding -Iin × PNq × Wal) and the first adder 15 according to the correlation length. The first accumulator 17 for accumulating the output value (Iin × PNi × Wal + Qin × PNq × Wal) and the output value (Qin × PNi × Wal−Iin × PNq ×) of the second adder 16, depending on the correlation length. And a second accumulator 18 for accumulating Wal).

The clipping and bit discarding unit 19 selects the bit area differently according to the correlation length, but if the correlation length is short at the time of bit discarding, since the correlation values are small, the least significant bit (LSB: Least Significant Bit) is selected and the correlation length is long. Since the ground correlation values become larger, it is better to select the most significant bit (MSB) first. A more detailed description thereof will be described later with reference to FIG. 3.

The square root processing unit 20 obtains the magnitude of the correlation value by taking a square root of correlation values that are clipped and discarded by the clipping and bit discarding unit 19.

The accumulator 21 accumulates the correlation values of the square root by non-coherent times by clipping and biting off.

The operation of the demodulation processing apparatus according to the present invention using clipping and bit discarding having the configuration as described above will be described later with reference to FIG. 2.

In this embodiment, Iin and Qin are 4-bit two's complements, and t _corr is the correlation length t _stop represents the number of noncoherent couplings. In this case, when the correlation length (t _corr ) is assumed to be 64, 128, and 256, to represent the maximum value of the correlation value of I and Q at this correlation length, it must be 13-bit two's complement.

This is represented by the complement of 8 bit 2 using the clipping and bit discarding method according to the present invention. At this time, the bit rounding for each correlation length is limited to four.

Refer to (Table 1). If you get the correlation value with 64 length and select [12, 6: 0] in the bit area, get the correlation value with 256 length and then select [12, 8: 2] in the bit area. It has a correlation value of the same value range as.

Because of this bit truncation, the range of values that the correlation value can have is the same, and the bit length is reduced, which reduces the complexity of taking a square root in the demodulator, thereby reducing the complexity of noncoherent coupling. The complexity of the accumulator 21 is also reduced.

2 is a flow chart of an embodiment of a demodulation processing method according to the present invention.

In the demodulation processing method using clipping and bit discarding, a process of coherently obtaining a correlation value of I and Q using an active correlator (201 to 208), and using each obtained correlation value of I and Q It is largely classified into non-coherent processes (209 to 212).

In this embodiment, Iin and Qin are input data of I and Q, respectively, PNi is a PN code of I, PNq is a PN code of Q, and Wal is an orthogonal code. In addition, t _corr represents the correlation length and t _stop represents the number of non-coherent combinations.

As shown in FIG. 2, the demodulation processing method using clipping and bit discarding (see FIG. 3) according to the present invention, first, by the correlation length (t _corr ) (203), PN code and The orthogonal codes are correlated and accumulated (Iin × PNi × Wal + Qin × PNq × Wal) (201, 202). Subsequently, clipping and bit truncation are determined according to the correlation length to determine valid bits among the bits of the I correlation value (204).

Then, the correlation length t _corr (207) correlates and accumulates the PN code and the orthogonal code to the given I and Q input data (Qin x PNi x Wal-Iin x PNq x Wal) (205 and 206). Thereafter, according to the correlation length, clipping and bit truncation determine valid bits among bits of the Q correlation value (208).

This process 201 to 208 is referred to as 'coherent combining'.

Subsequently, after taking a square root for the coherent combining result of the I and Q data (209), the non-coherent combination is accumulated as many times as t _stop (210,211). Here, the reason for taking the square root is to find the magnitude of the correlation value.

Finally, the accumulated result is stored (212).

This process (209 to 212) is called 'Non-coherent Combining'.

3 is a flow chart of an embodiment of a clipping and bit discard method according to the present invention. Clipping and bit discard procedures according to correlation length for reducing hardware complexity during noncoherent combining using coherent combining results (204,208) ).

The output of the active correlator has N bits as a correlation value of I or Q (301).

In the present embodiment, the correlation value between I and Q is two's complement, and the bit length after clipping and bit discarding is assumed to be M.

The bit area is selected according to the correlation length. Therefore, when performing bit truncation, it is preferable to select the bit region from the LSB because the correlation value is small when the correlation length is short, and it is preferable to select the MSB since the correlation value becomes larger when the correlation length is longer.

As shown in FIG. 3, the clipping and bit discarding processes 204 and 208 for selecting M bits first select M bits representing the bit length after clipping and bit discarding (302). In this case, it is analyzed whether the selected M bit includes the MSB (N-1 th bit) of the correlation value (N bit) (303).

As a result of the analysis, if the selected M bit includes N bits of MSB (N-1 th bit), M bits are selected including MSB (N-1) of the correlation value (304).

As a result of the analysis, if the selected M bit does not include the N-bit MSB (N-1 th bit), it is checked whether it is positive (305).

As a result of the check, if it is positive, it is checked whether the bit higher than the selected M-1 bits is 1 (306). If 1, the M-1 bits are all 1s and the N-1th bits are MSBs. Select (307). This is the highest value that can be represented by M-1 bits.

As a result of the check, if it is negative, it checks whether the higher bit is 0 than the selected M-1 bit (308). If 0, M bits are all set to 0 and N-1th bit is MSB. Select (309). This is the minimum value that can be represented by M-1 bits.

On the other hand, if the bit higher than the selected M-1 bit when it is positive is not 1 or the bit higher than the selected M-1 bit is not 0 when the number is negative, the N-1th bit is included and the selected M-1 bits are added together. Bits are selected (310).

If the correlation value is an unsigned number, the process of processing a negative number during clipping and bit discarding is eliminated, and only M of N bits are selected without necessarily including the N-1 th bit.

Through the clipping and bit discarding process as described above, it can be seen that the bit region is selected according to the correlation length.

Specifically, as shown in FIG. 4, when the value of the M-1 bit selected from the LSB is assumed to be A, the LS-1 is discarded and the selected M-1 bit becomes 1 / 2A. At this time, if 2 bits are discarded, it becomes 1 / 4A. In other words, as one bit is discarded, the value decreases by 1/2.

As described above, the present invention can reduce the complexity of hardware by clipping and bit discarding the correlation values of the I and Q active correlators when performing synchronous acquisition or data demodulation using an active correlator in a system using quadrature modulation. Reduce the complexity of digital modems used in DS / CDMA systems.

The present invention described above is capable of various substitutions, modifications, and changes without departing from the spirit of the present invention for those skilled in the art to which the present invention pertains, and the above-described embodiments and accompanying It is not limited to the drawing.

As described above, the present invention can reduce the hardware complexity during data demodulation process by varying the bit rounding according to the correlation length when obtaining correlation values by inputting quadrature modulated I and Q data. In the CDMA mobile communication system, it is possible to reduce the hardware complexity of the digital modem using a plurality of active correlators for synchronization acquisition or data demodulation.

Claims (15)

A demodulation device for demodulating a signal received from a transmitting end in a mobile communication system, The in-phase signal (I) received from the transmitter and the quadrature phase signal (Q) are correlated according to a predetermined correlation length by using a predetermined pseudo noise (PN) code and a quadrature (Walsh) code. Correlation value generating means for obtaining a correlation value between I) and the quadrature phase signal Q; Valid bit determining means for determining a valid bit among bits of the correlation values by clipping and bitting the correlation values generated by the correlation value generating means according to the predetermined correlation length; And Correlation value processing means for accumulating the correlation values clipped and discarded by the valid bit determining means in accordance with a control signal for determining a predetermined number of non-coherent Demodulation processing apparatus comprising a. The method of claim 1, The clipping and bit discarding process of the effective bit determining means, The bit region may be differently selected according to the predetermined correlation length, but if the predetermined correlation length is short at the time of bit discarding, the correlation value is small, and thus the least significant bit (LSB) is selected. Demodulation processing apparatus characterized in that the value is selected from the most significant bit (MSB). The method according to claim 1 or 2, The correlation value generating means, First multiplication means for multiplying the in-phase signal (I) by a first pseudo-noise code (PNi) which is a pseudo noise (PN) code of the in-phase signal (I); Second multiplication means for multiplying the quadrature phase signal (Q) by the first pseudo noise code (PNi) and the quadrature code (Wal); Third multiplication means for multiplying the quadrature phase signal (Q) by a second pseudo noise code (PNq) which is a pseudo noise code of the quadrature phase signal (Q); Fourth multiplication means for multiplying the in-phase signal (I) by the inverse value (-PNq × Wal) of the second pseudo noise code (PNq) and the orthogonal code (Wal); First adding means for adding an output value I × PNi × Wal of the first multiplication means and an output value Q × PNq × Wal of the third multiplication means; Second addition means for adding an output value (Q × PNi × Wal) of the second multiplication means and an output value (−I × PNq × Wal) of the fourth multiplication means; First accumulating means for accumulating the output value of the first adding means and outputting a correlation value of the in-phase signal (I) according to the predetermined correlation length; And Second accumulating means for accumulating the output value of the second adding means and outputting a correlation value of the quadrature phase signal Q according to the predetermined correlation length Demodulation processing apparatus comprising a. The method of claim 3, wherein The correlation value processing means, Means for obtaining a magnitude of a correlation value by taking a square root of correlation values clipped and discarded by the valid bit determining means; And Third accumulating means for accumulating the correlation value obtained by rounding off the clipping and bit-rooting by the predetermined non-coherent number of times; Demodulation processing apparatus comprising a. The method according to claim 1 or 2, The clipping and bit discarding process, When selecting a first predetermined (M) bit through clipping and bit discarding, if the selected first predetermined bit includes the most significant bit (N-1 th bit) of the correlation values, the most significant bit is included. A first process of selecting the first predetermined bit; And In the case where the first predetermined bit does not include the most significant bit of the correlation values, the higher bit is checked than the second predetermined (M-1th) bit selected except the most significant bit (N-1th bit). Converting the second predetermined bit according to a test result, and selecting the first predetermined bit consisting of the converted second predetermined bit and the most significant bit Demodulation processing apparatus comprising a. In the data demodulation processing method applied to a data demodulation device of a mobile communication system, The in-phase signal I correlated according to a predetermined correlation length by correlating the in-phase signal I and the quadrature-phase signal Q received from the transmitting end using a predetermined pseudo noise (PN) code and a quadrature (Walsh) code. Calculating a correlation value between the quadrature phase signal and the quadrature phase signal Q; A second step of determining a valid bit among bits of the correlation values by clipping and bitting the correlation value of the in-phase signal (I) and the quadrature phase signal (Q) according to the predetermined correlation length; And A third step of accumulating the correlation values, which are clipped and discarded, according to a control signal for determining a predetermined number of non-coherent Demodulation processing method comprising a. The method of claim 6, The second step, When selecting a first predetermined (M) bit through clipping and bit discarding, if the selected first predetermined bit includes the most significant bit (N-1 th bit) of the correlation values, the most significant bit is included. A fourth step of selecting the first predetermined bit; And In the case where the first predetermined bit does not include the most significant bit of the correlation values, the bit higher than the second predetermined (M-1) th bit selected except for the most significant bit is examined to determine the first bit according to a test result. A fifth step of converting the predetermined bits and selecting the first predetermined bits consisting of the converted second predetermined bits and the most significant bit Demodulation processing method comprising a. The method of claim 7, wherein The fifth step, A sixth step of analyzing if the first predetermined bit does not include the most significant bit of the correlation values; A seventh step of checking whether the bit higher than the second predetermined bit selected except for the most significant bit of the correlation values is one ('1') if the analysis result of the sixth step is positive; An eighth step of selecting the first predetermined bit by including the most significant bit and all the second predetermined bits as one ('1') as a result of the checking of the seventh step. ; A ninth step of checking whether a bit higher than the second predetermined bit selected except the most significant bit is zero ('0') if the analysis result of the sixth step is negative; A tenth step of selecting the first predetermined bit by including the most significant bit and setting all the second predetermined bits to zero (0) if the result of the ninth step is zero; And If the bit higher than the second predetermined bit selected when the number is positive is not one ('1') or the bit higher than the second predetermined bit selected when the number is negative, the most significant bit is included. And selecting the first predetermined bit consisting of the selected second predetermined bit. Demodulation processing method comprising a. The method according to any one of claims 6 to 8, The first step is, A twelfth step of multiplying the in-phase signal (I) by a first pseudo-noise code (PNi) which is a pseudo noise (PN) code of the in-phase signal (I) and an orthogonal code (Wal); A thirteenth step of multiplying the quadrature phase signal (Q) by the first pseudo noise code (PNi) and the quadrature code (Wal); A fourteenth step of multiplying the quadrature phase signal (Q) by a second pseudo noise code (PNq), which is a pseudo noise code of the quadrature phase signal (Q), and the quadrature code (Wal); A fifteenth step of multiplying the in-phase signal (I) by the inverse value (-PNq × Wal) of the second pseudo noise code (PNq) and the orthogonal code (Wal); A value (I × PNi × Wal) obtained by multiplying the in-phase signal (I) by a first pseudo-noise code (PNi) which is a pseudo noise (PN) code of the in-phase signal (I) and an orthogonal code (Wal); A second QN (PNq × Wal) obtained by multiplying the quadrature phase signal (Q) by the second pseudonoise code (PNq), which is a pseudo noise code of the quadrature phase signal (Q), and the quadrature code (Wal); 16 steps; The second pseudo noise is obtained by multiplying the quadrature phase signal Q by the first pseudo noise code PNi and the quadrature code Wal by the value Q × PNi × Wal and the in-phase signal I. A seventeenth step of adding a value (−I × PNq × Wal) multiplied by a code PNq and an inverted value (−PNq × Wal) of the orthogonal code (Wal); An eighteenth step of acquiring a correlation value of the in-phase signal (I) by accumulating the first addition value (I × PNi × Wal + Q × PNq × Wal) of the sixteenth step according to the predetermined correlation length; And A nineteenth step of acquiring a correlation value of the quadrature signal Q by accumulating the second addition value (Q × PNi × Wal − I × PNq × Wal) of the seventeenth step according to the predetermined correlation length; Demodulation processing method comprising a. The method of claim 9, The third step, Obtain a magnitude of correlation value by taking a square root of the correlation values of the clipping and bit-off, and extracting the correlation value of the square root by clipping and bit-off by the predetermined number of non-coherent times. Demodulation processing method characterized in that the accumulation. In the clipping and bit discard method applied to the data demodulation device of the mobile communication system, The in-phase signal I correlated according to a predetermined correlation length by correlating the in-phase signal I and the quadrature-phase signal Q received from the transmitting end using a predetermined pseudo noise (PN) code and a quadrature (Walsh) code. Calculating a correlation value (N bits) between the quadrature phase signal Q and the quadrature phase signal Q; When selecting a first predetermined (M) bit through clipping and bit discarding, if the selected first predetermined bit includes the most significant bit (N-1 th bit) of the correlation value, the most significant bit is included. A second step of selecting the first predetermined bit; And In the case where the first predetermined bit does not include the most significant bit of the correlation value, the bit higher than the second predetermined (M-1th) bit selected except for the most significant bit is examined to determine the first bit according to a test result. A third step of converting the predetermined bits and selecting the first predetermined bits consisting of the converted second predetermined bits and the most significant bit Clipping and bit discarding method, including. The method of claim 11, The third step, A fourth step of analyzing whether the first predetermined bit does not include the most significant bit of the correlation values; A fifth step of checking whether a bit higher than the second predetermined bit selected except the most significant bit of the correlation values is one ('1') if the analysis result of the fourth step is positive; A sixth step of selecting the first predetermined bit by including the most significant bit and setting all the second predetermined bits to one ('1') as a result of the inspection of the fifth step. ; A seventh step of checking whether a bit higher than the second predetermined bit selected except the most significant bit is zero ('0') if the analysis result of the fourth step is negative; An eighth step of selecting the first predetermined bit by including the most significant bit and setting all of the second predetermined bit to zero (0) if the check result of the seventh step is zero ('0'); And If the bit higher than the second predetermined bit selected when the number is positive is not one ('1') or the bit higher than the second predetermined bit selected when the number is negative, the most significant bit is included. And selecting the first predetermined bit consisting of the selected second predetermined bit. Clipping and bit discarding method, including. The method according to claim 11 or 12, The first predetermined bit selection process, The bit region may be differently selected according to a predetermined correlation length. However, if the predetermined correlation length is short at the time of bit discarding, the correlation value is small. Therefore, the least significant bit (LSB) is selected, and the correlation value is longer. And bit truncation method, characterized by selecting from the most significant bit (MSB). In a data demodulation device having a processor, The in-phase signal I correlated according to a predetermined correlation length by correlating the in-phase signal I and the quadrature-phase signal Q received from the transmitting end using a predetermined pseudo noise (PN) code and a quadrature (Walsh) code. Obtaining a correlation value between the quadrature phase signal and the quadrature signal Q; A function of determining a valid bit among bits of the correlation values by clipping and bitting a correlation value of the in-phase signal (I) and a quadrature phase signal (Q) according to the predetermined correlation length; And Accumulating the correlation values that are clipped and discarded according to a control signal that determines a predetermined number of non-coherent A computer-readable recording medium having recorded thereon a program for realizing this. In a bit throw device with a processor, The in-phase signal I correlated according to a predetermined correlation length by correlating the in-phase signal I and the quadrature-phase signal Q received from the transmitting end using a predetermined pseudo noise (PN) code and a quadrature (Walsh) code. A first function of obtaining a correlation value (N bits) between the quadrature phase signal and the quadrature phase signal Q; When selecting a first predetermined (M) bit through clipping and bit discarding, if the selected first predetermined bit includes the most significant bit (N-1 th bit) of the correlation value, the most significant bit is included. A second function of selecting the first predetermined bit; And In the case where the first predetermined bit does not include the most significant bit of the correlation value, the higher bit is checked than the second predetermined (M-1th) bit selected except the most significant bit (N-1th bit). A third function of converting the second predetermined bit according to a test result and selecting the first predetermined bit consisting of the converted second predetermined bit and the most significant bit A computer-readable recording medium having recorded thereon a program for realizing this.