KR100282405B1 - Apparatus and method for cell queuing in an AT switch - Google Patents

Abstract

The present invention relates to an apparatus and method for cell queuing in an ATM (Asynchronus Transfer Mode) exchange, and more particularly, to queue and schedule an ATM cell to an ATM exchange for each virtual channel. A cell queuing apparatus and method are disclosed.

The present invention comprises the steps of storing the input cell, determining the output port and service level of the cell to be output of the input cell, and performing a header conversion of the output cell A cell queuing method is provided in an AT switch.

Description

Apparatus and method for cell queuing in an AT switch

The present invention relates to an apparatus and method for cell queuing in an ATM (Asynchronus Transfer Mode) exchange, and more particularly, to queue and schedule an ATM cell to an ATM exchange for each virtual channel. A cell queuing apparatus and method are disclosed.

In general, in implementing an ATM exchange, the implementation of a queue is an important factor in determining the characteristics of the exchange. ATM switches are classified into Input Buffer Switch, Output Buffer Switch and Shared Buffer Switch according to the location of the queue. Each exchange manages the queue in units of ports. In addition, the ATM switch manages the queue by service class for each port in order to provide various services.

1 is a diagram illustrating a queue provided in each port of a conventional ATM switch.

As shown in FIG. 1, the conventional ATM switch is configured with queues for each service class defined by the ATM Forum for each port. Here, the five service classes are CBR (Constant Bit Rate), rt-VBR (real time Variable Bit Rate) and nrt-VBR (non real time Variable Bit Rate) and , ABR (Available Bit Rate) and UBR (Unspecified Bit Rate).

The cell queuing method of the conventional ATM switch has a problem in that traffic is not controlled for each virtual channel because all virtual channels having the same service class are stored in one queue.

In addition, when traffic is congested in one virtual channel, there is a problem in that the entire traffic cannot be efficiently controlled by occupying a space of a buffer that can be used by another virtual channel.

In order to solve this problem, an independent cue must be assigned to each virtual channel, which is virtually impossible to implement because the number of cues is needed as the number of virtual channels.

An object of the present invention has been made in view of the above-mentioned problems of the prior art, and has a cell in a ATM (Asynchronus Transfer Mode) switch that guarantees traffic independence by providing a virtual queue for each virtual channel. It is to provide a queuing device and method.

The present invention for achieving the above object is according to the cell buffer unit for storing the input cell, the VPI (Virtual Path Identifier (virtual path identifier) and VCI (Virtual Channel Identifier; virtual channel identifier) of the input cell An input cell control unit for determining whether to discard a cell by reading connection parameters, a connection table storing connection parameters allocated to connection of the input cells for each virtual channel, and the connection table An output cell controller for reading a VPI and VCI to be converted from the cell and converting a header of a cell, a schedule queue for storing a buffer address of a cell to be output among the input cells and an address of the connection table; The buffer address of the cell which is not discarded among the input cells and the address of the connection table exist for each service class in the corresponding output port. And an output control unit for scheduling queue schedule to Yiwu storage provides a cell queuing device in this TM exchanger, characterized in that configured.

In addition, the present invention comprises the steps of storing the input cell, determining the output port and service level of the cell to be output of the input cell, and performing a header conversion of the output cell A cell queuing method is provided in an AT switch.

Preferably, the apparatus further includes an input queue for queuing input data input through an input port, a free queue for transmitting and receiving a buffer address to and from the cell buffer control unit, and an output queue for queuing data to be output among the input cells. It provides a cell queuing device in the ATM switch, characterized in that configured. The storing of the input cell may include determining whether to discard the cell for each virtual channel and storing the cell in the cell buffer unit, and storing the buffer address of the cell that is not discarded among the input cells and the address of the connection table. Storing in the schedule queue of the output port to be transmitted. Determining the output port and the service level of the cell to be output among the input cells to have a queue for each of the five service classes, the priority of the five service classes in the order of CBR, rtVBR, nrtVBR, ABR, UBR Assign. Performing header conversion of the cell performs header conversion by reading a connection table address and a buffer address of the cell from a schedule queue.

1 is a diagram illustrating a queue provided in each port of a conventional ATM switch.

Fig. 2 is a block diagram showing the internal structure of an ATM switch.

3 is a block diagram showing the configuration of a cell queuing apparatus of an ATM switch according to the present invention.

4 is a flow diagram illustrating a cell queuing method of an ATM exchange according to the present invention.

5 is a diagram showing the internal configuration and timing relationship of a cell buffer unit of a cell queuing apparatus of an ATM exchange according to the present invention;

6 is a table showing the format of a connection table according to the present invention;

7 is a view showing a queue provided in each port of the ATM switch according to the present invention.

Explanation of symbols on the main parts of the drawings

100: input cue 102: cell buffer unit

104: cell buffer control unit 106: input cell control unit

108: connection table 110: output cell control unit

112: schedule queue 114: output scheduling control

116: free cue 118: output cue

200: first buffer 300: second buffer

Hereinafter, the configuration and operation according to an embodiment of the present invention will be described with reference to the accompanying drawings.

Figure 2 is a block diagram showing the internal configuration of the ATM switch, Figure 3 is a block diagram showing the configuration of the cell queuing device of the ATM switch according to the present invention, Figure 4 is a cell queuing method of the ATM switch according to the present invention 5 is a diagram illustrating an internal configuration and a timing relationship of a cell buffer unit of a cell queuing apparatus of an ATM exchange according to the present invention, FIG. 6 is a diagram illustrating a format of a connection table according to the present invention. 7 is a diagram illustrating a queue provided in each port of the ATM switch according to the present invention.

As shown in Fig. 2, the ATM exchanger uses a leaky bucket algorithm in the leaky bucket manager to form a high-speed data bus by multiplexing the cells inputted to the input port in the multiplexer 10. Only cells that comply with the protocol by performing (Policing) are switched in the exchange unit 30 and demultiplexed in the demultiplexer 40. These ATM exchanges use queues to avoid each output congestion.

Referring to FIGS. 3 to 7, the cell queuing apparatus of the ATM switch according to the present invention includes an input queue 100 for queuing input data input through an input port. And a cell buffer control unit configured to control the cell buffer unit by receiving a cell buffer unit 102 storing the input cell and a buffer address (hereinafter, abbreviated as BFA) of the input cell. (Cell Buffer Control Block; hereinafter abbreviated as CBCB) 104, and an input cell control unit for determining whether to discard the cell by reading a connection parameter according to the VPI and VCI of the input cell. Control Block (hereinafter abbreviated as ICCB) 106, a Connection Table 108 that stores connection parameters allocated to the connection of the input cell for each virtual channel, and a connection table to be converted from the Connection Table. Reads VPI and VCI An output cell control block (hereinafter, abbreviated to OCCB) 110 for converting a second and a schedule queue 112 for storing a buffer address and a connection table address of a cell to be output among the input cells. And an Output Scheduling Control Block (OSCB) for storing the buffer address of the cell which is not discarded among the input cells and the address of the connection table in the schedule queue existing in the corresponding output port for each service class. 114, a free queue 116 for transmitting and receiving a buffer address with the cell buffer control unit, and an output queue 118 for queuing data to be output among the input cells. It is configured to include.

Referring to the operation of the cell queuing device in the ATM switch according to the present invention configured as described above are as follows.

The cell queuing apparatus according to the present invention not only VPI and VCI to be converted in the connection table 108 at every call setup in order to give a queue for each virtual connection, but also the size of the queue and discarding indicated in FIG. 6. You should write down thresholds such as Discard Level.

First, the ICCB 106 analyzes the header of the cell and discards the discard state, queue limit, discard level, and cell count as shown in FIG. 6 in the connection table 108. ), Determine whether to discard the cell, increase the cell count, and update the connection table 108. The CBCB 104 receives the buffer address BFA from the prequeu 116 and stores the undisclosed cell in the cell buffer unit 102. The OSCB 114 stores the buffer address (BFA) of the cell that has not been discarded and the address of the connection table 108 in the schedule queue 112 existing for each service class in the corresponding output port. In addition, the OSCB 114 is notified of the state of the output port at every cell transmission time, and selects an output port by round robin among the output ports that can be transmitted. At this time, each output port has queues according to five service classes defined by ATM Forum and assigns high priority to CBR and rtVBR, so it is real time traffic sensitive to end-to-end delay. NrtVBR, ABR, and UBR are non real time traffic, so they are not sensitive to end-to-end delay and assign low priority. In this case, the ratio of CBR to total traffic is very small, so it is not a problem to assign high priority to CBR. Therefore, the order of priority is CBR, rtVBR, nrtVBR, ABR, and UBR.

As described above, when the cell to be transmitted is determined, the OSCB 114 reads the address of the connection table 108 and the buffer address BFA of the output cell from the schedule queue 112, so that the address of the connection table 108 is OCCB. And transmits the buffer address BFA of the output cell to the CBCB 104. The OCCB 110 receiving the address of the connection table 108 reads the connection parameters, records the VPI and VCI to be converted in the header of the output cell read by the CBCB 104, converts the header, and then counts the cells. After reducing, update the connection table 108.

If the multiplexer 10 of the input port as shown in FIG. 2 has a maximum multiplexing rate of 3 Gbps (G is Giga Gigabyte), the data bus is 64 bits, the system clock is 50 MHz, and four If the 155 Mbps port is an output port, the CBCB 104 must store the cell in the cell buffer section 102 for seven clocks and read the cell from the cell buffer section 102 for 32 clocks to write to the output queue 118 (Write). ) do. In order to simultaneously perform an operation of writing an input cell to the cell buffer unit 102 and reading an output cell from the cell buffer unit 102, dual port RAM should be used. However, in the present invention, a single port RAM is used. It has the same function as using dual port RAM.

As shown in FIG. 5, the cell buffer unit 105 includes two buffers, each of which has a 64-bit data bus using two 32-bit SRAMs. Create

The operation of writing an input cell to the cell buffer unit 102 writes the first buffer 200 four times in succession and successively writes the second buffer 300 three times in succession, and reads the output cell from the cell buffer unit 102. When the second buffer 300 is writing, that is, when the first buffer 200 is not performing the writing operation, the first buffer 200 is read three times and subsequently written by the first buffer 200. When the operation is performed and the second buffer 300 is not performing the operation, the second buffer 300 may be read three times to avoid a collision. For example, to store 16384 cells with 64 bytes of storage, 128000 addresses are required. 17 bits are required to represent 128000 addresses, but 16 bits per buffer because two buffers are used alternately. The address of the bit is required. Thus, the CBCB 104 generates the start address of each SRAM of the first to second buffer units 110 and 120 by receiving the upper 14 bits from the pre-queue 116 and setting the lower two bits to "00". .

On the other hand, as shown in FIG. 7, whenever a virtual channel is connected, the size of the queue is allocated to the connection table. This not only has the same effect as having a queue for each virtual channel in the queue for each service class shown in FIG. 1, but is also very efficient because other virtual channels can use the buffer resources that are allowed to be used when the connection is released. In addition, the size of the queue can be allocated more or less depending on the characteristics of the traffic, and the congestion of the cell can be controlled by setting various threshold values. For example, set a threshold for discarding a cell according to the value of CLP (Cell Loss Priority) of each ATM cell, or mark the Explicit Forward Congestion Identifier (EFCI) bit for ABR in the class of service. A threshold for marking can be set. In this case, when one cell of the plurality of cells is discarded, the terminal retransmits the entire cell, thereby reducing the amount of traffic by discarding the entire cell at the exchange.

As described above, according to the present invention, a logical virtual queue is allocated to each virtual channel, that is, the size of the queue is allocated every time a virtual connection is made, so that the use of a buffer can be efficiently performed. The occupancy of resources due to the congestion of traffic can be limited, and the resources can be used fairly among each virtual connection, thereby controlling the overall traffic easily.

Claims (6)

A cell buffer unit for storing the input cell, An input cell control unit for determining whether to discard a cell by reading a connection parameter according to VPI and VCI of the input cell; A connection table for storing connection parameters allocated to the connection of the input cell for each virtual channel; An output cell controller for reading a VPI and VCI to be converted from the connection table and converting a header of the cell; A schedule queue for storing a buffer address of a cell to be output among the input cells and an address of the connection table; And an output scheduling controller configured to store the buffer address and the connection table address of the non- discarded cells among the input cells in the schedule queue existing for each service class in the corresponding output port. Cell queuing device. 2. The apparatus of claim 1, further comprising: an input queue for queuing input data input through an input port, a free queue for transmitting and receiving a buffer address with the cell buffer control unit, and an output queue for queuing data to be output among the input cells; Cell queuing device in the ATM switch, characterized in that configured to include. Storing the input cell; Determining an output port and a service level of a cell to be output among the input cells; And performing a header conversion of the cell to be output. The method of claim 3, wherein the storing of the input cell comprises: determining whether to discard the cell for each virtual channel and storing the cell in the cell buffer unit; And storing an address in a schedule queue of an output port to which the cell is to be transmitted. The method of claim 3, wherein the determining of the output port and the service level of the cell to be output among the input cells has a queue for each of the five service classes, and the five service classes are CBR, rtVBR, nrtVBR, ABR, and UBR. The method of cell queuing in an ATM switch, characterized by assigning priorities in the order of. 4. The method of claim 3, wherein performing the header transformation of the cell comprises performing a header transformation by reading a connection table address and a buffer address of the cell from a schedule queue.