KR100275440B1 - Method and jig for mounting components on printed circuit board using conductive film - Google Patents

Method and jig for mounting components on printed circuit board using conductive film Download PDF

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KR100275440B1
KR100275440B1 KR1019970077611A KR19970077611A KR100275440B1 KR 100275440 B1 KR100275440 B1 KR 100275440B1 KR 1019970077611 A KR1019970077611 A KR 1019970077611A KR 19970077611 A KR19970077611 A KR 19970077611A KR 100275440 B1 KR100275440 B1 KR 100275440B1
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South Korea
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semiconductor device
conductive film
circuit board
jig
printed circuit
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KR1019970077611A
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Korean (ko)
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KR19990057553A (en
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김원규
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구자홍
엘지전자주식회사
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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K13/00—Apparatus or processes specially adapted for manufacturing or adjusting assemblages of electric components
    • H05K13/04—Mounting of components, e.g. of leadless components
    • H05K13/046—Surface mounting
    • H05K13/0469—Surface mounting by applying a glue or viscous material

Abstract

PURPOSE: Method and jig for mounting components on a printed circuit board using a conductive film are provided to prevent a short failure due to collapse of solder paste, simplify the process and improve the productivity by bonding leads of a semiconductor device to a pattern of the board using a conductive film. CONSTITUTION: A conductive film(20) is adhered to a copper film pad(7') on a printed circuit board which corresponds to a semiconductor device(8). The semiconductor device is mounted on the board so that footprints(8a) of leads of the semiconductor device are placed on the conductive film. The footprints of leads of the semiconductor are subjected to heating and pressuring to connect the semiconductor with the pattern of the board. A jig(10) for mounting components on a printed circuit board using a conductive film comprises a space portion formed in conformity with a shape of the semiconductor device for accommodating the semiconductor device, a lead portion(11) protruding vertically from the edges of the space portion for heating and pressuring the footprints of leads of the semiconductor device.

Description

전도성 필림을 이용한 회로기판의 실장 방법 및 지그Mounting Method and Jig of Circuit Board Using Conductive Film

본 밭명은 회로기판의 실장방법에 관한 것으로, 특히 전도성 필림을 이용하여 반도체부품을 회로기판에 간단히 접합할 수 있도록 한 전도성 필림을 이용한 회로기판의 실장 방법 및 지그에 관한 것이다.FIELD OF THE INVENTION The present invention relates to a method for mounting a circuit board, and more particularly, to a method and a jig for mounting a circuit board using a conductive film to enable a semiconductor component to be easily bonded to the circuit board using a conductive film.

회로기판의 패드와 부품의 전기적 접속을 위한 종래의 회로기판의 실장방법은, 제1도 내지 제10도에 도시된 바와 갈이, 베어보드(bare board)(3)상에 개구부(2)가 형성된 마스크(1)를 장착하고, 상기 보드(3)의 동박패드(7)상에 스퀴이즈(4)를 이용하여 마스크(1)의 개구부(2)를 통해 솔더 페이스트(5)를 인쇄한 다음, 그 위에 반도체 집적회로 및 전자 부품등의 상면부품(8)를 마운팅하고 리플로우 솔더링하여 동박패드(7)상에 인쇄된 솔더 페이스트(5)를 용융시키어 납땜한다. 이어서, 기판(3)을 반전한 후 다시 상기 과정을 반복하여 하면부품(8′)을 실장하여, 회로기판의 양면에 부품을 실장 접속한다.In the conventional method for mounting a circuit board for electrical connection between a pad of a circuit board and a component, an opening 2 is formed on a bare board 3 as shown in FIGS. 1 to 10. Mount the formed mask (1), and print the solder paste (5) through the opening (2) of the mask (1) using a squeeze (4) on the copper foil pad (7) of the board (3) The upper part 8 such as a semiconductor integrated circuit and an electronic component is mounted thereon, and reflow soldered to melt and solder the solder paste 5 printed on the copper foil pad 7. Subsequently, after inverting the substrate 3, the above process is repeated again to mount the lower surface component 8 ', and the component is mounted on both surfaces of the circuit board.

그런데, 피치가 0.4nn이하의 초미세 부품이 회로기판에 실장되는 경우, 피치간의 거리가 매우 짧아서, 부품리드와 기판의 패드를 접하는 솔더페이스트의 인쇄가 매우 어렵고, 인쇄후 부품의 마운팅공정에서 인쇄된 솔더페이스트가 무너져 단락간 숏트되는 현상이 다발하게 되며, 수리도 대단히 곤란하여 생산성이 저하되는 문제점이 있었다.However, when ultra-fine components having a pitch of 0.4 nn or less are mounted on a circuit board, the distance between the pitches is very short, and it is very difficult to print the solder paste in contact with the component leads and the pads of the substrate, and to print in the mounting process of the components after printing. As a result, the solder paste collapses, causing short-circuit to be short-circuited, and repair is very difficult, resulting in a decrease in productivity.

본 발명은 이러한 종래기술의 문제점을 해결하기 위한 것으로, 전도성 필림을 이용하여 회로기판에 회로부품을 간단히 접합할 수 있는 전도성 필림을 이용한 회로기판의 실장 방법 및 지그의 제공을 목적으로 한다.The present invention is to solve the problems of the prior art, and an object of the present invention is to provide a method for mounting a circuit board and a jig using a conductive film that can be easily bonded to the circuit board using a conductive film.

상기 목적을 달성하기 위하여, 본 발명의 전도성 필림을 이용한 회로기판의 실장 방법은, 기관의 반도체 디바이스 대응 동박패드상에 전도성 필림을 접착하고, 반도체 디바이스의 리드의 풋프린트가 상기 전도성 필림상에 위치하도록 상기 반도체 디바이스를 장착한 후, 상기 반도체 디바이스의 리드의 풋프린트를 가열가압하여 반도체 디바이스와 기판의 패턴을 접속하는 것을 특징으로 한다.In order to achieve the above object, in the method of mounting a circuit board using the conductive film of the present invention, the conductive film is adhered to a copper foil pad corresponding to a semiconductor device of an engine, and the footprint of the lead of the semiconductor device is positioned on the conductive film. After mounting the semiconductor device, the footprint of the lead of the semiconductor device is heated and pressed to connect the semiconductor device and the pattern of the substrate.

제1도는 솔더페이스트 인쇄용 마스크의 사시도.1 is a perspective view of a mask for solder paste printing.

제2도는 회로기판의 패드상에 솔더페이스트를 인쇄하는 상태의 단면도.2 is a cross-sectional view of a solder paste printed on a pad of a circuit board.

제3도 내지 제10도는 종래의 회로기판의 실장방법의 공정도.3 to 10 are process charts showing a conventional method for mounting a circuit board.

제11도는 본발명의 지그의 측면도.11 is a side view of the jig of the present invention.

제12는 본 발명의 지그의 평면도.12th is a plan view of a jig of the present invention.

제13도는 본 발명의 회로기판의 패드상에 전도성필림이 부착된 상태도.Figure 13 is a state attached to the conductive film on the pad of the circuit board of the present invention.

제15도 내지 제25도는 본 발명의 회로기판의 실장방법의 공정도.15 to 25 are process diagrams of a method for mounting a circuit board of the present invention.

제26도 내지 제28도는 전도성 필림에 의한 접속원리의 설명도.26 to 28 are explanatory views of the principle of connection by the conductive film.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

3 : 회로기판 7 : 동박패드3: circuit board 7: copper foil pad

7′ : 반도체디바이스 대응 패드 8 : 반도체디바이스7 ′: pad for semiconductor device 8: semiconductor device

8a : 풋프린트 10 : 지그8a: Footprint 10: Jig

11 : 돌출리드 12 : 공간부11: protrusion lead 12: space part

20 : 전도성 필림 22 : 접착제20: conductive film 22: adhesive

22 : 대전입자22: charged particle

이하, 첨부 도면을 참조하여 본 발명을 상세히 설명하면 다음과 같다.Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

본 발명의 회로기판의 실장용 지그(10)는, 제11도 내지 제14도에 도시된 바와 같이, 반도체 디바이스의 형상과 대응하도록 형성되고, 반도체 디바이스를 수납하기 위한 공간부(12)와, 상기 공간부(12)의 둘레에 형성되어, 상기 디바이스의 리드의 풋프린트를 가압 가열하기 위한 돌출리드부(11)를 구비하고 있다.The mounting jig 10 for mounting the circuit board of the present invention is formed so as to correspond to the shape of the semiconductor device, as shown in FIGS. 11 to 14, and a space portion 12 for accommodating the semiconductor device, It is formed in the circumference | surroundings of the said space part 12, and has the protrusion lead part 11 for pressurizing and heating the footprint of the lead of the said device.

본 발명의 전도성 필림을 이용한 회로기판의 실장 방법은, 제15도 내지 제25도에 도시된 바와 같이, 기판(3)의 반도체 디바이스 대응 동박패드(7′)상에 전도성 필림(20)을 접착하고, 반도체 디바이스(8)의 리드의 풋프린트(8a)가 상기 전도성 필림(20)상에 위치하도록 상기 반도체 디바이스(8)를 기판상에 장착한 후, 상기 지그(10)을 이용하여 반도체 디바이스의 리드의 픗프린트(8a)를 가열가압하여 반도체 디바이스와 기판의 패턴을 접속하는 것이다.In the circuit board mounting method using the conductive film of the present invention, as shown in FIGS. 15 to 25, the conductive film 20 is adhered onto the copper foil pad 7 ′ corresponding to the semiconductor device of the substrate 3. The semiconductor device 8 is mounted on a substrate such that the footprint 8a of the lead of the semiconductor device 8 is positioned on the conductive film 20, and then the semiconductor device is used using the jig 10. The printed circuit board 8a of the lead is heated and pressed to connect the pattern of the semiconductor device and the substrate.

한편, 이방성 도전성 필림(Anisotropic Conductive Film)(20)은, 제26도에 도시된 바와 같이, 수마이크로미터 내지 수십마이크로미터의 미소 도전인자(22)를 절연성 접착제(21)중에 분산시킨 접속재료로서, 이형성을 갖는 분리필림위에 도전재료를 포함한 접착제가 수십마이크로미터의 두께로 형성되어 있다. 제27도 및 28도는, 상기 전도성 필림에 의한 전극의 접속방법을 설명하기 위한 것으로, 전도성 필림(20)을 기판(23)의 접속전극(24)간에 넣고, 쌍방의 전극(24)을 위치맞춤한 후, 가열가압시키면, 접착제(21)는 용융되고, 쌍방의 기관(23)간의 접근에 따라 전극(24)간의 공간에 유동되어 간다. 기판(23)의 접근에 의해 도전입자(22)는 전극(24)에 의해 고정되고 압축편평하여 도통이 이루어진다. 한편, 인접하는 전극간은 도전입자(22)가 접착제(21)중에 분산된 상태로 있기 때문에 절연이 확보된다. 접착제(21)는 경화에 의해 기판(23)을 고정하고 장기신뢰성을 확보한다.On the other hand, the anisotropic conductive film 20, as shown in Figure 26, as a connecting material in which the micro-conductor 22 of several micrometers to several tens of micrometers is dispersed in the insulating adhesive 21 On the separation film having releasability, an adhesive including a conductive material is formed to a thickness of several tens of micrometers. 27 and 28 are diagrams for explaining a method of connecting the electrodes by the conductive film. The conductive film 20 is sandwiched between the connecting electrodes 24 of the substrate 23 and the two electrodes 24 are aligned. After heating and pressing, the adhesive 21 melts and flows into the space between the electrodes 24 in accordance with the approach between the two engines 23. By the approach of the substrate 23, the conductive particles 22 are fixed by the electrode 24 and are compressed and flat to conduct. On the other hand, insulation is ensured between the adjacent electrodes because the conductive particles 22 are dispersed in the adhesive 21. The adhesive 21 fixes the board | substrate 23 by hardening, and ensures long-term reliability.

이하, 상기 지그를 이용한 본 발명의 회로기판의 실장방법을 설명하면, 제15도 내지 제25도에 도시된 바와 같이, 위에 파인피치의 반도체를 제외한 일반 각형 표준부품용 솔더페이스트를 기판(3)의 일반동박패드(7)상에 스퀴이즈등를 이용하여 솔더 페이스트(5)를 인쇄한 다음, 상면부품을 마운팅하고 리플로우 솔더링하여 패드(7)상에 인쇄된 솔더 페이스트(5)를 용융시키어 납땜한다. 이어서, 기판을 반전한 후 다시 상기 과정을 반복하여 하면부품을 실장하여, 회로기판의 양면에 부품을 실장 접속하고, 기판(3)의 반도체 디바이스 대응 동박패드(7′)상에 전도성 필림(20)을 접착하고, 반도체 디바이스, 특히 파인피치의 반도체디방이스(8)의 리드의 풋프린트(8a)가 상기 전도성 필림(20)상에 위치하도록 상기 반도체 디바이스(20)를 기판상에 장착한 후, 상기 지그(10)의 돌출리드(11)를 상기 반도체 디바이스(8)의 폿프린트(8a)상에 위치시키고, 상기 지그의 리드(11)를 통해 반도체 디바이스의 리드의 풋프린트(8a)를 가열가압함으로서, 반도체 디바이스와 기판의 패턴을 접속한다.Hereinafter, the method for mounting the circuit board of the present invention using the jig will be described. As shown in FIGS. 15 to 25, the solder paste for the general square standard parts except for the fine pitch semiconductor is formed on the substrate 3. The solder paste 5 on the ordinary copper foil pad 7 using a squeeze or the like, and then mount the top part and reflow solder to melt the solder paste 5 printed on the pad 7 to solder it. do. Subsequently, after inverting the substrate and repeating the above process, the component is mounted, the component is mounted on both surfaces of the circuit board, and the conductive film 20 is mounted on the copper foil pad 7 'corresponding to the semiconductor device of the substrate 3. The semiconductor device 20 is mounted on a substrate such that the semiconductor device, in particular the footprint 8a of the lead of the semiconductor device 8 of the fine pitch, is positioned on the conductive film 20. Thereafter, the protruding lead 11 of the jig 10 is placed on the potprint 8a of the semiconductor device 8, and the footprint 8a of the lead of the semiconductor device is made through the lead 11 of the jig. By heating and pressurizing, the pattern of a semiconductor device and a board | substrate is connected.

이상, 설명한 바와 같이, 본 발명에 따르면, 솔더페이스트를 사용하지 않고, 전도성 필림을 이용하여 반도체 디바이스의 리드를 기판의 패턴과 간단히 접합함으로서, 특히 파인피치의 반도체디바이스의 실장에 있어서, 솔더페이스트의 무너짐에 의한 숏트불량을 방지할 수 있고, 공정이 단순화되어 생산성을 향상시킬 수 있다.As described above, according to the present invention, the solder paste is simply bonded to the pattern of the substrate by using a conductive film without using a solder paste, and in particular, when mounting a semiconductor device of fine pitch, Short defects due to collapse can be prevented, and the process can be simplified to improve productivity.

Claims (2)

기판의 반도체 디바이스 대응 동박패드상에 전도성 필림을 접착하고, 반도체 디바이스의 리드의 풋프린트가 상기 전도성 필림상에 위치하도록 상기 반도체 디바이스를 기판상에 장착한 후, 반도체 디바이스의 리드의 풋프린트를 가열가압하여 반도체 디바이스와 기판의 패턴을 접속하는 것을 특징으로 하는 전도성 필림을 이용한 회로기판의 실장 방법.After attaching the conductive film on the copper foil pad corresponding to the semiconductor device of the substrate, and mounting the semiconductor device on the substrate so that the footprint of the lead of the semiconductor device is located on the conductive film, the footprint of the lead of the semiconductor device is heated. A method of mounting a circuit board using a conductive film, wherein the circuit board is pressed to connect a pattern between the semiconductor device and the substrate. 반도체 디바이스의 형상과 대응하도록 형성되고, 반도체 디바이스를 수납하 기 위한 공간부와, 상기 공간부의 둘레에 형성되어, 상기 디바이스의 리드의 풋프린트를 가압가열하기 위한 돌출리드부를 구비한 것을 특징으로 하는 전도성 필림을 이용한 회로기판의 실장 지그.It is formed so as to correspond to the shape of the semiconductor device, and provided with a space for accommodating the semiconductor device, and formed around the space, protruding lead for pressing and heating the footprint of the lead of the device, characterized in that Mounting jig for circuit board using conductive film.
KR1019970077611A 1997-12-30 1997-12-30 Method and jig for mounting components on printed circuit board using conductive film KR100275440B1 (en)

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KR101181983B1 (en) 2010-08-04 2012-09-11 삼성전기주식회사 Jig for electroplating of printed circuit board and method of electro plating using the same

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